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2022-05-28payloads/tianocore: Fix unclean working directory detectionNicholas Chin
After commit ae48b42683 (payloads/tianocore: Init submodules), Tianocore's Makefile no longer detects an unclean working directory and thus always performs a `git checkout`, overwriting any uncommited changes made in the cloned sources. The change of "clean" to "dirty" effectively inverts the logic of the if-else condition, which would normally swap the two possible code paths of the branch. However, since `git status` outputs multiple lines, most of which do not contain "clean", the -v option (select non-matching lines) causes grep to always match at least 1 line and thus return success. This causes the if-else branch containing the `git checkout` to always be taken regardless of the state of the working tree, masking the issue of the inverted logic. Removing the -v option addresses both of these issues and restores the intended behavior of the if-else block. TEST: 1) Build coreboot successfully with the Tianocore UefiPayloadPkg option. 2) Make a change in the cloned Tianocore sources that results in an unclean working directory and check for the "Working directory not clean" message when building coreboot. Change-Id: Icd4952b40c147d0fba676089ced5a8b59b93ad50 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64608 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-24payloads/external: Add more option related to SeaBIOS and GRUB2Bill XIE
Also known as "SeaGRUB", running GRUB2 atop SeaBIOS proves to be a useful configuration, since SeaBIOS has improved its hardware compatibility. For example, some USB drive can work under SeaBIOS but do not work under native GRUB2, and GRUB2 can use BIOS call (provided by SeaBIOS) as a fallback method to access hardware if it is present. But more option is added addition to "SeaGRUB": now GRUB2 and SeaBIOS can be built as secondary payloads, and "SeaGRUB" is now implemented as "Primary SeaBIOS + Secondary GRUB2 (selected) + config files". Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: Ie681fa231abfe4a8f1e4510b3c17957550a9d2f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60640 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-05-20libpayload/pci: Add pci_map_bus function for MediaTek platformJianjun Wang
Add 'pci_map_bus' function and PCIE_MEDIATEK config for MediaTek platform. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: I9ea7d111fed6b816fa2352fe93c268116519a577 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-05-20libpayload/pci: Add support for bus mappingJianjun Wang
Move the common APIs to pci_ops.c and IO based operations to pci_io_ops.c, and add pci_map_bus_ops.c to support bus mapping. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: Ie74801bd4f3de51cbb574e86cd9bb09931152554 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56789 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-05-19coreboot_tables: Add PCIe info to coreboot tableJianjun Wang
Add 'lb_fill_pcie' function to pass PCIe information from coreboot to libpayload, and add CB_ERR_NOT_IMPLEMENTED to the cb_err enum for the __weak function. ARM platform usually does not have common address for PCIe to access the configuration space of devices. Therefore, new API is added to pass the base address of PCIe controller for payloads to access PCIe devices. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: I6cdce21efc66aa441ec077e6fc1d5d1c6a9aafb0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63251 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Shelley Chen <shchen@google.com>
2022-05-16libpayload: Fix guards in include/{arm,arm64,x86}/arch/barrier.hDavid Hendricks
Change-Id: Ib4897c4f5837f7f3173d5062eecb893adbe36964 Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64365 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-05-16payloads/coreinfo/coreboot_module.c: Remove 'break' after 'return'Elyes Haouas
Change-Id: Icb60115349ef7c4c35635021784138d45c5a8872 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61954 Reviewed-by: Martin L Roth <gaumless@tutanota.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-05-16payloads/nvramcui/nvramcui.c: Reformat codeElyes Haouas
Change-Id: If5b4ae7d9f9046e56ca098c0469b503130bc8707 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61955 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-11libpayload/nvme: Fix controller disablement in (de)init sequenceNico Huber
We wrote to the wrong register. The EN bit is in the CC (Controller Configuration) register at 0x14. Fixes re-initialization in QEMU and on siemens/chili during a second FILO run. Change-Id: I125de55d7f1a7c9f070437190c5a08a288b274f8 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63935 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-11libpayload/nvme: Test for NVMe-command-set bit individuallyNico Huber
We only need to know if the NVMe command set is supported. Other command-set bits can be set too, but we don't have to care. Fixes init in QEMU which has more command-set bits set by now. Change-Id: I29a693cf8cc13775e94dc671e8d0412ad86fef9c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63934 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-11libpayload/nvme: Fix error paths of nvme_init()Nico Huber
We mustn't try to release resources that we haven't acquired yet. Also, sending commands to the NVMe device is futile if we already timed out. Fixes hangs after a failed init noticed in QEMU and on siemens/chili. Change-Id: Ib83c7785d6e0dc3c44fbd50a30694c74932750d6 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63933 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-04-19payloads/depthcharge: enable LP_CHROMEOS in depthchargeSelma Bensaid
Fix standslone build failure after depthcharge patch https://crrev.com/c/3461454 merge. BUG=chrome-os-partner:226438207 TEST=Compiled brya and redrix in standalone mode. Signed-off-by: Selma Bensaid <selma.bensaid@intel.com> Change-Id: Ib2bb2ce42a314e05ef22ea7b8abc067d6361d511 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63240 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2022-04-14coreboot_tables: Replace 'struct lb_uint64' with lb_uint64_tJianjun Wang
Replace 'struct lb_uint64' with 'typedef __aligned(4) uint64_t lb_uint64_t', and remove unpack_lb64/pack_lb64 functions since it's no longer needed. Also replace 'struct cbuint64' with 'cb_uint64_t' and remove 'cb_unpack64' in libpayload for compatible with lb_uint64_t. Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: If6b037e4403a8000625f4a5fb8d20311fe76200a Reviewed-on: https://review.coreboot.org/c/coreboot/+/63494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-13payloads/LinuxBoot: Fix u-root branchArthur Heymans
It looks like the u-root 'master' branch was renamed to 'main'. Change-Id: I384ba66289a49bf226b505615bd16bdf85612c1a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62590 Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-11payloads/tianocore: Don't declare tools directory twiceSean Rhodes
EDK_TOOLS_PATH is set on lines 85 and 137. Remove the instance on 85. edk2 still builds correctly. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I0c837f14693941afec194b140c93d786ea784e53 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63180 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-30commonlib/bsd/helpers: Remove redundancy with libpayload definesJakub Czapiga
Move STRINGIFY() from coreboot string.h to commonlib/bsd/helpers.h Remove redundant defines from libpayload.h and libpayloads' standard headers. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I3263b2aa7657759207bf6ffda750d839e741f99c Reviewed-on: https://review.coreboot.org/c/coreboot/+/62921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-30libpayload: Parse the ACPI RSDP table entryArthur Heymans
Change-Id: I583cda63c3f0b58f8d198ed5ecea7c4619c7a897 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62576 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-25libpayload/vboot: Fix include paths fixup macroJakub Czapiga
Include paths fixup macro for vboot was broken and was adding unnecessary prefix to paths from $(coreboottop). This patch adds correct filters to fix this behavior. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I264e715fa879a4e56b6e5f5423916298e8780a2b Reviewed-on: https://review.coreboot.org/c/coreboot/+/63002 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-22payloads/iPXE: Update stable version from 2019.3 to to 2022.1Michał Żygowski
Update iPXE stable from commit id ebf2eaf515: Mar 18 10:24:08 2019 +0000 [intel] Add PCI ID for I219-V and -LM 6 to 9 to commit id 6ba671acd9: Jan 17 16:17:17 2022 +0000 [efi] Attempt to fetch autoexec script via TFTP This brings in 424 new commits and fixes the build with coreboot-sdk 2021-09-23_b0d87f753c. TEST=Build PC Engines apu2 board and boot it over network with the iPXE Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Ide12a3a3082f9ea027e180518a80e6c0772b1232 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-21payloads/tianocore: Add missing CONFIG_Sean Rhodes
Add missing CONFIG_ to the Boot Timeout parameter. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I88f4aa0286a77f6c94b5e5ec97a0034ea7594b4f Reviewed-on: https://review.coreboot.org/c/coreboot/+/62920 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-16libpayload: Parse DDR Information using coreboot tablesRavi Kumar Bokka
BUG=b:182963902,b:177917361 TEST=Validated on qualcomm sc7280 development board Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e Reviewed-on: https://review.coreboot.org/c/coreboot/+/59193 Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-14payloads/seabios: Update stable version to 1.16.0Felix Singer
SeaBIOS 1.16.0 was released on March 2nd. Thus, update the stable version from 1.14.0 to 1.16.0. Change-Id: I475a9be47171bfbe3b3c2d4d1d14bb753d8575a8 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62575 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-03-09payloads/tianocore: Add prompt for Boot TimeoutSean Rhodes
Add prompt to Boot Timeout so that it can be easily configured from a config file. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I62b8f0a9b5bc0796506b991199a457d6b34ae494 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62558 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-03-09commonlib/bsd: Remove cb_err_tJulius Werner
cb_err_t was meant to be used in place of `enum cb_err` in all situations, but the choice to use a typedef here seems to be controversial. We should not be arbitrarily using two different identifiers for the same thing across the codebase, so since there are no use cases for serializing enum cb_err at the moment (which would be the primary reason to typedef a fixed-width integer instead), remove cb_err_t again for now. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Iaec36210d129db26d51f0a105d3de070c03b686b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62600 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-04libpayload: cbmem_console: Drop loglevel markers from snapshotJulius Werner
coreboot recently introduced non-printable loglevel markers in the CBMEM console. Payloads were generally unaffected since they don't use log levels and it is still legal to append lines without a marker to the log. However, payloads using cbmem_console_snapshot() to display existing logs from coreboot have started seeing '?' characters in place of the markers. This patch fixes the issue by filtering out marker characters. BUG=b:221909874 Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I4a9e5d464508320cf43ea572d62896d38c2a128d Reviewed-on: https://review.coreboot.org/c/coreboot/+/62506 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-03-03libpayload/bin/lpgcc: Make lpgcc provide TPM configuration for vbootJakub Czapiga
TPM1_MODE and TPM2_MODE defines have to be added to vboot and payload cflags to make them build correctly without requiring payloads to provide defines. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I567a9f04d7089699840dc7e0a063cf3030fb934b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62516 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-25payloads/tianocore: Convert BMP at build timeSean Rhodes
Convert BMP to the correct format at build time, which removes the requirement for any runtime checks. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I4f1e9c8df2ca7d66f362f9fa5688d6cb443c2581 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-25payloads/tianocore: Pass SD_MMC_TIMEOUT build optionSean Rhodes
By default, edk2 allows 1000000μs for SD Card Readers and eMMC to initialize which is excessive and causes a boot delay. This makes the value configurable and uses a default of 1000μs which is sufficient for the majority of readers. The value of 1000μs was hardcoded in MrChromeBox's fork for around 2 years with no reported issues. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I873bcddf6f37a9eaae5c84991b3996d51fb460d3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61902 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2022-02-24payloads/tianocore: Add option for to prioritize internal devicesSean Rhodes
Add TIANOCORE_PRIORITIZE_INTERNAL which, when enabled, will build edk2 with boot from internal devices before external devices. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ib1f73c8f3f2f2376cdc197b58d259446dc5f0138 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61797 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24payloads/tianocore: Add option for PS/2 keyboard supportSean Rhodes
Add TIANOCORE_PS2_SUPPORT which, when enabled, will build edk2 with PS/2 keyboard support. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ibabce6ac1ac68ab958610d42c77f3c2c494528ef Reviewed-on: https://review.coreboot.org/c/coreboot/+/61760 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24payloads/tianocore: Add option to include EFI ShellSean Rhodes
Add TIANOCORE_HAVE_EFI_SHELL, which when enabled, will build edk2 with the EFI Shell binary. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I1272f514e3f5becfe1fddd58ca0d820c5d1c1b54 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61759 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24payloads/tianocore: Add option to use follow BGRT specSean Rhodes
Adds TIANOCORE_FOLLOW_BGRT_SPEC which, when enabled, will follow the BGRT Specification implemented by Microsoft and the Boot Logo will be vertically centered 38.2% from the top of the display. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: If508166fe657d1cc032dd09a0fa231c7b60d9846 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61758 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24payloads/tianocore: Add option to use Escape for Boot ManagerSean Rhodes
Add TIANOCORE_BOOT_MANAGER_ESCAPE which, when enabled, will use Escape as the hot-key to access the Boot Manager. This replaces the default key of F2. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I1e60d116367542f55f0ffa241a6132e4faabe446 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61757 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-23libpayload/lpgcc: Add `--gc-sections` linker argumentNico Huber
To be able to link libcbfs without vboot, we need garbage collection now. Change-Id: Id9a9fe7efb9fb4409a43ae8357f4f683618805d2 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62247 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-23libpayload/x86: Fix boot_device_read() and hook it upNico Huber
Casts from integer to pointer are usually a case for phys_to_virt(). Change-Id: I861d435ff2361cdc26a2abd46d43b9346fa67ccc Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62246 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-22payloads/tianocore: Rework MakefileSean Rhodes
Rework edkii makefile so that the various build options are unified between CorebootPayloadPkg, uefipayload_202107 and upstream. This sets the project directory based on the git repository name i.e. https://github.com/mrchromebox/edk2 becomes mrchomebox Also builds to $(obj)/UEFIPAYLOAD.fd and allows using a commit ID without a branch. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I3cc274e7385dd71c2aae315162cc48444b7eaa5f Reviewed-on: https://review.coreboot.org/c/coreboot/+/61620 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Martin Roth - Personal <martinroth@google.com>
2022-02-21libpayload/vboot: Enable vboot and x86 SHA extension for ChromeOSJakub Czapiga
Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: Ia63d44de5440b87cedb35ff92edaa0f35ccd75a4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21libpayload/vboot: Add missing quotes enclosing valuesJakub Czapiga
Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I1a72ea63a46dedd1fc2e1e53bf7714ad70ebc5e1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62171 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21libpayload/vboot/Makefile.inc: Add strip to kconfig-to-binary macroJakub Czapiga
Lack of strip made it required to pass arguments to the kconfig-to-binary macro without spaces. Strip fixed invalid behavior of this macro. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I9889b45f773b9675fae287086d324c180c505a4b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62133 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21libpayload/cbfs: Add missing new line at the end of error messagesJakub Czapiga
Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: Ieec281e4f1c67e40976892b3dd1780d2f3802df4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-16payloads/external: add skiboot (for QEMU/Power9)Sergii Dmytruk
Add an option to build skiboot as a payload. This makes QEMU Power9 board simpler to use as skiboot is necessary anyway. Change-Id: I0b49ea7464c97cc2ff0d5030629deed549851372 Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com> Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com> Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58656 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2022-02-10libpayload/libc/coreboot: Fix CBFS MCache sizeJakub Czapiga
CBFS MCache size was assigned a value of the coreboot tables entry size instead of the MCache size. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I8a8c3a10c6032121b4c5246d53d2643742968c09 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61714 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-28libpayload: Refer to vboot source consistentlyPatrick Georgi
Don't assume that libpayload is built from a fully checked out coreboot tree. There's already an override when building vboot, so reuse that override when referring to its header files. Signed-off-by: Patrick Georgi <pgeorgi@google.com> Change-Id: I503c69a593dd68b3a974fbdbb64d7bb25d6c7f63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Rob Barnes <robbarnes@google.com>
2022-01-24Revert "SeaBIOS: Update stable release to 1.15.0"Paul Menzel
This reverts commit 2a8de6dafb7eec8ff9112b43888507fbc0d8f851. SeaBIOS 1.15.0 regresses on systems with NVMe devices [1]: > Greetings! Was this patch set tested on bare metal hardware? I'm > seeing "GRUB loading: Read Error" when attempting to boot from NVMe on > various Purism Librem devices (Intel Skylake thru Cometlake hardware). > Reverting this series resolves the issue. So, revert back to SeaBIOS 1.14.0. [1]: https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/message/SRECAGH4NE3XPDWJ2YI526L5LPSJWENJ/ Change-Id: If2ec738d478f11b203f499eaa28197357de6630d Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61179 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-20libpayload/Makefile.inc: Fix ar calls to support llvm-arJakub Czapiga
llvm-ar does not support "open" script command, and fails with an error. This patch fixes it by removing lines `$(AR) rc <object-files>` and it puts them as "addmod" commands. This way all object files and archives can be packed into one archive. Change-Id: I0c53d1d613b5edc321e268d1d996fac3146680f8 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61182 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-15libpayload: Install vboot headers and add include paths to lpgccJakub Czapiga
New CBFS API uses commonlib/bsd/cbfs_serialized.h, which includes vboot's vb2_sha.h. And, because vboot's includes are not available in libpayload's installation directory nor in lpgcc paths, it was causing compilation errors. This patch fixes this issue. lpgcc will look for `vboot` directory like it is doing for `include` directory to create correct paths. However, if payload will be built using libpayload's build dir as a base, then vboot headers from 3rdparty/vboot will be used, as there is no way to pass VBOOT_SOURCE from makefile to lpgcc. Moreover, this patch moves VBOOT_SOURCE to the main Makefile to make it available for installation target, to install headers from vboot directory provided by caller. Change-Id: I68dd7e1545cfcaf24547d8a9fe289447c79da222 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reported-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61032 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-14libpayload: Fix legacy CBFS code after recent refactoringJulius Werner
The goal when adding the new CBFS API in CB:59497 was that the old CBFS code would be left completely untouched and just moved to the side a bit, so that it could continue to work for the payloads that use it until they all have time to transition to the new CBFS API. Unfortunately, between the different iterations of the patch something went wrong with that and the final committed version of cbfs_legacy.c does differ in some parts from the original code, including a changed macro definition that breaks decompression support. This patch restores all the legacy CBFS files to exactly what they used to be (other than the necessary changes in cbfs_core.h to avoid double definition clashes). Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ic7fd428acb03d3830f66f807cd1d7cdbd652f409 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61061 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2022-01-14libpayload/libcbfs/Kconfig: Make CBFS_VERIFICATION depend on VBOOT_LIBJakub Czapiga
CBFS_VERIFICATION was depending on the VBOOT instead of on VBOOT_LIB, which made enabling CBFS_VERIFICATION impossible. VBOOT is not available, like in the main coreboot, but is was changed to VBOOT_LIB, and was not correctly adjusted in patch instroducing CBFS_VERIFICAITON option. Change-Id: Ie23bad5f0ed3faf17a2ed7a3ad99310ee803edd2 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-12libpayload/libcbfs: Add unverified_area APIsJakub Czapiga
This patch introduces equivalents of unverified_area CBFS access functions added to the main coreboot tree in CB:59678 Change-Id: Ibadfd2a5cb6ad037ef1222b0a4301f90a79a127b Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60714 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-10libpayload: Implement new CBFS access APIJakub Czapiga
This commit adds new CBFS API, which is based on the one available in the main coreboot source tree. Libpayload implementation supports RO/RW file lookups and file contents verification. Change-Id: I00da0658dbac0cddf92ad55611def947932d23c7 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59497 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-10libpayload: Enable vboot integrationJakub Czapiga
This patch introduces building and linking of 3rdparty/vboot with libpayload. VBoot can be enabled by setting CONFIG_LP_VBOOT_LIB. Moreover it can be configured to use either TPM or TPM 2.0 mode, and whether to use SHA256 processor extension instructions on x86. Change-Id: I2d9d766a461edaa0081041c020ecf580fd2ca64e Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60080 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-12-23payloads/Makefile.inc: Add warning for image built with no payloadNicholas Chin
Writing a coreboot image without a payload to a board's flash chip will result in a non-bootable system, so warn the user if this is the case. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Change-Id: I15ae9548a45e9f566c84db41e8e171c6bc179057 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60025 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-23libpayload/libc/fmap: Implement new FlashMap APIJakub Czapiga
This patch introduces new FlashMap API, the fmap_locate_area(). It works on cached FlashMap provided in lib_sysinfo.fmap_cache. Change-Id: Idbf9016ce73aa58e17f3ee19920ab83dc6c25abb Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-12-23libpayload: Add commonlib/bsd include path to lpgccJakub Czapiga
coreinfo and nvramcui are using libpayload/bin/lpgcc and libpayload build directory as a base, instead of installing it first. This caused include errors, because commonlib/bsd is not present there. This patch introduces comonlib/bsd include path to lpgcc CFLAGS if it is being built using libpayload build directory as a base. Change-Id: I7d1fe9e5dc3e7c1c1ba825a1bf19972722b42778 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60171 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-12-20libpayload: Add -Wno-address-of-packed-member for ARCH_MOCKJakub Czapiga
When compiling libpayload using x86_64 toolchain for ARCH_MOCK compiler reports an error about gerring address of packed member. Until now it had to be disabled by passing -Wno-address-of-packed-member to EXTRA_CFLAGS. This patch disables this warning. Change-Id: I9a948fabe66f7297632ecaca8ec1bfa5c842b750 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60169 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-12-14payloads/U-Boot: Fix various build errorsBill XIE
1. Fix the inconsistence of the target path of U-Boot payload between Kconfig and Makefile.inc. 2. Perform full clone (to the destined commit) in order to get tags. 3. Move stable commit id of U-Boot payload from Makefile to Kconfig, and make prompt consistent with it. Change-Id: Ic0f11c16274456a452a0422e19fab0c61d8b5d5b Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60028 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-13lib: Add __fls() (Find Last Set)Jianjun Wang
Implement __fls() as an alias for log2(), and remove the duplicate definitions in commonlib/storage/sdhci.c. Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: Ib458abfec7e03b2979569a8440a6e69b0285ac32 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-12-10libpayload: Add boot_device_read() functionJakub Czapiga
This patch adds a new way of implementing flash access for libpayload. Until now all reads had to be performed using cbfs_media, which is obsolete. From now on all reads should be performed using boot_device_read(). This patch also provides a default implementation of boot_device_read() for x86 architecture. Change-Id: I1babd2a8414ed9de3ca49903fcb4f036997b5ff3 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59492 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-12-09SeaBIOS: Update stable release to 1.15.0Martin Roth
SeaBIOS 1.15.0 was released on December 2nd. This updates the stable version from 1.14.0 to 1.15.0 Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ibc526fbddf8a13e7b00e963f9c2e73a9863c9daa Reviewed-on: https://review.coreboot.org/c/coreboot/+/59957 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-12-08libpayload/Makefile: Improve object files list creationJakub Czapiga
This patch ports some parts of main coreboot Makefile to the libpayload Makefile in order to improve object files creation. Moreover, the coreboot source files are now accessible an will be correctly compiled under libpayload build directory. Change-Id: If1280c0a3f7e99aad2ecf8a0379a98af31ccefc3 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59843 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org>
2021-12-08libpayload: Add include/commonlib/bsd to installed headersJakub Czapiga
Copy header files from the main commonlib/bsd to libpayload output installation directory. Change-Id: Idc7175240f3077ec98280331f9a952310aae4341 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59916 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org>
2021-12-07tests: Disable -Wmain-return-type for clangJulius Werner
Unit tests fail on clang 13.0 because Cmocka's main() function is declared with return type int, but through some of our chain-include games it sometimes gets coreboot's main_decl.h which declares the function as void. Compilers have traditionally always been very laissez-faire about the signature of the main function, but it seems that clang has been getting more strict by default recently. Explicitly disable the related warning to shut it up. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I867c9dac659be86e7b7cf4cc41d6fa105aa9ac41 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59815 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2021-12-07tests: Disable -Wsource-mgr for clangJulius Werner
Unit tests fail on clang 13.0 with a cryptic error: _timestamp_size changed binding to STB_WEAK [-Werror,-Wsource-mgr] Probably something related to the weird things we do to mock memlayout areas. Too lazy to track it down. Let's just disable this (clang-specific, not properly documented) warning flag. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ie49c9eef3c74592c068c899c6717621dbcb9f609 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59814 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2021-12-06tests: Fix objcopy --add-symbol arguments creationJakub Czapiga
Remove unnecessary escape bachslashes from: addr="$(echo \"$$$$sym_line\" ... The 'echo' will print output line with double quote characters, which then will be included in the values passed to --add-symbol. This can cause errors. Change-Id: I6023515191d6c236bf57870159a35d518f25e9d8 Reported-by: Yu-Ping Wu <yupingso@chromium.org> Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59858 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-12-03libpayload: Add CBMEM_IMD_ENTRY support to coreboot tables parserJakub Czapiga
coreboot stores much information in the CBMEM IMD. Until now it was ignored. This patch makes use of these coreboot tables entries. It also removes get_cbmem_addr() function as it is no longer needed. Moreover, the coreboot tables entry CB_TAG_MRC_CACHE does not exist anymore, as it is not created by the code. It was replaced by CBMEM_ID_MRCDATA entry, so MRCDATA should now be accessible through sysinfo structure field. Change-Id: I5bd02a98ba2631f34014bc0f8e7ebd5a5ddd2321 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59491 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2021-12-01libpayload: Add coreboot commonlib/bsd include pathJakub Czapiga
Make BSD part of the coreboot commonlib accessible to libpayload. Change-Id: I09f475d399ab785f3d3ffdb4b42950d2b397845e Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59697 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org>
2021-11-25payloads/U-Boot: Move to v2021.10Simon Glass
Move to building the latest U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I33fcfc3135e55d16b0dcd8135217bd5adcef2099 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-11-25payloads/U-Boot: Enable the frame bufferSimon Glass
U-Boot normally runs with a display if available. Enable this option so that the display shows if U-Boot supports it. Use 'select' rather than 'imply' since the CI complains. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ie5684c6ead30076689f43034675ff9f3531970fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/59605 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-11-25payloads/U-Boot: Correct start addressSimon Glass
At present U-Boot crashes on entry as the start address is wrong. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I65e32fbb4ffea04b99abe4dc5afccfacd06c986e Reviewed-on: https://review.coreboot.org/c/coreboot/+/59603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-11-25payloads/U-Boot: Do a shallow cloneSimon Glass
We don't need all the git history. Speed up the build by doing a shallow clone. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: If31c9dd158aa23f242e4fd145449ef7502fb1ab1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-11-25payloads/U-Boot: Use the correct output binarySimon Glass
The u-boot.bin file should be used, rather than u-boot-dtb.bin While they are often the same, the -dtb version is really just for legacy use now. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I5558ed94c7dd6cc57ceb835fe367bfa050ad2150 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59601 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-11-25payloads/U-Boot: Tidy up the U-Boot buildSimon Glass
This doesn't work at present, merely printing an error when U-Boot is selected as a payload. This is because it adds a file into the U-Boot tree which makes U-Boot's build system think that the tree is unclean. Update the rules to put the tag file outside the source tree. Use an out-of-tree build for U-Boot to avoid changing the source tree. Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I24d6545b54f97afeefaca3ffed79eec2e7afacb4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59600 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-11-24libpayload/tests: Fix mocks __real_<func> symbol creationJakub Czapiga
There were escape backslashes around regular expression passed to grep. Because of that, grep was returning empty results as a consequence of pattern mismatch, and thus symbols pointing to original functions were not created correctly. Change-Id: I751109735b6c56824df9a560ae989bf062a0e9a6 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59496 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-11-23libpayload: Add mock assert support for unit testing purposesJakub Czapiga
Some unit tests might require catching assert failures. This patch adds an assert() variant depending on __TEST__ define passed to unit tests. Change-Id: I7e4620400f27dbebc57c71bbf2bf9144ca65807f Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-11-23libpayload/tests: remove tests/include/mocks include pathJakub Czapiga
Some files in tests/include/mocks might have the same name as main libpayload include files. Remove this path from default includes to force addition of mocks/ prefix in include paths. This will help avoiding name clashes and will also make mock headers visible. Change-Id: I4baa07472f0379d56423cf7152b1ecc9a4824539 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59493 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-11-10Rename ECAM-specific MMCONF KconfigsShelley Chen
Currently, the MMCONF Kconfigs only support the Enhanced Configuration Access mechanism (ECAM) method for accessing the PCI config address space. Some platforms have a different way of mapping the PCI config space to memory. This patch renames the following configs to make it clear that these configs are ECAM-specific: - NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT - MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT - MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS - MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER - MMCONF_LENGTH --> ECAM_MMCONF_LENGTH Please refer to CB:57861 "Proposed coreboot Changes" for more details. BUG=b:181098581 BRANCH=None TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max Make sure Jenkins verifies that builds on other boards Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-04tests: Move x86 I/O functions to include/mock/arch/io.hJakub Czapiga
Move th x86 I/O functions declarations from tests mocks to the mock architecture io.h. This will make x86 I/O-dependent tests simpler, because the x86_io.h from mocks will not have to be included manually. Change-Id: Ie7f06c992be306d2523f2079bc90adf114b93946 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58881 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-11-01payloads/Tianocore: re-add CorebootPayload build optionMatt DeVillier
Some older devices, like the x230 Thinkpad, do not boot with the newer Tianocore UefiPayloadPkg build target, and cannot easily be debugged without serial UART output. As a stopgap solution, re-add the older (now deprecated/removed) CorebootPayloadPkg build target. This partially reverts commit d3b49b4c, "payloads/Tianocore: Update default build target, simplify build options" Change-Id: I81490c277626fc69d95920868d80cb24c0763de4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58710 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2021-10-18libpayload: Add unit-tests framework and first test caseJakub Czapiga
This commit adds a unit-tests framework ported from coreboot, and test for drivers/speaker. Usage of the unit-tests framework is same as for the coreboot one. Change-Id: Iaa94ee4dcdc3f74af830113813df0e8fb0b31e4f Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58242 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-10-11libpayload: Add mock architectureJakub Czapiga
Mock architecture can be used to build libpayload using host compiler. It can be enabled by setting ARCH_MOCK=y in the dotconfig. It sets LITTLE_ENDIAN=y, as most machines these days use little-endian CPUs. Libpayload will use HOSTCC as CC, HOSTLD as LD, etc. instead of tools provided by xcompile. Mock architecture configuration can be used by payloads for testing purposes. Thanks to it, tests can be architecture-independent, and can be executed without requiring compatible Kconfig options, e.g. ARCH_ARM64=y for ARM64 machine. However, one has to provide implementation for most architecture-specific functions present in arch/* directories. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: Ie3a6e6f6cad2f8a2e48a8e546d3b79c577653080 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57708 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-10-09payloads/tianocore/Kconfig: Extend help for bootsplash fileFelix Friedlander
Add more detail as to why a smaller-than-screen-size image is to be preferred, in contrast to other payloads' bootsplash images. Signed-off-by: Felix Friedlander <felix@ffetc.net> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Change-Id: Ib4c6666bb0e49369fe8fe2ae3dc12c023f668da0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49233 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-10-08payloads: Allow selecting UefiPayload on ARM64 platformsRex-BC Chen
Some ARM64 platforms (e.g., MT8195) are now able to compile and run EDK2 (UefiPayload). As a result, we should allow selecting PAYLOAD_TIANOCORE for ARM64 platforms. TEST=show strings correctly. 1. make menuconfig 2. select Mainboard -> Vendor=Google, model=Cherry 3. select Payload -> Add a payload -> Tianocorepayload 4. make -j 5. build/cbfstool build/coreboot.rom extract --name fallback/payload --file out.elf -m arm64 6. file out.elf # ELF 64-bit LSB executable, ARM aarch64 7. strings out.elf | grep tianocore # lots of tianocore stuff Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I10777a341d46240b91ceeeb1be26c33a0c5db839 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58054 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-07libpayload: cbgfx: Clear screen by memcpyYu-Ping Wu
Instead of setting each pixel in the framebuffer, use memcpy() to clear screen faster. As this method should be fast enough, remove the fast path using memset(). The speed of clear_screen() on brya (x_resolution = 1920, bytes_per_line = 7680): - Using memset(): 15ms - Setting each pixel: 25ms - Using memcpy(): 14ms Also remove set_pixel_raw() since it's now used in only one place. BUG=none TEST=emerge-brya libpayload TEST=Saw developer screen on brya BRANCH=none Change-Id: I5f08fb50faab48d3db6b61ae022af3226914f72b Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2021-10-06libpayload: Enable UART driver for sc7280Roja Rani Yarubandi
Add Qualcomm's QUPV3 serial driver for herobrine board BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board. Change-Id: I3a745afd7bbabdd29f1f369612c990526e5a2335 Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
2021-10-04driver/intel/pmc_mux/conn: Move typec_orientation enum to coreboot_tables.hNick Vaccaro
Move the locally declared typec_orientation enum from chip.h to coreboot_tables.h. Change enum typec_orientation name to type_c_orientation for consistency with contents of coreboot_tables.h. Rename TYPEC_ORIENTATION_FOLLOW_CC to TYPEC_ORIENTATION_NONE. BUG=b:149830546 TEST="emerge-volteer coreboot" and make sure it compiles successfully. Change-Id: I24c9177be72b0c9831791aa7d1f7b1236309c9cd Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-10-04coreboot tables: Add type-c port info to coreboot tableNick Vaccaro
This change adds type-c port information for USB Type-C ports to the coreboot table. This allows depthcharge to know the usb2 and usb3 port number assignments for each available port, as well as the SBU and data line orientation for the board. BUG=b:149830546 TEST='emerge-volteer coreboot chromeos-bootimage' and verify it builds successfully. Cherry-pick CL to enable this feature for volteer, flash and boot volteer2 to kernel, log in and check cbmem for type-c info exported to the payload: localhost ~ # cbmem -c | grep type-c added type-c port0 info to cbmem: usb2:9 usb3:1 sbu:0 data:0 added type-c port1 info to cbmem: usb2:4 usb3:2 sbu:1 data:0 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Change-Id: Ice732be2fa634dbf31ec620552b383c4a5b41451 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57069 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-09-20device/mmio: Make buffer_to_fifo32() take a const bufferJulius Werner
The input buffer to the buffer_to_fifo family of functions is only read, so it can be a const pointer. (Also, remove the MIPS check in libpayload for these functions... the MIPS architecture has been removed a while ago.) Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I021069680cf691590fdacc3d51f747f12ae3df31 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57731 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2021-09-08payloads/external/tianocore: Add build argument for 4G DecodeSean Rhodes
Add Kconfig option TIANOCORE_ABOVE_4G_DECODE to pass build option to edk2 to enable or disable "Above 4G Decode". Disabling allows certain Linux distributions to boot such as Qubes, Zorin and Proxmox. Requires commit `2f6d4cbcc7fa49462e607baed7626524ccd59ad3` that is present in the `uefipayload_202107` branch of MrChromebox's edk2 repository. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia3b1d15196c0ec611431af29031682fea626d19d Reviewed-on: https://review.coreboot.org/c/coreboot/+/56223 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2021-09-01libpayload: Move EXTRA_CFLAGS to enable option overrideJakub Czapiga
Before this patch EXTRA_CFLAGS were placed before many other options. This made overriding impossible even, when necessary. This patch moves EXTRA_CFLAGS to be placed after original CFLAGS, thus making option overriding possible. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: If8394b151696eee4bd736d2fb1ad340209e05fbb Reviewed-on: https://review.coreboot.org/c/coreboot/+/57181 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-27libpayload: cbgfx: Clear screen by sequential accessYu-Ping Wu
Currently clear_screen() calls set_pixel() to set all pixels. However, the actual order of pixels being set depends on the framebuffer orientation. With NORMAL orientation, the framebuffer is accessed sequentially; with LEFT_UP/RIGHT_UP orientation, it is accessed back and forth, leading to performance drop (>1 second on bugzzy). Therefore, ensure sequential access to the framebuffer, regardless of the orientation. BUG=b:194967458 TEST=emerge-cherry libpayload BRANCH=dedede Change-Id: Iecaff5b6abc24ba4b3859cbc44c0d61b2a90b2d9 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57104 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-12libpayload: Mark Intel 300 series AHCI as testedNico Huber
Tested with filo on roda/rw14. Change-Id: Ia5f868d3a9cead0a872e6d3e9fdacd6eeb7f158b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56666 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-09payloads/libpayload: add MTK_TIMER_V2 configRex-BC Chen
The timer structure (in particular, the offset to memory addresses) on recent MTK SoCs for example MT8195 has been changed. BUG=b:195274787 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Ifd6ff65a825c4309c47f3b115b80a8ecd42fedac Reviewed-on: https://review.coreboot.org/c/coreboot/+/56845 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-02payloads/tianocore: update MrChromebox UEFIPAYLOAD branchMatt DeVillier
Update tianocore branch used with default UEFIPAYLOAD option to mrchromebox/uefipayload_202107 (July 2021) branch. This branch is rebased on edk2 upstream commit 12e34cd2f7900578ee83cb01b8f1696a7bb7511b [OvmfPkg/Bhyve: clean up TPM_ENABLE remnants] vs tag edk2-stable202105. The main changes are fixes for e820 table parsing and support to disable "Above 4G decode", which is required to boot distros with bootloaders that expect to be loaded into RAM below 4G. This fixes booting with Qubes, ZorinOS, Proxmox, among others. Additionally, several commits on top of upstream have been consolidated, reworked, and/or reordered for readability and maintainability. Change-Id: I6f04fd027a0599ca6892a1376938108a2e402ac2 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-07-19payloads: FILO: Hook up autoboot optionsPaul Menzel
FILO allows to configure a line to autoboot. Hook this up into coreboot’s build system. TEST=Configure coreboot for QEMU i440fx with FILO as payload and configure: CONFIG_FILO_MASTER=y CONFIG_FILO_USE_AUTOBOOT=y CONFIG_FILO_AUTOBOOT_FILE="hda1:/vmlinuz root=/dev/sda1 console=tty0 console=ttyS0,115200 initrd=hda1:/initrd.img" CONFIG_FILO_AUTOBOOT_DELAY=5 Boot Debian image with: qemu-system-x86_64 -bios /dev/shm/coreboot/build/coreboot.rom -L /dev/shm -enable-kvm -smp cpus=2 -m 1G -hda /dev/shm/debian-32.img -serial stdio -net nic -net user,hostfwd=tcp::22222-:22 Change-Id: Id167e9a144bf466da87469108002672b299b702a Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56213 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-07-14libpayload: curses: Only call `serial_set_color()` with initialized valuesPaul Menzel
Building nvramcui with i386-elf-gcc (coreboot toolchain v2021-04-06_7014f8258e) 8.3.0 and Link Time Optimization (LTO) enabled in libpayload (`CONFIG_LP_LTO=y`) fails with the error below. LPGCC nvramcui.bin curses/PDCurses/pdcurses/refresh.c: In function 'wrefresh': curses/pdcurses-backend/pdcdisp.c:217:4: error: 'bg' may be used uninitialized in this function [-Werror=maybe-uninitialized] curses/pdcurses-backend/pdcdisp.c:214:18: note: 'bg' was declared here curses/pdcurses-backend/pdcdisp.c:217:4: error: 'fg' may be used uninitialized in this function [-Werror=maybe-uninitialized] curses/pdcurses-backend/pdcdisp.c:214:14: note: 'fg' was declared here lto1: all warnings being treated as errors lto-wrapper: fatal error: i386-elf-gcc returned 1 exit status compilation terminated. /opt/xgcc/lib/gcc/i386-elf/8.3.0/../../../../i386-elf/bin/ld.bfd: error: lto-wrapper failed collect2: error: ld returned 1 exit status `pair_content()` returns in case `PAIR_NUMBER(attr)` is invalid, so guard the usage of `serial_set_color()`. if (pair < 0 || pair >= COLOR_PAIRS || !fg || !bg) return ERR; Note, building with x86_64-linux-gnu-gcc-10 (Debian 10.2.1-6) 10.2.1 20210110 does *not* fail. Change-Id: Ic63e34f2b5bc9f826db37597bebc6b20542481d7 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51914 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-07-13util/kconfig: Uprev to Linux 5.13's kconfigPatrick Georgi
This was originally several commits that had to be squashed into one because the intermediate states weren't able to build coreboot: - one to remove everything that wasn't our own code, leaving only regex.[ch], toada.c, description.md and Makefile.inc. - one to copy in Linux 5.13's scripts/kconfig and adapt Makefile.inc to make the original Makefile work again. - adapt abuild to use olddefconfig, simplifying matters. - apply patches in util/kconfig/patches. - Some more adaptations to the libpayload build system. The patches are now in util/kconfig/patches/, reverse applying them should lead to a util/kconfig/ tree that contains exactly the Linux version + our own 5 files. Change-Id: Ia0e8fe4e9022b278f34ab113a433ef4d45e5c355 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37152 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-06-18nvs: Add Chrome OS NVS (CNVS) information to coreboot tablesFurquan Shaikh
CB:51638 separated Chrome OS NVS from global NVS by allocating it separately in CBMEM. CNVS is used in depthcharge to fill firmware information at boot time. Thus, location of CNVS needs to be shared in coreboot tables for depthcharge to use. This change adds a new coreboot table tag `CB_TAG_ACPI_CNVS`/`CB_TAG_ACPI_CNVS`(0x41) which provides the location of CNVS in CBMEM to payload (depthcharge). Additionally, CB:51639 refactored device nvs(DNVS) and moved it to the end of GNVS instead of the fixed offset 0x1000. DNVS is used on older Intel platforms like baytrail, braswell and broadwell and depthcharge fills this at boot time as well. Since DNVS is no longer used on any new platforms, this information is not passed in coreboot tables. Instead depthcharge is being updated to use statically defined offsets for DNVS. BUG=b:191324611, b:191324611 TEST=Verified that `crossystem fwid` which reads fwid information from CNVS is reported correctly on brya. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I3815d5ecb5f0b534ead61836c2d275083e397ff0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55665 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-18includes: Move *abs() declarations into `stdlib.h`Nico Huber
Change-Id: Id4df2d3210735bee737353d293450e59cf93bd9a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55593 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-18includes: Remove dangling doxygen @}Nico Huber
Change-Id: I05e02f9689c1a6dafb3943657a3db975c2aeacbe Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55592 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-18includes: Define `CHAR_BIT` in `limits.h`Nico Huber
Change-Id: Ib1d80d0c7457f90596ef5cd9d5ad0c4a33c8d473 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55591 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 00:34:16 +0000