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2012-06-21libpayload: Correct interchanged parameters in OHCI driverNico Huber
In ohci_private.h some invocations of a MASK macro were called with its parameters interchanged. This fixes it with the hope not to break anything nasty. Change-Id: I56cb483b208442b497dbd32ce993cc53d1fba1e5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1122 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-21libpayload: Detach unresponsive usb mass storage devicesNico Huber
This enables logical detachment of unresponsive usb devices (i.e. devices not responding to control transfers) in the usb mass storage driver. Without the detection of unresponsive devices we wait way too long for the device to become ready. Change-Id: I8b8cf327f49dde25afaca4d3066f16ea86b99d3d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1121 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-21libpayload: Add dummy queue heads to EHCI interrupt frame listNico Huber
This introduces a dummy queue head in the interrupt frame list of the EHCI host controller. It's a workaround for broken controllers which follow pointers from this list even if the terminate bit is set. Fortunately, they do honor the bit in queue heads and having an empty QH in the list doesn't violate the standard. The linux kernel has a similar workaround for AMD SB700, SB800, and Hudson-2/3 platforms. We observed this bug with an AMD SB600. Change-Id: Ibbb66dea5fddc89c7995a24d746bedf6bfa887be Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1124 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-06-21libpayload: Add interrupt-queue underrun recovery to EHCINico Huber
If the queue of an interrupt transfer runs out, we have to reset the queue head. This also introduces the use of a spare transfer descriptor (TD) in interrupt queues, which assures, that a processed TD won't be reused until the host controller has written it back from his overlay. Change-Id: Id0eeb2808b77f1c187f164eb34bd66f8f399938b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1123 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-06-21libpayload: Adjust timeout in EHCI driverNico Huber
Tested with a bunch of usb flash sticks. The slowest non-TUR (test unit ready) turn around took about 1.3s, so this commit increases the timeout to 2s. Change-Id: Iec64b5cc48d51912b2bdeeebb5885399a71311b2 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1120 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-21libpayload: reg_base reading for USB EHCI driverAnton Kochkov
Added reading registers base address for USB EHCI driver in ehci_init() function. Change-Id: I59443ca9823588d70822b4f14486caf217a5ac26 Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/1106 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-20libpayload: Better error detection in USB mass storageNico Huber
This implements status transport (CSW) more closely to the standard (usbmassbulk_10). Change-Id: Ife516316e054d4e87ebe698dc487eeb9ebcfd38d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1072 Reviewed-by: Peter Stuge <peter@stuge.se> Tested-by: build bot (Jenkins)
2012-06-20libpayload: Fix detach_contoller in the USB driverAnton Kochkov
Fixed usb controllers linked list walking in detach_controller() function Change-Id: Ia97c7ec814f75d2b1bfe185f160fb4cd32aa6fdb Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/1105 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.huber@secunet.com>
2012-06-09libpayload: Add timeouts in the UHCI USB driverNico Huber
We should always have some timeout when we wait for the hardware. This adds missing timeouts to the UHCI driver. Change-Id: Ic37b95ce12ff3ff5efe3e7ca346090946f6ee7de Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1073 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-09libpayload: Fix an integer overflow in USB mass storageNico Huber
Change-Id: I3d618497016478ea727c520e866d27dbc3ebf9af Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1070 Reviewed-by: Mathias Krause <minipli@googlemail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-08libpayload: Add timeouts in the EHCI USB driverNico Huber
We should always have some timeout when we wait for the hardware. This adds missing timeouts to the EHCI driver. Change-Id: I13ba532a6daf47510b16b8fdbe572a21f1d8b09c Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1077 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-07libpayload: Add timeouts in the OHCI USB driverNico Huber
We should always have some timeout when we wait for the hardware. This adds missing timeouts and a more standard compliant port reset to the OHCI driver. Change-Id: I2cfcb1039fd12f291e88dcb8b74d41cb5bb2315e Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1076 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-07libpayload: Remove orphaned delay from OHCI USB driverNico Huber
This removes a synthetic delay of 5ms from every OHCI USB command. A delay here seems to be of no use and first tests have shown no glitches. Change-Id: Ie72b2d49e6734345708f04f3f7b86bacc7926108 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1075 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-07libpayload: Add support for interrupt transfers in EHCINico Huber
This adds support for usb interrupt transfers in the EHCI driver. Split transactions are supported, so this enables support for HID keyboards devices over hubs in high-speed mode. Change-Id: I9eb08f12b12c67ece10814952cb8651278b02f9d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1083 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-07libpayload: Free intr queue structure in usb_hid_destroyNico Huber
The call to destroy_intr_queue was missing in usb_hid_destroy. Change-Id: I51ccc6a79bc005819317263be24a56c51acd5f55 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1082 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-07libpayload: Add support for split transactions in EHCINico Huber
With split transactions, the EHCI host controller can handle full- and low-speed devices on hubs in high-speed mode. This adds support for split transactions for control and bulk transfers. Change-Id: I30fa1ce25757f33b1e6ed34207949c9255f05d49 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1081 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-07libpayload: Bring USB hub driver to a working stateNico Huber
This adds proper device attachment and detachment detection and port enable- ment to the USB hub driver. Support for split transactions is still missing, so this works only with USB2.0 devices on hubs in USB2.0 mode and USB1.1 devices on hubs in USB1.1 mode. Change-Id: I80bf03f3117116a60382b87a4f84366370649915 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1080 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-01libpayload: Remove orphaned delay from USB mass storageNico Huber
This removes a synthetic delay of 10ms from every mass storage command. A delay here seems to be of no use and first tests have only shown a huge speed increase. Change-Id: Ida7423229373ec521d4326c5467a3f518b76149c Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1071 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-01libpayload: Disable some buggy debugging codeNico Huber
This disables some debugging code in the OHCI USB driver which causes reboots under rare circumstances. Change-Id: Ic274c162846137ee00638ffbc59ccf1d8130586f Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1074 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-01libpayload: fix OHCI IN commandsMathias Krause
Due to operator precedence incomming USB commands were missing some flags. Change-Id: I87ef51590c9db7a6cbc7304e1ccac29895f8a51e Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/1084 Reviewed-by: Mathias Krause <minipli@googlemail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-01libpayload: fix UHCI timeoutMathias Krause
UHCI commands should have a timeout of 30ms, not 30s! Change-Id: Iebcf338317164eb1e683e1de850ffab5022ca3a1 Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/1085 Reviewed-by: Mathias Krause <minipli@googlemail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-01libpayload: Correct port power settings for EHCI root hubNico Huber
Enable power on EHCI root hub ports only if the controller supports it. Wait 20ms for the power to become stable. Change-Id: I8897756ed2bfcb88408fe5e9f9e3f8af5dd900ac Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1078 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-01libpayload: Add clear_feature() function to USB frameworkNico Huber
This function will be used by the USB hub driver. Change-Id: I4d1d2e94f4442cbb636ae989e8ffd543181c4357 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1079 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-05-31libpayload: Fix b0b4a52b70f0d7c09241f0f718a179fc55d85179Nico Huber
The removal of bitfields came with some glitches in the UHCI driver. This fixes it. Change-Id: Iba8ea3b56b03c526eca7b6388c019568e00be6f5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1069 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-05-09Update SeaBIOS URLPatrick Georgi
We have a http accessible SeaBIOS mirror at review.coreboot.org. Use it. Change-Id: Icce8e4f9ca1fa69966c82423b2b27057f15b30d2 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1020 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-04-29Update SeaBIOS stable to the version 1.7.0 tag.Marc Jones
Change-Id: Id3a2dd29e07ed11755468e89f8e80efdef5e2b2f Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/954 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-04-04libpayload: avoid excessive casts in printf.cMathias Krause
struct printf_spec is a purely internal structure. Avoid excessive casts when using the write function pointer just to make the compiler happy by using the right types in the first place. Change-Id: Ia4f3c79a5283cb76c8aa5f9d1eee758676303382 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: http://review.coreboot.org/850 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-04-04libpayload: minor cleanupsMathias Krause
Apply some const correctness to const/non-const strings in libc and libpci (what an ugly cast that was). Remove duplicated NULL test in printf_putstr(), already done in print_string() - reduces size of libpayload by a few bytes. Change-Id: I13f479df13e39d79cab291e9d99d153e1ef43eae Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: http://review.coreboot.org/849 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-03-31Make libpayload parse the coreboot tables before setting up the consolesGabe Black
At least one of the console drivers, coreboot fb, uses information in the sysinfo structure to set itself up. If that structure hasn't been populated, the driver decides that there is no framebuffer and disables itself. Reversing the order these are set up fixes that problem. Change-Id: Idd8b5518980dfdd82fd4359dd0133ab7736fc428 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://review.coreboot.org/816 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-03-21Fix libpayload alloc() size and gcc pointer optimization problems.Marc Jones
The previous commit was incomplete and missed setting the entire alloc area. There are also additional problems with gcc optimizations of the pointer math. The "auto" casting by gcc wouldn't return warnings, but it was causing the optimization to be incorrect. We are now very explicit in the casting in the pointer math. Change-Id: I020808c8d1dda544fe862b9efb0e5345eeab5aab Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/804 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-03-10Make libpayload alloc() memory pointers volatileMarc Jones
gcc4.6.2 was optimizing the libpayload alloc() function and failing to reload a pointer after the memory had been manipulated by a pointer in the inlined function setup(). Change the pointer type to volatile and now pass it to the setup() function. Also clean up the declaration so that it isn't cast a bunch times in the function. Change-Id: I1637bd7bd5d9cf82ac88925cbfe76d319aa3cd82 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/705 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-29tint requires more heap space for PDCurses.Marc Jones
tint was failing with the message "initscr(): Unable to create curscr." tint uses the initscr() to enable vga windows, which allocates more heap space with PDCurses than with tinycurses. Expanding the heap from 16KB to 64KB resolves the issue. Change-Id: I1d38651e2b77f55613969c29614fb3b2be38a00c Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/687 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-20libpayload: fix compile error with enabled USB_DEBUGMathias Krause
Commit c4348d0 ("libpayload: Remove bitfield use from OHCI data structures") missed to adapt a debug message. This patch fixes this. Change-Id: I5f6a4be9c7f6f99cb103926772717e15a3cbca70 Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/653 Tested-by: build bot (Jenkins) Reviewed-by: Bernhard Urban <lewurm@gmail.com> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-17libpayload: enforce const correctness for CMOS getter/setterMathias Krause
Input only arguments to {get,set}_option*() should be const to catch programming errors early. Change-Id: I560001a8e9226dfd156a4e529fcad20549236ebd Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/652 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17libpayload: fix compiler warning for first_cmos_entry()Mathias Krause
The 'name' argument to lookup_cmos_entry() is declared to be 'char *' but we pass an empty string ("") which is 'const char[]' so the compiler legitimatly warns about discarded qualifiers here. Fix this by passing NULL as 'name'. Minor nitpick: The NULL test in lookup_cmos_entry() is superfluous as our implementation of strnlen() can handle NULL pointers gracefully. But for an average C hacker it just doesn't feel right not to do so. Change-Id: I592917d12d8fa840804c0d19e38b844427064fef Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/651 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-13libpayload: code cosmeticsMathias Krause
Be consistend with coding style at least within a function -- don't mix sizeof with plain values. Change-Id: Iefb5b7fe4f54977f5505fc9cea65c9c4af3e7f3a Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/617 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-10libpayload: fix possible mem leak in get_option_as_string()Mathias Krause
Change-Id: I7c3adbd1b72be81585bbaabb42532fc4cad57f58 Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/616 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-07libpayload: Remove workaround for bitfield management in EHCI driverPatrick Georgi
We don't use bitfields anymore. Change-Id: I25ceec2024f659612871bcfe5f98df3a10789055 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/595 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-07libpayload: Force checking all EHCI ports on power-onPatrick Georgi
EHCI port status reporting isn't very consistent on power-on, so just looking for devices on all ports is the safest way to find everything. Change-Id: I26b4305016f0bed1d2c1b5cffc59d5813fa1cbbb Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/594 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-07Move SeaBIOS output out of coreboot source treeStefan Reinauer
Make sure SeaBIOS build files live under $(OUT) instead of in the source tree. Change-Id: I7d357773e32bc25ba7e7eae3fb6ddc31feb413ec Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/552 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-07libpayload: Fix EHCI driverPatrick Georgi
When converting EHCI to not use bitfields, two offsets were converted incorrectly. Change-Id: I0bb4bad0eee42e54ad4fd53d6c35b107e227c41a Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/593 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-03libpayload: Add iterators for CMOS variablesPatrick Georgi
Provide functions that pick the first CMOS variable defined in the cmos layout, and from there, the next one. Change-Id: Ie98146de7f6273089fc6fc0b232a4b94337cf8a3 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/587 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-03libpayload: Expose options_checksum_validPatrick Georgi
options_checksum_valid can be used as a fast test to identify invalid CMOS data by checking the checksum. Change-Id: I44635d4c5d389579ad82435907ba8658e1bd44bb Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/586 Reviewed-by: Bernhard Urban <lewurm@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-03libpayload: Provide interpretation of CMOS data structuresPatrick Georgi
Add new functions that allow using string based key/value access to CMOS, including support for enums. Change-Id: Ibe238eff4c5230e5f61004c88221cd34393873aa Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/585 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-02libpayload: Add access to CMOS images in memory spacePatrick Georgi
Provide access to CMOS images in RAM or CBFS, such as cmos.defaults Change-Id: Ifa70dea6206d94c0c271caf9ae1152fc76b5d51a Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/584 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-02libpayload: Refactor highlevel CMOS accessPatrick Georgi
This will allow using libpayload functions to access CMOS data in template files in RAM or CBFS. Change-Id: I323ed625e657cbdc1fae8c279a82ee578e83ad00 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/583 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-26libpayload: Allow using CBFS functions on images in RAMPatrick Georgi
Two new functions allow switching the CBFS functions from using RAM or ROM, with ROM as default. Change-Id: I04d67ad622d25c5728ae9a63f5b8a3dc9bbacce6 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/550 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-18libpayload: style: compare null-pointers with NULL, not 0Patrick Georgi
Change-Id: I5efbfb75e2894bc8d8e50c8737cfee9738d15eda Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/551 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-10libpayload: Remove bitfield use from EHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: If4c4cb748af340e2721b89fea8e035da0632971f Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/480 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-10libpayload: Remove bitfield use from UHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: I1b2bcda28c52ad10bbe9429e04d126b555f7828a Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/478 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-10libpayload: Remove bitfield use from OHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: Ic04f151091c359912835b8b3db488d2d41bd4bbb Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/479 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-07Eliminate magic numbersPhilip Prindeville
Use sizeof() on vendor and part# rather than explicit memory length. Change-Id: I2b7e0e4a8df6448d027cc61867382f161eb990d3 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/504 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-07Cleanup access to vendor/part # infoPhilip Prindeville
Instead of macros to access MAINBOARD record, use convenience functions. Store pointers to MAINBOARD and HEADER for use outside of CB code. Change-Id: I074e3a0df7d25726cbd942538bfdc5a63dd17e12 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/502 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24libpayload: remove uhci_reg_maskXPatrick Georgi
Not that good an idea to start with. Coccinelle patch: @@ @@ -void ( -uhci_reg_mask8 | -uhci_reg_mask16 | -uhci_reg_mask32 ) - (...) { ... } @@ @@ -void ( -uhci_reg_mask8 | -uhci_reg_mask16 | -uhci_reg_mask32 ) - (...); @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask32 (ctrl, reg, ~0, ormask) +uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) | ormask) @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask16 (ctrl, reg, ~0, ormask) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) | ormask) @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask8 (ctrl, reg, ~0, ormask) +uhci_reg_write8 (ctrl, reg, uhci_reg_read8 (ctrl, reg) | ormask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask32 (ctrl, reg, andmask, 0) +uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) & andmask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask16 (ctrl, reg, andmask, 0) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask16 (ctrl, reg, andmask, 0) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask) Change-Id: Id0eb8327293831e54249d43fd06d50963c793699 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/477 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-12-24Let lib_get_sysinfo() pass through the success of get_coreboot_info()Philip Prindeville
The return status of get_coreboot_info() might be handy to a platform driver calling lib_get_sysinfo() to test for the presence of coreboot. Change-Id: I0176c93ee92c9dff733112026ee50f2ca797bdff Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/503 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Fix missing cast back to void *Philip Prindeville
MEM_RANGE_PTR() also needs to return a pointer to untyped memory. Change-Id: I0ec64ad7bdb136d5e1a999bff3df6fa66eb29bf1 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/500 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Fix missing VM mappingPhilip Prindeville
When processing FORWARD records, we weren't accounting for the pointer being in the physical address space and not the virtual space instead. Change-Id: I35ef637fbec7886d4cfeac5fd650a17eae8d555a Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/499 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Use void pointers for untyped memoryPhilip Prindeville
To avoid unnecessary casts, we can use untyped pointers when accessing individual records. Change-Id: I1d628d6e25f1e53b4fee34e7c2c4688a789c45a3 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/498 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Use convenience function to checksumPhilip Prindeville
That coreboot uses the IP checksum is an artifact, not a deliberate requirement to be compatible with the Internet Protocole suite. Use a wrapper to abstract the computation of coreboot's checksum. Change-Id: I6491b9ba5efb9ffe5cb12a6172653a6ac80a1370 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/497 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Replace UNPACK_CB64 macro with inlinePhilip Prindeville
Having submitted a module based on coreboot to LKML for acceptance, it was requested that fewer macros and more inlines be used (because of their superior type-checking when performing pointer casts, etc). This is the first of several changes to make the relevant parts of coreboot comply to linux code standards. Change-Id: Iffe7061fa62fa639e0cb6ccb9125eb3403d06b1a Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/495 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-21Respect linker orderChristian Ruppert
Linking fails when using -Wl,--as-needed and/or esp. when forcing --as-needed through a compiler specs file. A proper compile/link command would look like: $(CC) $(CFLAGS) $(LDFLAGS) -o foo $(OBJS) $(LIBS). So the *FLAGS must be passed *before* the objects while the libraries/dependencies must be passed *after* the objects. For more details see: http://www.gentoo.org/proj/en/qa/asneeded.xml Change-Id: I5a5b05e1cab8a2d88ce56c92d9b2f991ca1ee6c0 Signed-off-by: Christian Ruppert <idl0r@qasl.de> Reviewed-on: http://review.coreboot.org/494 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-13libpayload: add set_option() functionPatrick Georgi
It allows to change CMOS values from payloads Change-Id: I4872fc27476923adafe13504126235b92b30de85 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/445 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-12-02Mirror Fix coreinfo usage of cb_infoQingPei Wang
fix cb_info.serial.ioport to cb_info.serial.baseaddr Change-Id: I32f261e4be927555979eb833d0251fce2c6a5c47 Signed-off-by: QingPei Wang <wangqingpei@gmail.com> Reviewed-on: http://review.coreboot.org/441 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-11libpayload: Enable colors in PDcursesPatrick Georgi
PDcurses wants set_blink to determine color count. Not exactly obvious. Change-Id: I8b2a32f0095d5900fa7e01f04f3f1d565dc2bedf Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/432 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-10libpayload: Fix handling of CAPS LOCK key on PS/2 keyboardsPatrick Georgi
The PS/2 keyboard driver set and reset the caps LED to show the keyboard status. Unfortunately, that configuration happens over the same path used to transmit keypresses. In face of certain error conditions, the keyboard stopped working. This change makes keyboard handling more robust. Change-Id: I0489a9983ea7dab00357220e09398dd1a8538839 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/430 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-04libpayload: Implement usb_exitPatrick Georgi
So far it was empty and never published. It now exists and shuts down all controllers (esp. EHCI which resets the port routers). Change-Id: I81e355e8a05778d6397675417b085a094a6f48ee Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/397 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-04libpayload: Tell EHCI to re-enable USB1 controllersPatrick Georgi
EHCI can take over all ports (and then reroute devices to companion controllers if needs be). We do that, and then never reset it. Consequence: Systems with only USB1 HC drivers (OHCI/UHCI) never see any devices. Change-Id: If1d91e9142a6618289b0b3f6b56587ec857158e3 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/396 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2011-11-04libpayload: Drop usb_fatal()Patrick Georgi
We have fatal(), which is just as good. Coccinelle script: @@ expression E; @@ -usb_fatal(E) +fatal(E) Change-Id: Iabecbcc7d068cc0f82687bf51d89c2626642cd86 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/395 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2011-11-03libpayload: Reduce verbosity in USB stackMathias Krause
The USB stack is pretty noisy. Reduce the output to a sane level. Change-Id: I250949e5cf74a8c6d43822b2e7487143b2ae1c65 Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/393 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-03libpayload: Put coreboot version into lib_sysinfoMathias Krause
Change-Id: I22319efe90e475c66b9556f734a7a5e54f7c59bc Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/394 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-02don't scan beyond end of CBFSFlorian Zumbiehl
Change-Id: I66e535f77e513dbfa5fc906ecf288193af78ae62 Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/369 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-01libpayload: remove trailing whitespace and run dos2unixStefan Reinauer
Change-Id: Iffed3602456f5306711c65f06c873c58d4086e11 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/363 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-01libpayload: Fix OHCI some morePatrick Georgi
OHCI works when USB_DEBUG is disabled, but not, when disabled. This is because the controller requires some more time after a schedule has finished. Also improve compliance with the OHCI spec. Change-Id: I4685cc485ff9c52b489fbaa352ab889671cff876 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/365 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-31Run dos2unix on bayou and remove white space at the end of lines.Stefan Reinauer
Change-Id: If13d9a49ece2699885ae3e998173d3d44507b302 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/362 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-27Fix libpayload speaker driverStefan Reinauer
The frequency for the PC speaker has to be specified as 1193180 / frequency according to http://wiki.osdev.org/PC_Speaker Change-Id: Iaca9d45807e080efe834611e719b350680b5fb90 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/337 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-23FILO: Pass LIBCONFIG_PATH variable to FILOs makeThomas Gstädtner
This fixes the build for HEAD/master. Current stable will not work, because it is too old for recent corboot. Change-Id: I9dfd5de472d4f58f07147cb9b9bb0b543f228561 Signed-off-by: Thomas Gstädtner <thomas@gstaedtner.net> Reviewed-on: http://review.coreboot.org/311 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-22Fix CMOS checksum calculation in libpayload.Stefan Reinauer
Change-Id: I64ea53fa098fbcfc76e0ebd5f049a2ee3d0a1024 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/314 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-21Extend coreboot table entry for serial portsStefan Reinauer
Add information about memory mapped/io mapped base addresses. and fix up libpayload to use the same structures Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb Reviewed-on: http://review.coreboot.org/261 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-21FILO: Change FILO Makefile.inc from SVN to GITThomas Gstädtner
This commit replaces the old svn checkout code for the external FILO payload with a git checkout for the new repo on gerrit. The stable checkout is implemented similarly to the former SVN variant, it checks out a specific commit (same commit as svn r136 which was checked out before). The HEAD checkout gets the master branch from http://review.coreboot.org/p/filo.git In future this should probably be changed to a stable tag or repo. It is necessary to remove the old svn checkout by hand (or run distclean), because I did not include code to remove an existing svn FILO checkout. Change-Id: I08a703f3428ae7b987f7079a4901be4cf6d7e505 Signed-off-by: Thomas Gstädtner <thomas@gstaedtner.net> Reviewed-on: http://review.coreboot.org/308 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-21libpayload: fix bulk transfers on OHCI controllersPatrick Georgi
Time for the brown paper bag: OHCI controllers are not happy when told to send data, but with obviously wrong addresses. It helps to write the addresses into the data structures. Change-Id: Ic0967dc8939e64af119cfb89400a045a2c077171 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/306 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-13Update "STABLE" SeaBIOS selection to release 1.6.3Stefan Reinauer
1.6.3 has a lot of benefits over the previous version, the two most important being: - working AHCI support - compiles with gcc 4.6.x Change-Id: Ie3a4d8f2624e0aa85e48ca09da53474c085838db Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/253 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-11Don't do a call as the first instruction in libpayload.Marc Jones
Doing a call before the payload has set up its stack is risky. The stack may not be in a favorable location. Normally this is not an issue with coreboot or other well behaved callers. Change-Id: Ie6f6748a471324b29ebad045c807dfc9f4b92034 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/240 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-09-14libpayload: Add get_option_from()Patrick Georgi
This function allows reading the nvram configuration table from locations other than the cbtable. Change-Id: I56c9973a9ea45ad7bf0185b70d11c9ce5d0e0e1b Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/213 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-08-18libpayload: export get_cbfs_header()Patrick Georgi
Keep in sync with coreboot's version. Change-Id: I8a253446bd3b2ce9d05c6076a3f49f0260ecd5f9 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/158 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-08-17libpayload: Some more compatibility (for flashrom)Patrick Georgi
libpci defines an arbitrary set of PCI vendor IDs, flashrom uses the Intel definition. Add it. flashrom also requires inttypes.h, so add the OpenBSD version Change-Id: I9bffd8193f635c375ac4d6b6eae8d3d876b95f5f Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/154 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-08-16libpayload: EHCI registers are volatilePatrick Georgi
Some gcc versions seem to honor volatile at different places in a struct declaration. Change-Id: I0df2a3fb2eff4cee8cc1b8ac15d9cd9b86178752 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/155 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-08-04libpayload: Add liblzma, libcbfsPatrick Georgi
Add cbfs core from coreboot into libpayload, and to support lzma decode, add coreboot's lzma code, too. Carl-Daniel agreed to relicense the lzmadecode wrapper as BSD-l, solving licensing problems. Change-Id: Id28990fe7e951d99447e265a4880d70a8f208dd2 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/115 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-08-04libpayload: Add PDCurses and ncurses' libform/libmenuPatrick Georgi
PDCurses provides an alternative implementation of the curses library standard in addition to tinycurses. Where tinycurses is really tiny, PDCurses is more complete and provides virtually unlimited windows and the full API. The PDCurses code is brought in "vanilla", with all local changes residing in curses/pdcurses-backend/ In addition to a curses library, this change also provides libpanel (as part of the PDCurses code), and libform and libmenu which were derived from ncurses-5.9. As they rely on ncurses internals (and PDCurses is not ncurses), more changes were required for these libraries to work. The build system is extended to install the right set of header files depending on the selected curses implementation. Change-Id: I9e5b920f94b6510da01da2f656196a993170d1c5 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/106 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-07-21Libpayload: default DESTDIR for 'make install'Tadas Slotkus
If you would try download FILO via svn, then you probably get error message about libpayload install. This enables manually installing libpayload in legacy style :) Change-Id: I9f52be939303c5913611f21477d681e11d286382 Signed-off-by: Tadas Slotkus <devtadas@gmail.com> Reviewed-on: http://review.coreboot.org/102 Tested-by: build bot (Jenkins) Reviewed-by: Frank Vibrans III <frank.vibrans@amd.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-07-20libpayload: Provide dummy getenv()Patrick Georgi
Change-Id: I419fcb16e0b10dee9195072e0e6befa6c9e61a69 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/105 Tested-by: build bot (Jenkins) Reviewed-by: Frank Vibrans III <frank.vibrans@amd.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-17port_enable and port_reset must change atomically.Steven A. Falco
I have observed two separate EHCI host bridges that do not tolerate using C bit-fields to directly manipulate the portsc_t register. The reason for this is that the EHCI spec says that port_enable must go to 0 at the time that port_reset goes to 1. Naturally this cannot be done using direct bit-field manipulation. Instead, we use a temporary variable, change the bit-fields there, then atomically write the new value back to the hardware. Signed-off-by: Steven A. Falco <sfalco@coincident.com> Change-Id: If138faee43e0293efa203b86f7893fdf1e811269 Reviewed-on: http://review.coreboot.org/101 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-07-16libpayload: Improve compatibilityPatrick Georgi
Define INT_MAX, EOF and make sure size_t is available. Change-Id: I1b4b717d2545ea8312ec52339300307a5bd68f8a Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/104 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-14Print a warning when an unknow USB controller type is detected.Steven A. Falco
The Intel E6XX Atom processor reports an unknown USB controller type (in addition to the standard EHCI and OHCI ones). Add a default case to print a warning when an unknown controller type is detected. Change-Id: I885d0ccec4c46fd212cceac599290e9bf85edbbb Signed-off-by: Steven A. Falco <sfalco@coincident.com> Reviewed-on: http://review.coreboot.org/100 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-07-14EHCI driver missing bus_address assignment.Steven A. Falco
Other USB drivers set the bus_address field. EHCI should do this too. Signed-off-by: Steven A. Falco <sfalco@coincident.com> Change-Id: Ic4274c6744951ef7fa0cb135caf8b9f177d8bcaf Reviewed-on: http://review.coreboot.org/99 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2011-07-11libpayload: Add qsort()Patrick Georgi
It's taken from OpenBSD and thus appropriately licensed (and reasonably tested). Change-Id: I5767600c9865d39e56c220b52e045f3501875b98 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/88 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07libpayload: Don't declare mouse support in tinycursesPatrick Georgi
Change-Id: Id1ff3d85617e3ec063ce332cf13920dfbbb7cf26 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/87 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07libpayload: Provide atol(), malloc.hPatrick Georgi
Change-Id: I807ca061115146a6851eef481eb881b279fba8e1 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/86 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07libpayload: Implement strlcpyPatrick Georgi
Change-Id: Ibd339957690afe2cded46895c3088eba87f0ffd1 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/85 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07libpayload: fix wborder()Patrick Georgi
wborder didn't provide default characters to draw a border. Change-Id: Ib746ed16be341598fd9fa1f1b7577606d1abd9e5 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/84 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07Run 'git fetch' in SeaBIOS only when really neededCristian Măgherușan-Stanciu
This allows coreboot to compile without Internet connectivity Change-Id: I969471e44e417f127fdc8744e868211500acee3e Signed-off-by: Cristian Măgherușan-Stanciu <cristi.magherusan@gmail.com> Reviewed-on: http://review.coreboot.org/11 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-02 10:40:06 +0000