summaryrefslogtreecommitdiff
path: root/payloads
AgeCommit message (Collapse)Author
2012-02-03libpayload: Add iterators for CMOS variablesPatrick Georgi
Provide functions that pick the first CMOS variable defined in the cmos layout, and from there, the next one. Change-Id: Ie98146de7f6273089fc6fc0b232a4b94337cf8a3 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/587 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-03libpayload: Expose options_checksum_validPatrick Georgi
options_checksum_valid can be used as a fast test to identify invalid CMOS data by checking the checksum. Change-Id: I44635d4c5d389579ad82435907ba8658e1bd44bb Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/586 Reviewed-by: Bernhard Urban <lewurm@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-03libpayload: Provide interpretation of CMOS data structuresPatrick Georgi
Add new functions that allow using string based key/value access to CMOS, including support for enums. Change-Id: Ibe238eff4c5230e5f61004c88221cd34393873aa Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/585 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-02libpayload: Add access to CMOS images in memory spacePatrick Georgi
Provide access to CMOS images in RAM or CBFS, such as cmos.defaults Change-Id: Ifa70dea6206d94c0c271caf9ae1152fc76b5d51a Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/584 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-02-02libpayload: Refactor highlevel CMOS accessPatrick Georgi
This will allow using libpayload functions to access CMOS data in template files in RAM or CBFS. Change-Id: I323ed625e657cbdc1fae8c279a82ee578e83ad00 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/583 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-26libpayload: Allow using CBFS functions on images in RAMPatrick Georgi
Two new functions allow switching the CBFS functions from using RAM or ROM, with ROM as default. Change-Id: I04d67ad622d25c5728ae9a63f5b8a3dc9bbacce6 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/550 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-18libpayload: style: compare null-pointers with NULL, not 0Patrick Georgi
Change-Id: I5efbfb75e2894bc8d8e50c8737cfee9738d15eda Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/551 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-10libpayload: Remove bitfield use from EHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: If4c4cb748af340e2721b89fea8e035da0632971f Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/480 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-10libpayload: Remove bitfield use from UHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: I1b2bcda28c52ad10bbe9429e04d126b555f7828a Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/478 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-10libpayload: Remove bitfield use from OHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: Ic04f151091c359912835b8b3db488d2d41bd4bbb Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/479 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-07Eliminate magic numbersPhilip Prindeville
Use sizeof() on vendor and part# rather than explicit memory length. Change-Id: I2b7e0e4a8df6448d027cc61867382f161eb990d3 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/504 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-07Cleanup access to vendor/part # infoPhilip Prindeville
Instead of macros to access MAINBOARD record, use convenience functions. Store pointers to MAINBOARD and HEADER for use outside of CB code. Change-Id: I074e3a0df7d25726cbd942538bfdc5a63dd17e12 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/502 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24libpayload: remove uhci_reg_maskXPatrick Georgi
Not that good an idea to start with. Coccinelle patch: @@ @@ -void ( -uhci_reg_mask8 | -uhci_reg_mask16 | -uhci_reg_mask32 ) - (...) { ... } @@ @@ -void ( -uhci_reg_mask8 | -uhci_reg_mask16 | -uhci_reg_mask32 ) - (...); @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask32 (ctrl, reg, ~0, ormask) +uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) | ormask) @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask16 (ctrl, reg, ~0, ormask) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) | ormask) @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask8 (ctrl, reg, ~0, ormask) +uhci_reg_write8 (ctrl, reg, uhci_reg_read8 (ctrl, reg) | ormask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask32 (ctrl, reg, andmask, 0) +uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) & andmask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask16 (ctrl, reg, andmask, 0) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask16 (ctrl, reg, andmask, 0) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask) Change-Id: Id0eb8327293831e54249d43fd06d50963c793699 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/477 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-12-24Let lib_get_sysinfo() pass through the success of get_coreboot_info()Philip Prindeville
The return status of get_coreboot_info() might be handy to a platform driver calling lib_get_sysinfo() to test for the presence of coreboot. Change-Id: I0176c93ee92c9dff733112026ee50f2ca797bdff Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/503 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Fix missing cast back to void *Philip Prindeville
MEM_RANGE_PTR() also needs to return a pointer to untyped memory. Change-Id: I0ec64ad7bdb136d5e1a999bff3df6fa66eb29bf1 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/500 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Fix missing VM mappingPhilip Prindeville
When processing FORWARD records, we weren't accounting for the pointer being in the physical address space and not the virtual space instead. Change-Id: I35ef637fbec7886d4cfeac5fd650a17eae8d555a Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/499 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Use void pointers for untyped memoryPhilip Prindeville
To avoid unnecessary casts, we can use untyped pointers when accessing individual records. Change-Id: I1d628d6e25f1e53b4fee34e7c2c4688a789c45a3 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/498 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Use convenience function to checksumPhilip Prindeville
That coreboot uses the IP checksum is an artifact, not a deliberate requirement to be compatible with the Internet Protocole suite. Use a wrapper to abstract the computation of coreboot's checksum. Change-Id: I6491b9ba5efb9ffe5cb12a6172653a6ac80a1370 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/497 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Replace UNPACK_CB64 macro with inlinePhilip Prindeville
Having submitted a module based on coreboot to LKML for acceptance, it was requested that fewer macros and more inlines be used (because of their superior type-checking when performing pointer casts, etc). This is the first of several changes to make the relevant parts of coreboot comply to linux code standards. Change-Id: Iffe7061fa62fa639e0cb6ccb9125eb3403d06b1a Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/495 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-21Respect linker orderChristian Ruppert
Linking fails when using -Wl,--as-needed and/or esp. when forcing --as-needed through a compiler specs file. A proper compile/link command would look like: $(CC) $(CFLAGS) $(LDFLAGS) -o foo $(OBJS) $(LIBS). So the *FLAGS must be passed *before* the objects while the libraries/dependencies must be passed *after* the objects. For more details see: http://www.gentoo.org/proj/en/qa/asneeded.xml Change-Id: I5a5b05e1cab8a2d88ce56c92d9b2f991ca1ee6c0 Signed-off-by: Christian Ruppert <idl0r@qasl.de> Reviewed-on: http://review.coreboot.org/494 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-13libpayload: add set_option() functionPatrick Georgi
It allows to change CMOS values from payloads Change-Id: I4872fc27476923adafe13504126235b92b30de85 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/445 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-12-02Mirror Fix coreinfo usage of cb_infoQingPei Wang
fix cb_info.serial.ioport to cb_info.serial.baseaddr Change-Id: I32f261e4be927555979eb833d0251fce2c6a5c47 Signed-off-by: QingPei Wang <wangqingpei@gmail.com> Reviewed-on: http://review.coreboot.org/441 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-11libpayload: Enable colors in PDcursesPatrick Georgi
PDcurses wants set_blink to determine color count. Not exactly obvious. Change-Id: I8b2a32f0095d5900fa7e01f04f3f1d565dc2bedf Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/432 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-10libpayload: Fix handling of CAPS LOCK key on PS/2 keyboardsPatrick Georgi
The PS/2 keyboard driver set and reset the caps LED to show the keyboard status. Unfortunately, that configuration happens over the same path used to transmit keypresses. In face of certain error conditions, the keyboard stopped working. This change makes keyboard handling more robust. Change-Id: I0489a9983ea7dab00357220e09398dd1a8538839 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/430 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-04libpayload: Implement usb_exitPatrick Georgi
So far it was empty and never published. It now exists and shuts down all controllers (esp. EHCI which resets the port routers). Change-Id: I81e355e8a05778d6397675417b085a094a6f48ee Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/397 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-04libpayload: Tell EHCI to re-enable USB1 controllersPatrick Georgi
EHCI can take over all ports (and then reroute devices to companion controllers if needs be). We do that, and then never reset it. Consequence: Systems with only USB1 HC drivers (OHCI/UHCI) never see any devices. Change-Id: If1d91e9142a6618289b0b3f6b56587ec857158e3 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/396 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2011-11-04libpayload: Drop usb_fatal()Patrick Georgi
We have fatal(), which is just as good. Coccinelle script: @@ expression E; @@ -usb_fatal(E) +fatal(E) Change-Id: Iabecbcc7d068cc0f82687bf51d89c2626642cd86 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/395 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2011-11-03libpayload: Reduce verbosity in USB stackMathias Krause
The USB stack is pretty noisy. Reduce the output to a sane level. Change-Id: I250949e5cf74a8c6d43822b2e7487143b2ae1c65 Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/393 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-03libpayload: Put coreboot version into lib_sysinfoMathias Krause
Change-Id: I22319efe90e475c66b9556f734a7a5e54f7c59bc Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/394 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-02don't scan beyond end of CBFSFlorian Zumbiehl
Change-Id: I66e535f77e513dbfa5fc906ecf288193af78ae62 Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/369 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-01libpayload: remove trailing whitespace and run dos2unixStefan Reinauer
Change-Id: Iffed3602456f5306711c65f06c873c58d4086e11 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/363 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-01libpayload: Fix OHCI some morePatrick Georgi
OHCI works when USB_DEBUG is disabled, but not, when disabled. This is because the controller requires some more time after a schedule has finished. Also improve compliance with the OHCI spec. Change-Id: I4685cc485ff9c52b489fbaa352ab889671cff876 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/365 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-31Run dos2unix on bayou and remove white space at the end of lines.Stefan Reinauer
Change-Id: If13d9a49ece2699885ae3e998173d3d44507b302 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/362 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2011-10-27Fix libpayload speaker driverStefan Reinauer
The frequency for the PC speaker has to be specified as 1193180 / frequency according to http://wiki.osdev.org/PC_Speaker Change-Id: Iaca9d45807e080efe834611e719b350680b5fb90 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/337 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-23FILO: Pass LIBCONFIG_PATH variable to FILOs makeThomas Gstädtner
This fixes the build for HEAD/master. Current stable will not work, because it is too old for recent corboot. Change-Id: I9dfd5de472d4f58f07147cb9b9bb0b543f228561 Signed-off-by: Thomas Gstädtner <thomas@gstaedtner.net> Reviewed-on: http://review.coreboot.org/311 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-22Fix CMOS checksum calculation in libpayload.Stefan Reinauer
Change-Id: I64ea53fa098fbcfc76e0ebd5f049a2ee3d0a1024 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/314 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-21Extend coreboot table entry for serial portsStefan Reinauer
Add information about memory mapped/io mapped base addresses. and fix up libpayload to use the same structures Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb Reviewed-on: http://review.coreboot.org/261 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-21FILO: Change FILO Makefile.inc from SVN to GITThomas Gstädtner
This commit replaces the old svn checkout code for the external FILO payload with a git checkout for the new repo on gerrit. The stable checkout is implemented similarly to the former SVN variant, it checks out a specific commit (same commit as svn r136 which was checked out before). The HEAD checkout gets the master branch from http://review.coreboot.org/p/filo.git In future this should probably be changed to a stable tag or repo. It is necessary to remove the old svn checkout by hand (or run distclean), because I did not include code to remove an existing svn FILO checkout. Change-Id: I08a703f3428ae7b987f7079a4901be4cf6d7e505 Signed-off-by: Thomas Gstädtner <thomas@gstaedtner.net> Reviewed-on: http://review.coreboot.org/308 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-21libpayload: fix bulk transfers on OHCI controllersPatrick Georgi
Time for the brown paper bag: OHCI controllers are not happy when told to send data, but with obviously wrong addresses. It helps to write the addresses into the data structures. Change-Id: Ic0967dc8939e64af119cfb89400a045a2c077171 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/306 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-13Update "STABLE" SeaBIOS selection to release 1.6.3Stefan Reinauer
1.6.3 has a lot of benefits over the previous version, the two most important being: - working AHCI support - compiles with gcc 4.6.x Change-Id: Ie3a4d8f2624e0aa85e48ca09da53474c085838db Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/253 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-11Don't do a call as the first instruction in libpayload.Marc Jones
Doing a call before the payload has set up its stack is risky. The stack may not be in a favorable location. Normally this is not an issue with coreboot or other well behaved callers. Change-Id: Ie6f6748a471324b29ebad045c807dfc9f4b92034 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/240 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-09-14libpayload: Add get_option_from()Patrick Georgi
This function allows reading the nvram configuration table from locations other than the cbtable. Change-Id: I56c9973a9ea45ad7bf0185b70d11c9ce5d0e0e1b Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/213 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-08-18libpayload: export get_cbfs_header()Patrick Georgi
Keep in sync with coreboot's version. Change-Id: I8a253446bd3b2ce9d05c6076a3f49f0260ecd5f9 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/158 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-08-17libpayload: Some more compatibility (for flashrom)Patrick Georgi
libpci defines an arbitrary set of PCI vendor IDs, flashrom uses the Intel definition. Add it. flashrom also requires inttypes.h, so add the OpenBSD version Change-Id: I9bffd8193f635c375ac4d6b6eae8d3d876b95f5f Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/154 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-08-16libpayload: EHCI registers are volatilePatrick Georgi
Some gcc versions seem to honor volatile at different places in a struct declaration. Change-Id: I0df2a3fb2eff4cee8cc1b8ac15d9cd9b86178752 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/155 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-08-04libpayload: Add liblzma, libcbfsPatrick Georgi
Add cbfs core from coreboot into libpayload, and to support lzma decode, add coreboot's lzma code, too. Carl-Daniel agreed to relicense the lzmadecode wrapper as BSD-l, solving licensing problems. Change-Id: Id28990fe7e951d99447e265a4880d70a8f208dd2 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/115 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-08-04libpayload: Add PDCurses and ncurses' libform/libmenuPatrick Georgi
PDCurses provides an alternative implementation of the curses library standard in addition to tinycurses. Where tinycurses is really tiny, PDCurses is more complete and provides virtually unlimited windows and the full API. The PDCurses code is brought in "vanilla", with all local changes residing in curses/pdcurses-backend/ In addition to a curses library, this change also provides libpanel (as part of the PDCurses code), and libform and libmenu which were derived from ncurses-5.9. As they rely on ncurses internals (and PDCurses is not ncurses), more changes were required for these libraries to work. The build system is extended to install the right set of header files depending on the selected curses implementation. Change-Id: I9e5b920f94b6510da01da2f656196a993170d1c5 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/106 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-07-21Libpayload: default DESTDIR for 'make install'Tadas Slotkus
If you would try download FILO via svn, then you probably get error message about libpayload install. This enables manually installing libpayload in legacy style :) Change-Id: I9f52be939303c5913611f21477d681e11d286382 Signed-off-by: Tadas Slotkus <devtadas@gmail.com> Reviewed-on: http://review.coreboot.org/102 Tested-by: build bot (Jenkins) Reviewed-by: Frank Vibrans III <frank.vibrans@amd.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-07-20libpayload: Provide dummy getenv()Patrick Georgi
Change-Id: I419fcb16e0b10dee9195072e0e6befa6c9e61a69 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/105 Tested-by: build bot (Jenkins) Reviewed-by: Frank Vibrans III <frank.vibrans@amd.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-17port_enable and port_reset must change atomically.Steven A. Falco
I have observed two separate EHCI host bridges that do not tolerate using C bit-fields to directly manipulate the portsc_t register. The reason for this is that the EHCI spec says that port_enable must go to 0 at the time that port_reset goes to 1. Naturally this cannot be done using direct bit-field manipulation. Instead, we use a temporary variable, change the bit-fields there, then atomically write the new value back to the hardware. Signed-off-by: Steven A. Falco <sfalco@coincident.com> Change-Id: If138faee43e0293efa203b86f7893fdf1e811269 Reviewed-on: http://review.coreboot.org/101 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-07-16libpayload: Improve compatibilityPatrick Georgi
Define INT_MAX, EOF and make sure size_t is available. Change-Id: I1b4b717d2545ea8312ec52339300307a5bd68f8a Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/104 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-14Print a warning when an unknow USB controller type is detected.Steven A. Falco
The Intel E6XX Atom processor reports an unknown USB controller type (in addition to the standard EHCI and OHCI ones). Add a default case to print a warning when an unknown controller type is detected. Change-Id: I885d0ccec4c46fd212cceac599290e9bf85edbbb Signed-off-by: Steven A. Falco <sfalco@coincident.com> Reviewed-on: http://review.coreboot.org/100 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-07-14EHCI driver missing bus_address assignment.Steven A. Falco
Other USB drivers set the bus_address field. EHCI should do this too. Signed-off-by: Steven A. Falco <sfalco@coincident.com> Change-Id: Ic4274c6744951ef7fa0cb135caf8b9f177d8bcaf Reviewed-on: http://review.coreboot.org/99 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2011-07-11libpayload: Add qsort()Patrick Georgi
It's taken from OpenBSD and thus appropriately licensed (and reasonably tested). Change-Id: I5767600c9865d39e56c220b52e045f3501875b98 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/88 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07libpayload: Don't declare mouse support in tinycursesPatrick Georgi
Change-Id: Id1ff3d85617e3ec063ce332cf13920dfbbb7cf26 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/87 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07libpayload: Provide atol(), malloc.hPatrick Georgi
Change-Id: I807ca061115146a6851eef481eb881b279fba8e1 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/86 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07libpayload: Implement strlcpyPatrick Georgi
Change-Id: Ibd339957690afe2cded46895c3088eba87f0ffd1 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/85 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07libpayload: fix wborder()Patrick Georgi
wborder didn't provide default characters to draw a border. Change-Id: Ib746ed16be341598fd9fa1f1b7577606d1abd9e5 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/84 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-07-07Run 'git fetch' in SeaBIOS only when really neededCristian Măgherușan-Stanciu
This allows coreboot to compile without Internet connectivity Change-Id: I969471e44e417f127fdc8744e868211500acee3e Signed-off-by: Cristian Măgherușan-Stanciu <cristi.magherusan@gmail.com> Reviewed-on: http://review.coreboot.org/11 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-07-03Fixes to the libpayload build systemPatrick Georgi
- its Makefile is part of the libpayload project - fix conversion bug in powerpc's Makefile.inc Change-Id: I84f2da092c3733ea7d0f232cb3768078cf13dfd5 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/79 Tested-by: build bot (Jenkins) Reviewed-by: Uwe Hermann <uwe@hermann-uwe.de>
2011-06-30Reduce warnings/errors in libpayload when using picky compiler optionsPatrick Georgi
The new build system uses quite a few more -W flags for the compiler by default than the old one. And that's for the better. Change-Id: Ia8e3d28fb35c56760c2bd0983046c7067e8c5dd6 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/72 Tested-by: build bot (Jenkins) Reviewed-by: Uwe Hermann <uwe@hermann-uwe.de>
2011-06-30Use coreboot build system for libpayload, too.Patrick Georgi
This change makes building coreboot related projects more unified. Change-Id: I0f1181e2fffde1e03675523f7dc9eef3119052c3 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/71 Tested-by: build bot (Jenkins) Reviewed-by: Uwe Hermann <uwe@hermann-uwe.de>
2011-06-29Libpayload needs to clear the bss region.Marc Jones
Libpayload shouldn't count on coreboot or other payloads to clear memory. This fixes problems with payloads being loaded after or on top of each other. Change-Id: I30303d47e465e8921f47acab667c7998ba79fca7 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/66 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-04-16Allow libpayload to use an OXPCIe 952 card on systems without ↵Stefan Reinauer
onboard serial port Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6508 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-15add FILO easy payload optionStefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6504 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-14coding style cosmetics.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6492 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-01Add build instructions for coreinfo, specially pointing out installing ↵Yang Hamo Bai
gcc-multilib on a 64bit system. Signed-off-by: Yang Hamo Bai <hamo.by@gmail.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-29Update repo path in libpayload readme. ↵Nils Jacobs
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6469 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-22libpayload: Fix documentationPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Patrick Georgi <patrick.georgi@secunet.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6459 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-17libpayload: fix string-to-numeric functions for base > 10Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Patrick Georgi <patrick.georgi@secunet.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6450 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01libpayload: Add more libpci-compatibility (#defines)Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6417 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01libpayload: Implement pci_cleanup()Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6416 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01libpayload: Implement ffs()Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6415 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01Some more standard types and defines (libpayload)Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6414 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01Add lib/ to the default library path of lpgcc, so -l worksPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-24libpayload: Move stdin/stdout/stderr away from headersPatrick Georgi
Otherwise they exist in several object files, confusing the linker Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6377 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-15use git.seabios.org for checking out seabios. Stefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6361 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-14Use fprintf(stderr, ...) in libraryPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-14Stub out FILE*, stdout/stdin/stderr and implement fprintf on thesePatrick Georgi
- Add FILE* - Add stdout, stdin, stderr stubs - Add fprintf that redirects to printf for stdout and stderr and fails otherwise Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6358 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-14lpgcc was too noisy in some casesPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6357 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-14Some more POSIX compatibilityPatrick Georgi
- Add assert.h - Add arpa/inet.h - Add assert macro Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6356 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-07Reliably build arbitrary Kconfig-based revisions of SeaBIOSPeter Stuge
Reliability is accomplished by checking out the desired SeaBIOS commitish into a branch named 'coreboot' in the local SeaBIOS git repository. Using a branch allows TAG-$(CONFIG_SEABIOS_..) to refer to any commitish in the SeaBIOS git repo, not just branches and tags. Configuration is done with make defconfig followed by enabling and disabling of the relevant coreboot-specific SeaBIOS options by appending to .config using echo. This works, because later entries in .config will overwrite earlier ones. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-29Pass all required toolchain parts to SeaBIOS correctlyStefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-25Fix abuildStefan Reinauer
thanks to Kevin who came up with this Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6298 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-23Clone a tag rather than SeaBIOS stable branch HEADKevin O'Connor
Use a tag (rel-0.6.1.3) for SeaBIOS stable checkouts instead of the stable branch. The tag is a little safer because it prevents an incorrect commit to the stable branch from being immiediately picked up by coreboot users. Note - rel-0.6.1.3 (and 0.6.1-stable) now have the CFLAGS build fix that was causing build failures for coreboot users. Signed-off-by: Kevin O'Connor <kevin@koconnor.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6292 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-30Per default, use SeaBIOS payload instead of no payload.Stefan Reinauer
Add choice to use stable or master version of seabios repository Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-03Update coreboot crossgcc toolchain, GCC 4.5.1, MPFR 3.0.0, GDB 7.2.Marc Jones
Add libelf_cv_elf_h_works=no to produce a libelf.h for Cygwin. Add GDB patch to handle #pragma pack in the i386-elf gcc target. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-22Printing coreboot debug messages on VGA console is pretty much useless, sinceStefan Reinauer
initializing VGA happens pretty much as the last thing before starting the payload. Hence, drop VGA console support, as we did in coreboot v3. - Drop VGA and BTEXT console support. Console is meant to be debugging only, and by the time graphics comes up 99% of the risky stuff has already happened. Note: This patch does not remove hardware init but only the actual output functionality. The ragexl driver needs some extra love, but that's for another day - factor out die() and post() - drop some leftover RAMBASE < 0x100000 checks. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: QingPei Wang<wangqingpei@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25Add an EHCI driver to libpayload's USB stack.Patrick Georgi
Interrupt transfer support is missing (ie. no keyboard), bulk and control transfers work (ie. mass storage). Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-16Add default libpayload build, xcompile, and lpgcc setup to tint.Marc Jones
Signed-off-by: Marc Jones <marc.jones@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5816 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-09Only try to beep when speaker support is compiled in.Patrick Georgi
Trivial change. Reported-by: Aurelien Guillaume <aurelien@iwi.me> Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-08Changes to str*cmp functions. Fixes a couple more corner cases.Liu Tao
Signed-off-by: Liu Tao <liutao1980@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-03The AMD CS5536's USB controllers are located at device 0F, functions 4Jens Rottmann
and 5. They're not found if only function 0 is checked. So if a device exists at all, try all its functions. usb_controller_initialize() will silently skip all device classes != 0C03. (changed to continue to use 32bit accesses -pg) Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-28fix compilation of hello.elf example payload.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5746 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-18libpayload: fix garbage on screen with Geode-LX VGAJens Rottmann
Clear initial garbage in VGA memory and fix scroll_up, which scrolled 1 scanline instead of 1 text line by mistake. Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-17libpayload: Add function to fix CMOS checksum.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16Fix strcmp and strncmp. They failed in several important scenariosPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16Add #define that states the libpci interface version we implementPatrick Georgi
(flashrom needs it) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-13Add support for OHCI controllers and prelimiary support for xHCI (USB3) ↵Patrick Georgi
controllers. Improve scanning for USB controllers. Limitations: - OHCI doesn't support interrupt transfers yet (ie. no keyboards) - xHCI just does initialization and device attach/detach so far Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-05Change default path and configuration for Coreinfo.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Cai Bai Yin <caibaiyin.pku@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 21:25:34 +0000