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2021-10-09payloads/tianocore/Kconfig: Extend help for bootsplash fileFelix Friedlander
Add more detail as to why a smaller-than-screen-size image is to be preferred, in contrast to other payloads' bootsplash images. Signed-off-by: Felix Friedlander <felix@ffetc.net> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Change-Id: Ib4c6666bb0e49369fe8fe2ae3dc12c023f668da0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49233 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-10-08payloads: Allow selecting UefiPayload on ARM64 platformsRex-BC Chen
Some ARM64 platforms (e.g., MT8195) are now able to compile and run EDK2 (UefiPayload). As a result, we should allow selecting PAYLOAD_TIANOCORE for ARM64 platforms. TEST=show strings correctly. 1. make menuconfig 2. select Mainboard -> Vendor=Google, model=Cherry 3. select Payload -> Add a payload -> Tianocorepayload 4. make -j 5. build/cbfstool build/coreboot.rom extract --name fallback/payload --file out.elf -m arm64 6. file out.elf # ELF 64-bit LSB executable, ARM aarch64 7. strings out.elf | grep tianocore # lots of tianocore stuff Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I10777a341d46240b91ceeeb1be26c33a0c5db839 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58054 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-07libpayload: cbgfx: Clear screen by memcpyYu-Ping Wu
Instead of setting each pixel in the framebuffer, use memcpy() to clear screen faster. As this method should be fast enough, remove the fast path using memset(). The speed of clear_screen() on brya (x_resolution = 1920, bytes_per_line = 7680): - Using memset(): 15ms - Setting each pixel: 25ms - Using memcpy(): 14ms Also remove set_pixel_raw() since it's now used in only one place. BUG=none TEST=emerge-brya libpayload TEST=Saw developer screen on brya BRANCH=none Change-Id: I5f08fb50faab48d3db6b61ae022af3226914f72b Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2021-10-06libpayload: Enable UART driver for sc7280Roja Rani Yarubandi
Add Qualcomm's QUPV3 serial driver for herobrine board BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board. Change-Id: I3a745afd7bbabdd29f1f369612c990526e5a2335 Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
2021-10-04driver/intel/pmc_mux/conn: Move typec_orientation enum to coreboot_tables.hNick Vaccaro
Move the locally declared typec_orientation enum from chip.h to coreboot_tables.h. Change enum typec_orientation name to type_c_orientation for consistency with contents of coreboot_tables.h. Rename TYPEC_ORIENTATION_FOLLOW_CC to TYPEC_ORIENTATION_NONE. BUG=b:149830546 TEST="emerge-volteer coreboot" and make sure it compiles successfully. Change-Id: I24c9177be72b0c9831791aa7d1f7b1236309c9cd Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-10-04coreboot tables: Add type-c port info to coreboot tableNick Vaccaro
This change adds type-c port information for USB Type-C ports to the coreboot table. This allows depthcharge to know the usb2 and usb3 port number assignments for each available port, as well as the SBU and data line orientation for the board. BUG=b:149830546 TEST='emerge-volteer coreboot chromeos-bootimage' and verify it builds successfully. Cherry-pick CL to enable this feature for volteer, flash and boot volteer2 to kernel, log in and check cbmem for type-c info exported to the payload: localhost ~ # cbmem -c | grep type-c added type-c port0 info to cbmem: usb2:9 usb3:1 sbu:0 data:0 added type-c port1 info to cbmem: usb2:4 usb3:2 sbu:1 data:0 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Change-Id: Ice732be2fa634dbf31ec620552b383c4a5b41451 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57069 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-09-20device/mmio: Make buffer_to_fifo32() take a const bufferJulius Werner
The input buffer to the buffer_to_fifo family of functions is only read, so it can be a const pointer. (Also, remove the MIPS check in libpayload for these functions... the MIPS architecture has been removed a while ago.) Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I021069680cf691590fdacc3d51f747f12ae3df31 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57731 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2021-09-08payloads/external/tianocore: Add build argument for 4G DecodeSean Rhodes
Add Kconfig option TIANOCORE_ABOVE_4G_DECODE to pass build option to edk2 to enable or disable "Above 4G Decode". Disabling allows certain Linux distributions to boot such as Qubes, Zorin and Proxmox. Requires commit `2f6d4cbcc7fa49462e607baed7626524ccd59ad3` that is present in the `uefipayload_202107` branch of MrChromebox's edk2 repository. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia3b1d15196c0ec611431af29031682fea626d19d Reviewed-on: https://review.coreboot.org/c/coreboot/+/56223 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2021-09-01libpayload: Move EXTRA_CFLAGS to enable option overrideJakub Czapiga
Before this patch EXTRA_CFLAGS were placed before many other options. This made overriding impossible even, when necessary. This patch moves EXTRA_CFLAGS to be placed after original CFLAGS, thus making option overriding possible. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: If8394b151696eee4bd736d2fb1ad340209e05fbb Reviewed-on: https://review.coreboot.org/c/coreboot/+/57181 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-27libpayload: cbgfx: Clear screen by sequential accessYu-Ping Wu
Currently clear_screen() calls set_pixel() to set all pixels. However, the actual order of pixels being set depends on the framebuffer orientation. With NORMAL orientation, the framebuffer is accessed sequentially; with LEFT_UP/RIGHT_UP orientation, it is accessed back and forth, leading to performance drop (>1 second on bugzzy). Therefore, ensure sequential access to the framebuffer, regardless of the orientation. BUG=b:194967458 TEST=emerge-cherry libpayload BRANCH=dedede Change-Id: Iecaff5b6abc24ba4b3859cbc44c0d61b2a90b2d9 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57104 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-12libpayload: Mark Intel 300 series AHCI as testedNico Huber
Tested with filo on roda/rw14. Change-Id: Ia5f868d3a9cead0a872e6d3e9fdacd6eeb7f158b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56666 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-09payloads/libpayload: add MTK_TIMER_V2 configRex-BC Chen
The timer structure (in particular, the offset to memory addresses) on recent MTK SoCs for example MT8195 has been changed. BUG=b:195274787 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Ifd6ff65a825c4309c47f3b115b80a8ecd42fedac Reviewed-on: https://review.coreboot.org/c/coreboot/+/56845 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-02payloads/tianocore: update MrChromebox UEFIPAYLOAD branchMatt DeVillier
Update tianocore branch used with default UEFIPAYLOAD option to mrchromebox/uefipayload_202107 (July 2021) branch. This branch is rebased on edk2 upstream commit 12e34cd2f7900578ee83cb01b8f1696a7bb7511b [OvmfPkg/Bhyve: clean up TPM_ENABLE remnants] vs tag edk2-stable202105. The main changes are fixes for e820 table parsing and support to disable "Above 4G decode", which is required to boot distros with bootloaders that expect to be loaded into RAM below 4G. This fixes booting with Qubes, ZorinOS, Proxmox, among others. Additionally, several commits on top of upstream have been consolidated, reworked, and/or reordered for readability and maintainability. Change-Id: I6f04fd027a0599ca6892a1376938108a2e402ac2 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-07-19payloads: FILO: Hook up autoboot optionsPaul Menzel
FILO allows to configure a line to autoboot. Hook this up into coreboot’s build system. TEST=Configure coreboot for QEMU i440fx with FILO as payload and configure: CONFIG_FILO_MASTER=y CONFIG_FILO_USE_AUTOBOOT=y CONFIG_FILO_AUTOBOOT_FILE="hda1:/vmlinuz root=/dev/sda1 console=tty0 console=ttyS0,115200 initrd=hda1:/initrd.img" CONFIG_FILO_AUTOBOOT_DELAY=5 Boot Debian image with: qemu-system-x86_64 -bios /dev/shm/coreboot/build/coreboot.rom -L /dev/shm -enable-kvm -smp cpus=2 -m 1G -hda /dev/shm/debian-32.img -serial stdio -net nic -net user,hostfwd=tcp::22222-:22 Change-Id: Id167e9a144bf466da87469108002672b299b702a Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56213 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-07-14libpayload: curses: Only call `serial_set_color()` with initialized valuesPaul Menzel
Building nvramcui with i386-elf-gcc (coreboot toolchain v2021-04-06_7014f8258e) 8.3.0 and Link Time Optimization (LTO) enabled in libpayload (`CONFIG_LP_LTO=y`) fails with the error below. LPGCC nvramcui.bin curses/PDCurses/pdcurses/refresh.c: In function 'wrefresh': curses/pdcurses-backend/pdcdisp.c:217:4: error: 'bg' may be used uninitialized in this function [-Werror=maybe-uninitialized] curses/pdcurses-backend/pdcdisp.c:214:18: note: 'bg' was declared here curses/pdcurses-backend/pdcdisp.c:217:4: error: 'fg' may be used uninitialized in this function [-Werror=maybe-uninitialized] curses/pdcurses-backend/pdcdisp.c:214:14: note: 'fg' was declared here lto1: all warnings being treated as errors lto-wrapper: fatal error: i386-elf-gcc returned 1 exit status compilation terminated. /opt/xgcc/lib/gcc/i386-elf/8.3.0/../../../../i386-elf/bin/ld.bfd: error: lto-wrapper failed collect2: error: ld returned 1 exit status `pair_content()` returns in case `PAIR_NUMBER(attr)` is invalid, so guard the usage of `serial_set_color()`. if (pair < 0 || pair >= COLOR_PAIRS || !fg || !bg) return ERR; Note, building with x86_64-linux-gnu-gcc-10 (Debian 10.2.1-6) 10.2.1 20210110 does *not* fail. Change-Id: Ic63e34f2b5bc9f826db37597bebc6b20542481d7 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51914 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-07-13util/kconfig: Uprev to Linux 5.13's kconfigPatrick Georgi
This was originally several commits that had to be squashed into one because the intermediate states weren't able to build coreboot: - one to remove everything that wasn't our own code, leaving only regex.[ch], toada.c, description.md and Makefile.inc. - one to copy in Linux 5.13's scripts/kconfig and adapt Makefile.inc to make the original Makefile work again. - adapt abuild to use olddefconfig, simplifying matters. - apply patches in util/kconfig/patches. - Some more adaptations to the libpayload build system. The patches are now in util/kconfig/patches/, reverse applying them should lead to a util/kconfig/ tree that contains exactly the Linux version + our own 5 files. Change-Id: Ia0e8fe4e9022b278f34ab113a433ef4d45e5c355 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37152 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-06-18nvs: Add Chrome OS NVS (CNVS) information to coreboot tablesFurquan Shaikh
CB:51638 separated Chrome OS NVS from global NVS by allocating it separately in CBMEM. CNVS is used in depthcharge to fill firmware information at boot time. Thus, location of CNVS needs to be shared in coreboot tables for depthcharge to use. This change adds a new coreboot table tag `CB_TAG_ACPI_CNVS`/`CB_TAG_ACPI_CNVS`(0x41) which provides the location of CNVS in CBMEM to payload (depthcharge). Additionally, CB:51639 refactored device nvs(DNVS) and moved it to the end of GNVS instead of the fixed offset 0x1000. DNVS is used on older Intel platforms like baytrail, braswell and broadwell and depthcharge fills this at boot time as well. Since DNVS is no longer used on any new platforms, this information is not passed in coreboot tables. Instead depthcharge is being updated to use statically defined offsets for DNVS. BUG=b:191324611, b:191324611 TEST=Verified that `crossystem fwid` which reads fwid information from CNVS is reported correctly on brya. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I3815d5ecb5f0b534ead61836c2d275083e397ff0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55665 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-18includes: Move *abs() declarations into `stdlib.h`Nico Huber
Change-Id: Id4df2d3210735bee737353d293450e59cf93bd9a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55593 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-18includes: Remove dangling doxygen @}Nico Huber
Change-Id: I05e02f9689c1a6dafb3943657a3db975c2aeacbe Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55592 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-18includes: Define `CHAR_BIT` in `limits.h`Nico Huber
Change-Id: Ib1d80d0c7457f90596ef5cd9d5ad0c4a33c8d473 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55591 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-18includes: Provide `wchar.h` with `wchar_t` and `wint_t`Nico Huber
Change-Id: Iacb0e4eaf3f0b6bf843f3bfda5bdfde0f7a98808 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55590 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-18includes: Add include guards to `stddef.h`Nico Huber
Change-Id: Ifae4f07abd75da9784967c2020eed2c3fe64afa0 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55589 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-07payloads/tianocore: Fix orphaned reference to 'bootloader' variableMatt DeVillier
commit d3b49b4 [payloads/Tianocore: Update default build target, simplify build options] simplified the build string and removed the bootloader Makefile variable, but one reference was missed. Luckily the variable being empty didn't break things, but correct it regardless. Change-Id: If37b291dda59c20bfe4c6e5b9100fac52d11a2f4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55239 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-07payloads/tianocore: Restrict bootsplash option to UEFIPAYLOADMatt DeVillier
The custom bootsplash option only functions when using the UEFIPAYLOAD payload option, so restrict visibility to when that option is selected. Change-Id: If5fe46b629e5275da54a5e86465a68271110397b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55145 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-06-07payloads/tianocore: Add Kconfig option to enable cbmem loggingMatt DeVillier
Logging to coreboot cbmem, instead of a serial console, was added to MrChromebox's uefipayloadpkg branch. Add a Kconfig option to enable this, and restrict it to the UEFIPAYLOAD payload option, since this feature does not exist in upstream edk2. Change-Id: Idef125235dc7ba885eb22ac69c6f752588a9e295 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
2021-05-28option: Turn CMOS option backend into choiceAngel Pons
In order to add more option backends, transform the current CMOS option backend into a Kconfig choice. Replace the `select` directives, as they cannot be used with choice options. Change-Id: Id3180e9991f0e763b4bae93a92d40668e7fc99bc Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54728 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-18payload/tianocore: Drop TIANOCORE_TARGET_IA32Lijian Zhao
Since upstream edk2 totally drop 32-bit support for UefiPayload, totaly drop it. Test: Build and run qemu successful boot up into EFI shell with UEFIPAYLOAD option. Change-Id: Iadd9a3c455fad4eede8a0a017415acd2c57fba04 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54189 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-13payloads/Tianocore: Update default build target, simplify build optionsMatt DeVillier
Drop the deprecated COREBOOTPAYLOAD option, and replace it with MrChromebox's updated UefiPayloadPkg option. Simplify the Kconfig options to make it easier to build from upstream edk2 master. Drop the TIANOCORE_USE_8254_TIMER Kconfig option since it applied only to CorebootPayloadPkg. Clean up the Makefile now that we're only building from a single Tianocore package/target. Test: build/boot qemu Q35 target with both UefiPayload and Upstream options. Change-Id: If545fbd0c30be6dcc6ff43107b80980fa23a527e Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54019 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-03libpayload: i8042: Enable keyboard translation by default on exitDuncan Laurie
Add a Kconfig option to set the keyboard translation state on exit and set the default to true. This restores the keyboard to the power-up defaults for firmware that does not always run libpayload keyboard init to have consistent state, and provides an option to disable translation for keyboards that might need it. Change-Id: I25dfe3f425a5bb57e97476564886672b707aa3bd Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52737 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-04-23payloads/depthcharge: Use static_fw_config.h file for depthcharge buildBora Guvendik
Use static_fw_config.h during depthcharge build to be in line with latest depthcharge changes on the main branch. https://chromium-review.googlesource.com/c/chromiumos/platform/depthcharge/+/2523517 BUG=none TEST=Boot to OS Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Change-Id: I72a681d9321750c392000e11a21d81020dde3fd7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Varshit B Pandya <varshit.b.pandya@intel.com>
2021-04-18libpayload/keyboard: Reset to scancode set #2 on exitNico Huber
If we select scancode set #1 and keep that, it can confuse Linux with keyboards that don't return to set #2 when asked to load the defaults. This happens for instance with various integrated Think- Pad keyboards but was also seen with an external PS/2 one. The chosen configuration, scancode set #2 without translation, seems to be the default for many systems. So we can expect other payloads and kernels to work with it. Change-Id: I28d74590e9f04d32bb2bbd461b67f15014f927ec Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47594 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-18libpayload/keyboard: Add a detention stateNico Huber
Instead of ignoring keyboards indefinitely when they failed to initialize, we wait 5s and then start over with the hotplug detection. As we always assume a present keyboard at first, we'd otherwise never have a chance to hot plug a device after the initial 30s timer ran out. Change-Id: I8dec4921b2e932442d52b5118cdcf27090633498 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-18libpayload/keyboard: Implement hot (un)pluggingNico Huber
While we assume a keyboard is attached, we send an echo command every 500ms. If there is no data coming from the keyboard within 200ms, we assume it was detached. Correspondingly, if we assume no keyboard is attached, we run an echo command once per second. Change-Id: I2c75182761729bf30711305f3d8b9d43eafad675 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47593 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-16tint: introduce the new tint build system with checksum verificationMike Banon
Three stages of the new tint build system: 1) generate_core.sh extracts the core part from buildgcc script, most importantly the checksum calculation/verification functions. 2) tintify_core.sh adds the tint-specific footer/header to the core, such as the properties of current version including its checksum. 3) tint.sh - generated and "tintified" core script - builds a tint. Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: Ib71f5b861ecf91949a5af12812258e60873f0498 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2021-04-15libpayload: Support herobrineT Michael Turney
BUG=b:182963902 TEST= validated on qualcomm sc7280 developement board Change-Id: Ic28f02cdf5c0e4c2458aee0ad7c74383c88d8874 Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51621 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
2021-04-15payloads/external/dc: Update depthcharge branch from master to mainMeera Ravindranath
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Signed-off-by: Balaji Manigandan B <balaji.manigandan@intel.com> Change-Id: Ice0b908b23921cd9afbef52d2471f5ded277a136 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51280 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Selma Bensaid <selma.bensaid@intel.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-04-10payloads/tianocore: Fix compilation for UEFIPAYLOAD optionMatt DeVillier
Upstream edk2 dropped separate 32-bit support for UefiPayloadPkg, and removed the architecture suffix from the package dsc filename. Test: build/run qemu with CONFIG_TIANOCORE_UEFIPAYLOAD selected. Change-Id: I40077f1d370f0cb5627645b305b57e6c71e44095 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52191 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2021-04-09payloads/LinuxBoot: make linux kernel build reproducibleAlexander Couzens
Reproducible builds have to be independent from user, host, domain, time. Taken from OpenWrt (GPL2). Change-Id: I420588acc66647051c08e4da6fbedc205cd62877 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35393 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-07libpayload/storage: Add NVMe driverThomas Heijligen
Tested with qemu virtual NVMe and Intel hardware. Works with FILO. Change-Id: Ie75b1dc743dac3426c230c57ee23b771ba3a6e0c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33582 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-14payloads/LinuxBoot/u-root: add boot template to u-rootAlexander Couzens
Without the boot template, u-root doesn't include any boot commands. Booting other OS is impossible. Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Change-Id: I7d0742d115715eb40e293e2a8711d1ff20d8970a Reviewed-on: https://review.coreboot.org/c/coreboot/+/51331 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: ron minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-20libpayload: Use volatile pointers in {read,write}{8,16,32,64}Patrick Georgi
This is already the case on x86 but not on the ARM platforms, and {read,write}[bwl] are using volatile pointers, too, so follow suit. Change-Id: I6819df62016990e12410eaa9c3c97b8b90944b51 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-17treewide: Remove trailing whitespaceMartin Roth
Remove trailing whitespace in files that aren't typically checked. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I8dfffbdeaadfa694fef0404719643803df601065 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50704 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-15tint: update the patch version numbers according to a new tint versionMike Banon
Rebase the libpayload_tint.patch to update its internal version numbers from 0.04+nmu1 to 0.05. Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: I91f780f80026147c3c35330625a4106c65a1ddf0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50468 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-07tint: update the archive from 0.04+nmu1 to 0.05Mike Banon
Old archive is not available anymore. The tint sources inside the new archive are the same (something changed in a debian subdirectory but we aren't using it), so a libpayload_tint.patch is still valid. Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: If556fac7d1d8379a022f59ed6aee1450b7bc5aa7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48616 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-07payloads: Force sub-make runs for in-tree payloadsNico Huber
The sub-process calls break make's dependency tracking, hence we have to always perform the calls if we want to allow automatic, incremental builds. We let each rule depend on a new, phony target `force-payload`. It has roughly the same effect as tagging all the targets as phony, but doing so would feel wrong as some of them are actual files. Change-Id: I1bc2406db371e8dddbfdf71f68a6665a5b558f5e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-07payloads: Pass $(CCACHE) on to in-tree payloadsNico Huber
Change-Id: Ie15aec4059fbeb99f714c3d674df5fabdb7c081c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47637 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-07nvramcui: Use libpayload's new `Makefile.payload`Nico Huber
Change-Id: I34bf659c1a069ccc27ca613bbf86780d4da49259 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47636 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-07coreinfo: Use libpayload's new `Makefile.payload`Nico Huber
Change-Id: I388d60e6f3aeb2184966152f0934845d42834de0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47634 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-07libpayload: Add a Makefile for in-tree payloadsNico Huber
The new `Makefile.payload` can be included by the Makefiles of pay- loads for in-tree builds. The basic idea is to use libpayload's build results without the `make install` step, and to ensure that incremental builds work. For instance, if libpayload's code changes, a `make` for the payload would automatically update the libpayload build and rebuild the payload. But if there are no code changes in libpayload, only updated files of the payload will be re-built. The configuration of libpayload is supposed to be automatically generated from a `defconfig` file. If this `defconfig` changes, libpayload and the payload will be re-built. Change-Id: If5319f1bf0bcd09964416237c5cf7f8e59f487a2 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47633 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-07nvramcui: Unexport COREBOOT_EXPORTSNico Huber
coreboot's Makefile exports a lot of variables that influence make sub- processes (e.g. for Kconfig). We don't want these variables leak into sub-processes for (lib)payload builds, hence unexport them. Change-Id: I8da2d8db6238d456723b9c22bee80c62e97027b0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48940 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-07coreinfo: Unexport COREBOOT_EXPORTSNico Huber
coreboot's Makefile exports a lot of variables that influence make sub- processes (e.g. for Kconfig). We don't want these variables leak into sub-processes for (lib)payload builds, hence unexport them. Change-Id: I7d65c0aa6d4550bd6600c437e838339af69496da Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48939 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-06payloads/external/FILO: Pass Libpayloads path on the clean targetArthur Heymans
FILO's Makefile will check for libpayload and might not even `clean` if it's not found. Change-Id: If5f8f4ecce317e54cd4b5688553cc38220f6e6df Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36461 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-02-05payloads/libpayload/arch/arm64/mmu.c: Fix typo in commentElyes HAOUAS
Change-Id: Ieb10a881ef1d983f11318f0f6934491fd19fd0bf Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50268 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-02-02treewide [Kconfig]: Remove useless commentElyes HAOUAS
Change-Id: I3dafffa61f4fe6089fd11ef6579626aff8088df5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50185 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-30libpayload/arm*: Add 64bit memory access primitivesPatrick Georgi
Add read64 and write64 for consistency with x86. BUG=b:178785769 Change-Id: I342e3a23201d0b804ea5ecfe47ee3e4bb516de4c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-01-15build system: Always add coreboot.pre dependency to intermediatesPatrick Georgi
They all operate on that file, so just add it globally. Change-Id: I953975a4078d0f4a5ec0b6248f0dcedada69afb2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-01-14build system: Structure and serialize INTERMEDIATEPatrick Georgi
Target added to INTERMEDIATE all operate on coreboot.pre, each modifying the file in some way. When running them in parallel, coreboot.pre can be read from and written to in parallel which can corrupt the result. Add a function to create those rules that also adds existing INTERMEDIATE targets to enforce an order (as established by evaluation order of Makefile.inc files). While at it, also add the addition to the PHONY target so we don't forget it. BUG=chromium:1154313, b:174585424 TEST=Built a configuration with SeaBIOS + SeaBIOS config files (ps2 timeout and sercon) and saw that they were executed. Change-Id: Ia5803806e6c33083dfe5dec8904a65c46436e756 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49358 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-13nvramcui: Make local render_form() function staticNico Huber
Allows us to build with `-Wmissing-prototypes`. Change-Id: I722b41e515ee472697028a912b9136ce59611051 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47635 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-11libpayload/lpgcc: Drop redundant linker pathNico Huber
It either doesn't exist (in-tree builds) or is the same as $_LIBDIR. Change-Id: I9551cbfc3295d86c22a3785be7cdc0f65eeb08c4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47632 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-11libpayload/lpgcc: Set proper include paths for in-tree buildsNico Huber
We only need `$_OBJ` in the include path for in-tree builds. Also, curses only need special handling for those and PDCurses turned out to need many more include paths. Change-Id: Idd29ef33065033e26ba61b09d412d8ca3566d643 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47631 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-11libpayload/lpgcc: Add more variables to support in-tree buildsNico Huber
Add $_DOTCONFIG and $_XCOMPILE pointing to the respective files and use them. Change-Id: I719b42d1c8abf055948daf5b000daa30cd249edd Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47630 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-08payloads/external: Update cbfs-ints with CONFIG_UPDATE_IMAGEArthur Heymans
Change-Id: Icfbfff3ba680a85eb2f683867064b19f40b9d40f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48898 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-08*/Makefile.inc: Add some INTERMEDIATE targets to .PHONYArthur Heymans
Change-Id: I125e40204f3a9602ee5810d341ef40f9f50d045b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48897 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-01libpayload/lpgcc: Check for `libpayload.config` for in-tree buildsNico Huber
Instead of checking for an already fully build `libpayload.a`, we check for the `libpayload.config` which is the actual prerequisite to start using `lpgcc`. This will allow compilation of payload sources before or in parallel with the build of `libpayload.a`. Change-Id: Ic0143fefe33560af8b013ae48bbbe231b3ad46f3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-01-01libpayload/lpgcc: Turn references to build dir into a variableNico Huber
Introduce a `$_OBJ` variable, that points to the build directory for in-tree usage of `lpgcc`. If unset, the default `../build` relative to the location of `lpgcc` is used. Change-Id: I35112d7533d69aa51252dd2bceec010a62522403 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47629 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-01libpayload: Keep a copy of .config in the build dirNico Huber
This should make it easier to find the correct config for in-tree builds. Change-Id: I08d396ae3cedc65f63c4b8865701ea123c7d56cb Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47628 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-01libpayload: Move .xcompile into $(obj)Nico Huber
Keep libpayload's xcompile in its build dir. While we are at it, align things with the top-level version. Having `.xcompile` in a central place led to race conditions when multiple payloads try to build their own libpayloads in parallel. Change-Id: I504e1862db79b368289867f7568c9169f27a1549 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-30payloads/tianocore: Clean up build stringMatt DeVillier
Extract the architecture (-a) and package (-p) options into a new variable (ARCH) to simplify the construction of BUILD_STR. Test: build/boot various boards w/Tianocore payload Change-Id: I490d48428ac56d613d0b704700dfcf4ebfb2d245 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48942 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-28payloads/tianocore: Add Kconfig to set boot timeoutMatt DeVillier
Add a Kconfig option to set the tianocore boot timeout, which is passed to the payload via a command line parameter. Allows boards without an internal display (eg) to set a longer boot timeout, in order to ensure the boot splash/menu prompt are visible upon boot. The associated changes on the tianocore side have already been merged into MrChromebox's CorebootPayloadPkg and UefiPayloadPkg branches (coreboot_fb and uefipayloadpkg respectively). Change-Id: Ifeaadff05f6667d642c05b81f53c1d2dbc450af6 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-12-24libpayload/i8042: Add API to peek on keyboard input queueNico Huber
Change-Id: I60699e044b5bacd3f5292fed7edbf529ae133284 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47592 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-24libpayload/keyboard: Add debug output to all state transitionsNico Huber
Change-Id: I643a821d4c41fc068f2bab0bd571b0a4a359f59a Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47591 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Hide console output by defaultNico Huber
Change-Id: I855d975a4729da34a6fa73a63dbbd12c856bdc00 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47590 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Implement self-testNico Huber
The keyboard self-test is required for some devices. At least one device (integrated keyboard in a ThinkPad X201) actually starts the test automatically leading to spurious output and no response for the first seconds. We wait up to 5s for the self-test result. On failure or timeout, the command will be repeated until the 30s init timer runs out. This happens all in the background of the UI polling loop. To not unnecessarily delay the boot process, we first try an oppor- tunistic initialization which skips the self-test. Change-Id: Ie07b31e74d06e116ac81e76309621eed39a19b49 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47088 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Add timestamp to track time spent in a stateNico Huber
Will be used to time out in states that don't always advance. Change-Id: I28235e7638d8157cedf81fd915a41d28a1fc070b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47087 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-24libpayload/keyboard: Turn init sequence into a state machineNico Huber
We'll process the init sequence as part of the polling loop. This should have several advantages: * It eases error handling, i.e. we can return to an earlier state. * We don't have to stall initialization when a keyboard takes a little longer. * Generally, these keyboards can be hot-plugged (albeit not by design). Change-Id: I9cf5cf31eb420b3994bec20e56a72d37f3d2996e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Avoid races around input drainingNico Huber
Draining the keyboard's buffer is only possible when the keyboard port is enabled. We should also disable input scanning before, as the buffer could be filled again with new keystrokes otherwise. Change-Id: Ibac9c0d04880ff4a3efda5ac53da2f9731f6602c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47085 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Introduce keyboard_drain_input()Nico Huber
Move the input-buffer draining into a function. It uses the low-level i8042 API directly to avoid conflicts with changes in the high-level keyboard API. Change-Id: I9427c5b8be4d59c2ee3da12d6168d34590043682 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47084 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-24libpayload/keyboard: Revise keyboard_cmd() error handlingNico Huber
Even if we are careful, it's still possible that we read spurious data from the keyboard, e.g. keystrokes. Namely, when we send the reset/disable command, there is a race before the command is pro- cessed. So we should always process data from the keyboard in a loop. We break it, when an ACK (0xfa) or a NAK (0xfe) is received, and warn on unexpected data unless it might be due to the mentioned race. This also gives us the opportunity to use command-specific timeouts which we take from Linux: 1s for the keyboard self-test (as there are keyboards that perform the test before acking the command) and 200ms for all other commands. Change-Id: I60a2643a8ff4b9231c63bf970c8749c97c7d8926 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47083 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-23libpayload/keyboard: Revise scancode set and translation configNico Huber
Some background first: The original XT keyboards used what we call scancode set #1 today. The PC/AT keyboards introduced scancode set #2, but for compatibility, its controller translated scancodes back to set #1 by default. Newer keyboards (maybe all we have to deal with) also support switching the scancode set. This means the translation option in the controller and the scancode set selection in the keyboard have to match. In libpayload, we only support set #1 scancodes. So we either need the controller's trans- lation on and set #2 selected in the keyboard, or the controller's translation off and set #1 selected in the keyboard. Valid configurations: * SET #1 + XLATE off * SET #2 + XLATE on Both with and without the PC_KEYBOARD_AT_TRANSLATED option, we were only configuring one of the two settings, leaving room for invalid configurations. With this change, we try to select scancode set #2 first, which seems to be the most supported one, and configure the controller's translation accordingly. We try to fall back to set #1 on failure. We also keep translation disabled during configuration steps to ensure that the controller doesn't accidentally translate confi- guration data. On the coreboot side, we leave the controller's translation at its default setting, unless DRIVERS_PS2_KEYBOARD is enabled. The latter enables the translation unconditionally. For QEMU this means that the option effectively toggles the translation, as QEMU's controller has it disabled by default. This probably made a lot of earlier testing inconsistent. Fixes: commit a95a6bf646 (libpayload/drivers/i8402/kbd: Fix qemu) The reset introduced there effectively reverted the scancode selection made before (because 2 is the default). It's unclear if later changes to the code were only necessary to work around it. Change-Id: Iad85af516a7b9f9c0269ff9652ed15ee81700057 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46724 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-23libpayload/i8042: Add API to get/set kbd translation stateNico Huber
Change-Id: I49aa1c244cb60ea290df102f06f641c765f59fa5 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-08coreboot tables: Add SPI flash memory map windows to coreboot tablesFurquan Shaikh
This change adds details about the memory map windows to translate addresses between SPI flash space and host address space to coreboot tables. This is useful for payloads to setup the translation using the decode windows already known to coreboot. Until now, there was a single decode window at the top of 4G used by all x86 platforms. However, going forward, platforms might support more decode windows and hence in order to avoid duplication in payloads this information is filled in coreboot tables. `lb_spi_flash()` is updated to fill in the details about these windows by making a call to `spi_flash_get_mmap_windows()` which is implemented by the driver providing the boot media mapping device. BUG=b:171534504 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-05libpayload: Provide API to expose MMU memery ranges for ARM64Meng-Huan Yu
Provide get_mmu_ranges() for ARM64 to let payloads could get MMU ranges for all used memory regions. BUG=b:171858277 TEST=Build in x86, arm, arm64. emerge-zork libpayload depthcharge emerge-nyan libpayload depthcharge emerge-asurada libpayload depthcharge Signed-off-by: Meng-Huan Yu <menghuan@google.com> Change-Id: I39b24aefc9dbe530169b272e839d0e1e7c697742 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2020-11-22libpayload/usb: Add format string checking to usb_debugCaveh Jalali
This turns on the compiler's printf style format string checker. BUG=b:167517417 TEST=enabled all USB controllers on volteer and fixed resulting compiler errors when USB_DEBUG is enabled. Change-Id: Ic94ebcbafdde8a5f79278b5635111b99af40f892 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45025 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-22libpayload/usb: Fix printf format string mismatches in debug messagesCaveh Jalali
This fixes format string mismatch errors in the USB subsystem found by the compiler's format string checker. BUG=b:167517417 TEST=enabled all USB controllers on volteer and fixed resulting compiler errors when USB_DEBUG is enabled. Change-Id: I4dc70baefb3cd82fcc915cc2e7f68719cf6870cc Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-11-22payloads/external: Fix up SPDX license headersAngel Pons
Remove copyright notices and other unnecessary churn. Change-Id: Ie69cc121d2b6eed95aa3cbaa7215d61880148858 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47815 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-22payloads/external/Makefile.inc: Fix SeaBIOS option regressionsAngel Pons
Commit 14ca7407196 (Makefile.inc: Move adding SeaBIOS cbfs config files) introduced various regressions that were not spotted during review. TEST=Building with SEABIOS_THREAD_OPTIONROMS is working properly again. Change-Id: I4de0b11747e3df8dd31a85160add129d8cc6bd8a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47814 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-16Makefile.inc: Move adding SeaBIOS cbfs config filesArthur Heymans
Using the INTERMEDIATE target this can be done in the proper dir. Change-Id: Ie105231655ef4b49234f0944f638545fe79f07cb Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46415 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-16libpayload/i8042: Increase response timeout to 1.5sNico Huber
The current timeout of 500ms is too low. For instance self-test of the KBC integrated into IT8516E took almost 1s in tests. We already check for presence of the KBC before the self-test. So the timeout should only trigger on a hardware defect and we can leave some margin. Change-Id: I95f01a4e605a9c7deb894a71e102c3a881759bb1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47588 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-12Delete mainboard/google/chezaJulius Werner
Work on this mainboard was abandoned and never finished. It's not really usable in its current state, so let's get rid of it. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I4cd2e2cd0ee69d9846472653a942fa074e2b924d Reviewed-on: https://review.coreboot.org/c/coreboot/+/47427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-09libpayload: storage.c: remove unneeded #if CONFIG()Thomas Heijligen
Change-Id: I6e5679f66840105b3f9628071ac7aace9128107f Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47248 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-11-08libpayload: Make OHCI enums into typesJacob Garber
The OHCI header file declares various enums as follows: enum { ... } enum_name; Since the name is at the end, this is actually declaring a variable called enum_name and *not* a type, which is causing a multiple definition error in GCC 10. Move the enum_name before the opening brace to prevent this. Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Change-Id: I452c0a1b118990942aa53f1e7e77f5e8378e8975 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47224 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-11-08libpayload: Add compiler.h to compiler parametersJacob Garber
Headers in libpayload define various structs like so: struct struct_name { ... } __packed; However, these header files do not include the compiler.h macro that defines what __packed is, so they are actually defining a variable named __packed and *not* declaring a packed struct. This leads to defining the same variable multiple times, which was caught by GCC 10. Add compiler.h to the compiler parameters so it is included in all files automatically. Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Change-Id: Ia67182520dc94149e06fe9e03a14b3fc2ee29973 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47153 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-11-02coreinfo: Add support for link time optimizationJacob Garber
This introduces a Kconfig option for compiling coreinfo with LTO. This option can be used independently of LTO in libpayload, though will benefit most if that is enabled as well. If both are enabled, the final size of coreinfo.elf is reduced from 95 KiB to 92 KiB. Tested in QEMU and on Thinkpad T500. Change-Id: I6feacdb911b52b946869bff369e03dcf72897c9f Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38293 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-02libpayload: Add support for link time optimizationJacob Garber
Link time optimization is a technique for whole-program optimization. Instead of doing code generation during compilation, the compiler saves its intermediate representation to the object files. During the final linking step, it will then merge all the object files together and perform optimizations on the entire program. This can often reduce the final binary size, but also may increase the total compilation time. This patch introduces a Kconfig option for enabling link time optimization in libpayload. Since libpayload does no linking of its own, its LTO archive files will contain only IR and no generated code. Downstream projects will need to use LTO-aware tools when manipulating the archives (eg. gcc-ar and gcc-nm), but otherwise do not need to use LTO themselves -- the compiler will recognize which files are LTO and which are not, so enabling this option should mostly be "drop in". For example, when building coreinfo.elf using tinycurses libpayload: binary size compilation time default 114 KiB 11.49s LTO 95 KiB 10.36s In this case the total compilation time was actually shorter -- despite the final linking step taking longer, this was offset by the shorter compilation times for each individual file (since there is no code gen until the very end). Change-Id: I048f2ff6298ed0d891098942e1e8b29d35487b91 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38291 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-02libpayload/x86: Try to discover invariant TSC rateNico Huber
We can skip the PIT-based TSC calibration if we can derive the invariant TSC rate from CPUID/MSR data. This is necessary if the PIT is disabled, which is the default, for instance, on Coffee Lake CPUs. This implementation should cover all Intel Core i processors at least. For older processors, we fall back to the PIT calibration. Change-Id: Ic6607ee2a8b41c2be9dc1bb4f1e23e652bb33889 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34170 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2020-11-02libpayload/x86: Add enumeration of Intel family 6 modelsNico Huber
The list is incomplete and only contains what we need in the follow-up commit. It can be extended at will. Change-Id: Ibf8ddaf510eb513ee74af3e78da46b04802a91b9 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-30lib/libpayload: Replace strapping_ids with new board configuration entryTim Wawrzynczak
There are currently 3 different strapping ID entries in the coreboot table, which adds overhead. The new fw_config field is also desired in the coreboot table, which is another kind of strapping id. Therefore, this patch deprecates the 3 current strapping ID entries (board ID, RAM code, and SKU ID), and adds a new entry ("board_config") which provides board ID, RAM code, SKU ID, as well as FW_CONFIG together. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I1ecec847ee77b72233587c1ad7f124e2027470bf Reviewed-on: https://review.coreboot.org/c/coreboot/+/46605 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-10-30.gitignore: Split into subdirectory filesPatrick Georgi
There's no need for the global list of files to ignore, so use git's ability to work with more local configuration. Change-Id: I50882e6756cbc0fdfd899353cc23962544690fb3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46879 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-28payloads/filo: Set stable tag to something that buildsNico Huber
Also rename the prompt to "tested" to make it more obvious that there is no really stable version. Change-Id: Ib719fe5c30783a53ddad2a2dc2d9ecda37a05ac2 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2020-10-26libpayload/keyboard: Use `bool` as return typeNico Huber
Use `bool` whenever `0` was used to indicate an error. The mixing of different types for return values was mildly confusing and potentially dangerous with the i8042 API close by that uses `0` for success. Change-Id: I876bb5076c4921f36e3438f359be8ac4c09248cc Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46723 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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