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This patch introduces x86_64 (64-bit) support to the payload, building
upon the existing x86 (32-bit) architecture. Files necessary for 64-bit
compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig
option.
BUG=b:242829490
TEST=Able to verify all valid combinations between coreboot and
payload with this patch.
Payload Entry Point Behavior with below code.
+----------------+--------------------+----------------------------+
| LP_ARCH_X86_64 | Payload Entry Mode | Description |
+----------------+--------------------+----------------------------+
| No | 32-bit | Direct protected mode init |
+----------------+--------------------+----------------------------+
| Yes | 32-bit | Protected to long mode |
+----------------+--------------------+----------------------------+
| Yes | 64-bit | Long mode initialization |
+----------------+--------------------+----------------------------+
Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81968
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This patch passes the correct flag to vboot to enable SIMD crypto
acceleration on arm64 devices. This uses a core part of the ISA and
should thus be supported on all arm64 SoCs -- so we normally always
want it enabled, but there should still be a Kconfig in case a SoC wants
to use the hwcrypto interface for its own (off-CPU) crypto acceleration
engine instead. (You could also disable it to save a small amount of
code size at the cost of speed, if necessary.)
Change-Id: I3820bd6b7505202b7edb6768385ce5deb18777a4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80710
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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The .inc suffix is confusing to various tools as it's not specific to
Makefiles. This means that editors don't recognize the files, and don't
open them with highlighting and any other specific editor functionality.
This issue is also seen in the release notes generation script where
Makefiles get renamed before running cloc.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ie7038712de8cc646632d5e7d29550e3260bf2c62
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80103
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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If CONFIG_LP_ARCH_MOCK, pass FIRMWARE_ARCH=mock when building vboot
fwlib, so that vboot's Makefile will append the correct flags to CFLAGS.
BUG=none
TEST=(depthcharge) make unit-tests -j
BRANCH=none
Cq-Depend: chromium:5182247
Change-Id: I9ead7f2f93eac5f5c3887074423fb9aa50a489c0
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79956
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add `VBOOT_X86_RSA_ACCELERATION' Kconfig option to enable SSE2
instruction set implementation of modulus exponentiation which is part
of the RSA signature verification process. This option is enabled on
CHROMEOS.
| modpow() function call | original on rex0 | SSE2 on rex0 |
|------------------------+------------------+--------------|
| depthcharge - step 1 | 0.547 | 0.288 |
| depthcharge - step 2 | 0.152 | 0.081 |
| depthcharge - step 3 | 0.164 | 0.079 |
|------------------------+------------------+--------------|
| Total (ms) | 0.863 | 0.448 |
| modpow() function call | original on brya0 | SSE2 on rex0 |
|------------------------+-------------------+--------------|
| depthcharge - step 1 | 0.693 | 0.248 |
| depthcharge - step 2 | 0.172 | 0.065 |
| depthcharge - step 3 | 0.223 | 0.067 |
|------------------------+-------------------+--------------|
| Total (ms) | 1.088 | 0.38 |
BUG=b:312709384
TEST=modular exponentiation is about twice faster on rex0 and brya0
Change-Id: I801ebd7839261c6bd07fb218e1e36a7108e219bf
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79290
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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If LP_VBOOT_CBFS_INTEGRATION is enabled, then libcbfs will reboot with
vboot failure in non-recovery mode on CBFS file hash mismatch.
BUg=b:197114807
TEST=Build with VBOOT_CBFS_INTEGRATION enabled and boot on
google/ovis4es device
Change-Id: Ic0f62212b7217b384e8c4cbd9535fe4243301f8c
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77726
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add Kconfig option for VBOOT_SHA_ARMV8_CE, which will use ARMv8 Crypto
Extension for SHA256[1] instead of software implementation.
[1] https://crrev.com/c/4170144
BUG=b:263514393
BRANCH=corsola
TEST='vboot kernel verification' gets 111 msecs improvement on
Tentacruel.
Before:
1100:finished vboot kernel verification 905,150 (123,518)
After:
1100:finished vboot kernel verification 787,277 (12,254)
Cq-Depend: chromium:4170144, chromium:4242678
Change-Id: If92830830a0658dfad2a066e9efa624783865cf2
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72710
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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Include paths fixup macro for vboot was broken and was adding
unnecessary prefix to paths from $(coreboottop). This patch adds correct
filters to fix this behavior.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I264e715fa879a4e56b6e5f5423916298e8780a2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63002
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ia63d44de5440b87cedb35ff92edaa0f35ccd75a4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I1a72ea63a46dedd1fc2e1e53bf7714ad70ebc5e1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Lack of strip made it required to pass arguments to the
kconfig-to-binary macro without spaces. Strip fixed invalid behavior of
this macro.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I9889b45f773b9675fae287086d324c180c505a4b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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New CBFS API uses commonlib/bsd/cbfs_serialized.h, which includes
vboot's vb2_sha.h. And, because vboot's includes are not available
in libpayload's installation directory nor in lpgcc paths, it was
causing compilation errors. This patch fixes this issue.
lpgcc will look for `vboot` directory like it is doing for `include`
directory to create correct paths. However, if payload will be built
using libpayload's build dir as a base, then vboot headers from
3rdparty/vboot will be used, as there is no way to pass VBOOT_SOURCE
from makefile to lpgcc.
Moreover, this patch moves VBOOT_SOURCE to the main Makefile to
make it available for installation target, to install headers from
vboot directory provided by caller.
Change-Id: I68dd7e1545cfcaf24547d8a9fe289447c79da222
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reported-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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This patch introduces building and linking of 3rdparty/vboot with
libpayload. VBoot can be enabled by setting CONFIG_LP_VBOOT_LIB.
Moreover it can be configured to use either TPM or TPM 2.0 mode,
and whether to use SHA256 processor extension instructions on x86.
Change-Id: I2d9d766a461edaa0081041c020ecf580fd2ca64e
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60080
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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