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path: root/payloads/libpayload/include/sysinfo.h
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2015-03-21libpayload: Add RAM code to sysinfo_tDavid Hendricks
This adds CB_TAG_RAM_CODE and an entry to sysinfo_t. BUG=chrome-os-partner:31728 BRANCH=none TEST=Built and booted on pinky w/ depthcharge patch and saw that /proc/device-tree/firmware/coreboot/ram-code contains correct value Change-Id: I35ee1bcdc77bc6d4d24c1e804aefdbbfaa3875a4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ca6d044f2e719ded1d78a5ab3d923e06c3b88d6b Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I69ee1fc7bc09c9d1c387efe2d171c57e62cfaf3f Original-Reviewed-on: https://chromium-review.googlesource.com/231132 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/8755 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-21libpayload: Add support for parsing RAMOOPS range from corebootFurquan Shaikh
CQ-DEPEND=CL:228856 BUG=chrome-os-partner:33676 BRANCH=None TEST=Compiles and boots to kernel prompt. ramoops console log verified after causing kernel to fault. Change-Id: I5af9b995113ee30ac60347acba8fa945fb5cd17a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 80c843fc78b137eb5540f8fefc4a69545b896fb6 Original-Change-Id: I8886015977e1fd999ef74fe73d08cff935cbce5c Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/228742 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8754 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21libpayload: make wifi calibration table available through sysinfoVadim Bendebury
The WiFi calibration blob saved in the CBMEM by coreboot needs to be visible by depthcharge to supply it to the kernel. BRANCH=storm BUG=chrome-os-partner:32611 TEST=none yet Change-Id: I43a857f073a47ca315d400df4c53d5eb38e91601 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 46a649608e6740e07c562c722fadd8c64e264b5f Original-Change-Id: Iecd8739c9269b58064b3c3275f5376cebcd6804b Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/225506 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8753 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-20libpayload: cros: include mac addresses in coreboot tableVadim Bendebury
Pass MAC addresses found in coreboot table into lib_sysinfo. BUG=chrome-os-partner:32152 TEST=with all changes in place MAC addresses are properly inserted into the kernel device tree. Change-Id: I6b13c1c2c246362256abce3efa4a97b355647ef8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e2fe74f86b4ed43eb8a3c9d99055afc5d6fb7b78 Original-Change-Id: I1d0bd437fb27fabd14b9ba1fb5415586cd8847bb Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/219444 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8751 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-03-20libpayload: Consolidate coreboot table parsingVadim Bendebury
There are three instances of coreboot.c in libpayload. for x86, arm and arm64 architectures. The arm and arm64 instances are exactly the same. The differences with the x86 instance are as follows: - a very slightly different set of coreboot table tags is parsed (one tag added and two removed) - instead of checking a fixed address if it contains the coreboot table, the x86 version iterates over two address ranges. This patch refactors the module, leaving architecture specific processing in arch subdirectories and moving the common code into libc. BUG=none TEST=none yet Change-Id: I1c7ad6f74e3498e93df78086ba0ff708c08e0a5c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3df209d58ebd5c5b1cf0168f6466e065d1ef3598 Original-Change-Id: I6dfed73f6ba5939f692d0f98d2774c0e0312a25f Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/210770 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8750 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-20libpayload: Add board id parsingVadim Bendebury
Make board ID value supplied in the coreboot table available to the bootloader on all three architectures. BUG=chrome-os-partner:30489 TEST=none yet Change-Id: I6c2d39e94212b55650929d7d99896581d23f789d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 723e4a600a5d3a03e960169b04f8322f6dd2486b Original-Change-Id: I7847bd9fe2d000a29c7ae95144f4868d926fb198 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/210430 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/8730 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-08-05libpayload: Change CONFIG_* to CONFIG_LP_* in the kconfig.Gabe Black
When libpayload header files are included in the payload itself, it's possible that the payloads config settings will conflict with the ones in libpayload. It's also possible for the libpayload config settings to conflict with the payloads. To avoid that, the libpayload config settings have _LP_ (for libpayload) added to them. The symbols themselves as defined in the Config.in files are still the same, but the prefix added to them is now CONFIG_LP_ instead of just CONFIG_. Change-Id: Ib8a46d202e7880afdeac7924d69a949bfbcc5f97 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/65303 Reviewed-by: Stefan Reinauer <reinauer@google.com> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 23e866da20862cace0ed2a67d6fb74056bc9ea9a) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6427 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-01-30libpayload: Parse CBMEM ACPI GNVS pointerDuncan Laurie
Pull the ACPI GNVS pointer from CBMEM and expose it in the sysinfo structure for use by payloads. BUG=chrome-os-partner:24380 BRANCH=none TEST=build and boot rambi with emmc in ACPI mode Change-Id: I47c358f33c464a4a01080268fb553705218c940c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179900 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/5016 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-28libpayload: adjust max number of memrangesAaron Durbin
Rambi currently has more than 16 memory ranges. Because of this libpayload is silently dropping them and the full amount of memory is not being properly wiped. Correct this by bumping the number of ranges to 32. BUG=None BRANCH=None TEST=Built and booted rambi. Noted that the full amount of memory was being properly wiped. Change-Id: Ida456decf2498cb1547c0ceef23df446a975606b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175792 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/4942 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2013-03-29libpayload: add x86 ROM variable MTRR supportAaron Durbin
On x86, coreboot may allocate a variable range MTRR for enabling caching of the system ROM. Add the ability to parse this structure and add the result to the sysinfo structure. An example usage implementation would be to obtain the variable MTRR index that covers the ROM from the sysinfo structure. Then one would disable caching and change the MTRR type from uncacheable to write-protect and enable caching. The opposite sequence is required to tearn down the caching. Change-Id: I3bfe2028d8574d3adb1d85292abf8f1372cf97fa Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2920 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-22libpayload: Add comments on virtual pointers in lib_sysinfoNico Huber
After another incident related to virtual pointers in lib_sysinfo (and resulting confusion), I decided to put some comments on the matter into the code. Remember, we decided to always use virtual pointers in lib_sysinfo, but it's not always obvious from the code, that they are. See also: 425973c libpayload: Always use virtual pointers in struct sysinfo_t 593f577 libpayload: Fix use of virtual pointers in sysinfo Change-Id: I886c3b1d182cba07f1aab1667e702e2868ad4b68 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/2878 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-14libpayload: add support for vboot_handoffAaron Durbin
The vboot_handoff structure needs to be parsed from the coreboot tables. Add a placeholder in sysinfo as well as the ability to parse the coreboot table entry concering the vboot_handoff structure. Built with unified boot loader and ebuild changes. Can find and use the VbInitParams for doing kernel selection. Change-Id: If40a863b4a445fa5f7814325add03355fd0ac647 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2720 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-15libpayload: Use #ifdef for CONFIG_* checksNico Huber
Libpayload uses the linux kernel's config style, where CONFIG_* defines don't get written for unset tristates. Change-Id: I3f832cf86bca9a1e153d96af4bf6434a19eba2f6 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1847 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-08Update libpayloads understanding of the coreboot tables.Gabe Black
Give it somewhere to put the new info in sysinfo, and tell it how to parse the new tables which it doesn't yet understand. Change-Id: I01d3318138696e6407553c27c1814f79e3fbc4f8 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://review.coreboot.org/1718 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-07Update the way serial info is read from the coreboot tables.Gabe Black
This information is now stored in a structure instead of in a few seperate fields. libpayload hadn't been updated to reflect the new layout or to consume the new information intelligently. Change-Id: Ice3486ffcdcdbe1f16f9c84515120c591d8dc882 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://review.coreboot.org/1724 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
2012-01-07Cleanup access to vendor/part # infoPhilip Prindeville
Instead of macros to access MAINBOARD record, use convenience functions. Store pointers to MAINBOARD and HEADER for use outside of CB code. Change-Id: I074e3a0df7d25726cbd942538bfdc5a63dd17e12 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/502 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-03libpayload: Put coreboot version into lib_sysinfoMathias Krause
Change-Id: I22319efe90e475c66b9556f734a7a5e54f7c59bc Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/394 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-04-16Allow libpayload to use an OXPCIe 952 card on systems without ↵Stefan Reinauer
onboard serial port Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6508 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-25Add coreboot framebuffer support to libpayloadStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-31* drop duplicate prototype for lib_get_sysinfo()Stefan Reinauer
* fix delay handling in tiny curses keyboard driver * fix off by one error in video driver Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-17Add type field to memranges, and fill it from the source data.Patrick Georgi
type field contains e820 type ids, which are used by coreboot and multiboot (the two source formats), so they can be used as-is. The MEMMAP_RAM_ONLY define is a way to allow a payload to opt for only having CB_MEM_RAM type fields, which might be helpful to support older payloads easily (just add the define, and it won't encounter "weird" fields) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4291 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-11[PATCH] Add sysinfo_have_multiboot functionJordan Crouse
Add a new infrastructure for returning system information to payloads. First up - a pointer to the multiboot table. Signed-off-by: Jordan Crouse <jordan@cosmicpenguin.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-19misc fixes:Stefan Reinauer
* give struct memrange a name * add explicit cast. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3525 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-07add get_option to libpayload, so coreboot cmos options can be queried.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-11Various small consistency fixes (trivial):Uwe Hermann
- Use _FOO_H include guard format everywhere. - Add missing speaker.c prototypes to libpayload.h. - Consistently use short form u8/u16/u32 instead of uint8_t et. al. - kcofig: Use 'depends on' instead of 'depends', which seems deprecated. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3234 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20Cosmetics, coding style fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-19libpayload: The initial chunk of code writen by AMDJordan Crouse
This is the initial chunk of code written by me and copyrighted by AMD. Includes everything but a few files that we pulled from outside sources. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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