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path: root/payloads/libpayload/include/pci/pci.h
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2021-04-07libpayload/storage: Add NVMe driverThomas Heijligen
Tested with qemu virtual NVMe and Intel hardware. Works with FILO. Change-Id: Ie75b1dc743dac3426c230c57ee23b771ba3a6e0c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33582 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-20libpayload/storage/ahci: Use pacc pointer to read device classFelix Singer
The PCI bus gets already scanned while gathering system information. Therefore, use the pacc pointer from sysinfo_t to read the device class of PCI devices instead of rescanning the bus. Change-Id: I4c79e71777e718f5065107ebf780ca9fdb4f1b0c Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46416 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-10-17libpayload/libpci: Introduce device class attribute in pci_devFelix Singer
The device class is read at different places and it is read from the hardware directly. Therefore, and in preparation to CB:46416, introduce the device class attribute in the pci_dev struct. With this, there is only one interaction with the hardware and it's also more user friendly. Change-Id: I5d56be96f3f0da471246f031ea619e3df8e54cfb Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46347 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-12-07libpayload: Add pci_free_dev() and some boilerplateNico Huber
Add just enough code and boilerplate to keep it compatible with future libflashrom. Change-Id: If0d46fab141da525f8f115d3f6045a8c417569eb Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20955 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-08-10libpayload/libpci: Add a constant for PCI class memory otherNico Huber
Change-Id: I71e902c4ec843608c1518fe1e8b90fbcf98a13d1 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-21libpayload/pci: Correct MASK macro namesFurquan Shaikh
BUG=chrome-os-partner:54563 Change-Id: I8ef1c595205fe46dd64357051eeb232e2bbbebc1 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15270 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-08-26libpayload: Add a few more PCI constantsStefan Tauner
flashrom has started to use revision IDs to distinguish AMD chipsets and fails (even more) to build with libpayload since then because PCI_REVISION_ID is undefined in libpayload's pci header. Change-Id: If7440a48c1005a4ba4fc09303f47cdfa9f408ad1 Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/3884 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2012-12-10libpayload: Fix renaming of REG_CLASS_DEV to REG_SUBCLASSNico Huber
REG_CLASS_DEV was renamed to REG_SUBCLASS. Change-Id: I4af476b953b544f680337d815889564f016563eb Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1986 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-01libpayload: remove trailing whitespace and run dos2unixStefan Reinauer
Change-Id: Iffed3602456f5306711c65f06c873c58d4086e11 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/363 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-08-17libpayload: Some more compatibility (for flashrom)Patrick Georgi
libpci defines an arbitrary set of PCI vendor IDs, flashrom uses the Intel definition. Add it. flashrom also requires inttypes.h, so add the OpenBSD version Change-Id: I9bffd8193f635c375ac4d6b6eae8d3d876b95f5f Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/154 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-03-01libpayload: Add more libpci-compatibility (#defines)Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6417 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01libpayload: Implement pci_cleanup()Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6416 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-16Add #define that states the libpci interface version we implementPatrick Georgi
(flashrom needs it) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-06-24Incomplete implementation of libpci's (of pciutils) interface.Patrick Georgi
No pciutils code was harmed in its production - this code was written by looking at flashrom's expectations, so there's no license pollution. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1