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path: root/payloads/libpayload/drivers
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2018-08-08libpayload/drivers/usb/xhci: Replace raw values with constantsRaul E Rangel
BUG=none TEST=compiled on grunt and made sure USB still works in depthcharge Change-Id: I972f4604bb5ff3838cb15f323c5a579ad890ecf5 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/27883 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2018-07-17libpayload/generic_hub: Detect port disconnect after resetRaul E Rangel
If a port disconnects after a reset we should abort any initialization on the port. This might mean the device has re-enumerated as a 3.0 device so the hub should be scanned again. BUG=b:76831439 TEST=Verified USB-C devices that get detected correctly in depthcharge. Change-Id: Iad899544684312df1bef08d69b5c7f41eac3a21c Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/27477 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-17libpayload/xhci: Check noop return code when debuggingRaul E Rangel
Make it obvious that the command has failed. BUG=b:76831439 TEST=Verified on grunt Change-Id: Ifa0b2fb087f5f0a36ba017a774fc98b33ab035a4 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/27478 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-17libpayload: Add UNKNOWN_SPEED to usb_speed enumRaul E Rangel
xhci_rh_port_speed return -1 if the port is disabled. The usb_speed enum is unsigned so this results in a positive value which implies success. Adding a -1 to the enum will make it signed so the >= 0 check will work correctly. BUG=b:76831439 TEST=verified on grunt that -1 is returned when port is disabled. Change-Id: I98a373717d52dfb6ca4dcc53a00dc1b4c240a919 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/27476 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-16libpayload/xhci: Document struct offsets on xhci_tRaul E Rangel
This makes it easier to know what offset each register references. BUG=b:76831439 TEST=none Change-Id: I92dcbd463ceb4dd8edbbd97b51a4e9aa32a983a6 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/27474 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-07-02payloads/libpayload/drivers/i8042: Disable scanning on disconnectFurquan Shaikh
This change ensures that keyboard scanning is disabled and keyboard is set to default state while disconnecting the keyboard. This is required to ensure that the controller doesn't keep scanning and buffering keystrokes which could lead to OS drivers reading stale data. BUG=b:110024487 TEST=Verified that kernel driver is able to probe correctly even if multiple keys are pressed during handoff from payload to OS. Change-Id: I1ffb8904d545284454c1825ee2e7c0087fc13762 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27290 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-07-02payloads/libpayload/drivers/i8042: Add macros for i8042 commandsFurquan Shaikh
This change adds macros for commands (written to 0x64) and keyboard commands (written to 0x60) for 8042 controller. BUG=b:110024487 Change-Id: I74b2388d048e35b5bdf5bd862d0975e88f1bd6af Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-05-31libpayload-x86: Export keyboard modifiersPatrick Rudolph
Add function to get active keyboard modifiers. Change-Id: Ifc7bd4aa86f20d67c5b542d0458b966e605c5499 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18601 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31libpayload: Export usbhid_getmodifiersPatrick Rudolph
Add a new method to retrieve active usb keyboard modifiers. Change-Id: Ief6679ce782b58b9ced207f4f27504fb2a517b76 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18602 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-30libpayload-x86: i8042: fix i8042_data_ready_ps2 and i8042_data_ready_auxHannah Williams
keyboard_disconnect was called without keyboard_init being called and in this case keyboard_havechar returns true because i8042_data_ready_ps2 is dereferencing uninitialized variable ps2_fifo from within fifo_is_empty causing keyboard_disconnect to be stuck in this while loop. while (keyboard_havechar()) keyboard_getchar(); BUG=b:80299098 TEST=Check if the normal mode path in depthcharge is not causing a hang Change-Id: I944b4836005c887a2715717dff2df1b5a220818e Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/26590 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-15libpayload-x86: Add PS2 mouse driverPatrick Rudolph
Make use of i8042 driver to add PS2 mouse driver support. Tested on Lenovot T500. The touchpad can be used to drive the mouse cursor. Change-Id: I4be9c74467596b94d64dfa510824d8722108fe9c Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-05-15libpayload-x86: keyboard: Use i8042 driverPatrick Rudolph
Make use of i8042 driver in keyboard.c. Required to add PS/2 mouse support. Tested on Lenovo T500. Change-Id: If60b5ed922b8fc4b552d0bfd9fe20c0fd6c776bf Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18596 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15libpayload-x86: Move keyboard.cPatrick Rudolph
Move keyboard.c into i8042 folder. Change-Id: Idd30a9082e48a451d9fe5ead3f3dda4e6396b50c Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18595 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15libpayload-x86: Add common i8042 driverPatrick Rudolph
Add a common i8042 driver that uses multiple overflowing fifos to seperate PS/2 port and PS/2 aux port. Required to support PC keyboard and PC mouse at the same time. Tested on Lenovo T500. Change-Id: I4ca803bfa3ed45111776eef1f4dccd3fab02ea39 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18594 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-02payloads/libpayload: Add spaces around '=='Elyes HAOUAS
Change-Id: Ie1da925aceb01c2d21b472bf171000803004578f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25856 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-05-01libpayload: Add Timer for sdm845T Michael Turney
Uses ARCH64 Timer TEST=build Change-Id: Ic312bcf3bc7e80482b7f038e2dbc4abaaffd5956 Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/25214 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-04-29libpayload/drivers/usb/ohci_private.h: Add parentheses around macroElyes HAOUAS
Change-Id: Ib90564e32f5ff204aa5d856024b7eed2624a77b7 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-02-16libpayload: usbhid: Zero-initialize all parts of usbhid instance structJulius Werner
The USBHID driver zero-initializes some but not all of the fields in its usbhid_inst_t structure. This is a problem because under some circumstances, some of the uninitialized fields may be read and lead to incorrect behavior. Some (broken) USB keyboards keep sending reports that contain all zeroes even when they have no new keys... these usually get silently ignored, but if the usbhid_inst_t structure is in an inconsistent state where 'previous' is zeroed out but 'lastkeypress' is non-zero because it wasn't properly initialized, these reports will be interpreted as keyrepeats of the bogus 'lastkeypress'. This patch changes the code to just xzalloc() the whole structure so we won't have to worry about initialization issues anymore. Change-Id: Ic987de2daaceaad2ae401a1e12b1bee397f802ee Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/23766 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-01-26libpayload: allow x86 devices to provide non-tsc implementationAaron Durbin
Make is so that a different timer source can be provided instead of TSC on x86 platforms. BUG=b:72378235,b:72170796 Change-Id: I6faeecf7624a5aa4e1af8862036f1fbd2f54eb51 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/23435 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-09-02libpayload/storage: Add Sunrise Point AHCI PCI idNico Huber
Change-Id: I9645d76d05014722e4ae0c398d82f7f8e34d6f1c Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/21289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-08-10libpayload: Use a static copy of `font_glyph_filled()`Paul Menzel
libpayload needs a static copy of the out of line function `font_glyph_filled()` in every TU that needs it. So make it static inline. This fixes a build error by gcc (Debian 7.1.0-12) 7.1.0 from Debian Sid/unstable. This happens with any libpayload based payload like coreinfo, nvramcui or tint. ``` […] LPCC build/coreinfo.elf (LINK) /src/coreboot/payloads/coreinfo/build/libpayload/bin/../lib/libpayload.a(corebootfb.libc.o): In function `corebootfb_putchar': /src/coreboot/payloads/libpayload/drivers/video/corebootfb.c:173: undefined reference to `font_glyph_filled' […] ``` Change-Id: I931f0f17b33abafdc49aa755a0dad65e28820750 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/20897 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-08-03libpayload: video: Add support for font scaling with a factorPaul Kocialkowski
This introduces support for font scaling with a factor provided via Kconfig. In practice, the font itself is not scaled at any point in memory and only the logic to determine whether a pixel should be filled or not is changed. Thus, it should not significantly impact either the access time or memory use. Change-Id: Idff210617c9ec08c6034aef107cfdb34c7cdf029 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/20709 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-08-03libpayload: video: Introduce helpers for font accessPaul Kocialkowski
This introduces helpers for accessing the included font, instead of using hardcoded values provided by the font's header itself. It will allow painlessly adding support for font scaling in a subsequent change. It should not introduce any functionality change. Change-Id: I0277984ec01f49dc51bfc8237ef806f13e3547e2 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/20708 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-07-27libpayload/storage: Replace 1s AHCI reset delay with a timeoutNico Huber
AHCI spec explicitly states that we may poll. TEST=Ran FILO on kontron/bsl6 and observed that the controller always becomes ready during the first delay. Change-Id: If34694abff14d719d10d89bc6771dbfa12065071 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20764 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-27libpayload/storage: Enable bus mastering for AHCINico Huber
This is (thankfully) not done by coreboot any more for recent chipsets. Change-Id: If56e38037f7b1e53871ee63e6ff297028c59d493 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20763 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
Also unify __attribute__ ((..)) to __attribute__((..)) and handle ((__packed__)) like ((packed)) Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/15921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-06-28libpayload: Add mouse cursor driverPatrick Rudolph
Add a driver to handle multiple low level mouse drivers and provide basic cursor acceleration support. Tested on Lenovo T500. Change-Id: Ib7cec736631b8acf81a14d28daa29ff720777b10 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18593 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-28payloads: Add whitespace around '<<'Elyes HAOUAS
Change-Id: I0659f6ec59fb808b4cedf57d60d737c13c250042 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20396 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27libpayload/drivers/usb/ehci_private.h: Add brackets around macroElyes HAOUAS
Change-Id: Iee8dc03d5a4ca7537c7da4fed2c67b169c9e2422 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20376 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-06-27libpayload/drivers/usb/xhci_private.h: Add parentheses around macroElyes HAOUAS
Change-Id: I0347594e9480dedc4845b6863733a67fc5e47e1c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20371 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-27libpayload/drivers/usb/ohci_private.h: Add brackets around macroElyes HAOUAS
Change-Id: Id4892adba161cd08eecde71a011384b6c465b98f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20372 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-06-27libpayload: corebootfb: Add null check for framebuffer addressDuncan Laurie
If the framebuffer address is zero the corebootfb_init() function should abort and not attempt to use it for video, otherwise it will likely hang. This was tested by booting on a board that does not have a display attached and includes the previous patch to zero the framebuffer structure in the coreboot tables. Change-Id: I53ca2e947a7915cebb31b51e11ac6c310d9d6c55 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/20368 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-25detachables: Add invert parameterShelley Chen
Instead of storing inverted-colored bitmaps, invert drawing of text bitmap on the fly by adding an invert parameter down to libpayload. Merging pivot and invert fields into flags field. BUG=b:35585623 BRANCH=None TEST=Make sure compiles successfully CQ-DEPEND=CL:506453 Change-Id: Ide6893a26f19eb2490377d4d53366ad145a9e6e3 Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://review.coreboot.org/19698 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-05-01cbgfx: Add portrait screen supportNickey Yang
cbgfx currently does not support portrait screen which height >width. so add it. Change-Id: I66fee6d73654e736a2db4a3d191f030c52a23e0d Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Reviewed-on: https://review.coreboot.org/19474 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-04-20Turn CBMEM console into a ring buffer that can persist across rebootsJulius Werner
This patch allows the CBMEM console to persist across reboots, which should greatly help post factum debugging of issues involving multiple reboots. In order to prevent the console from filling up, it will instead operate as a ring buffer that continues to evict the oldest lines once full. (This means that if even a single boot doesn't fit into the buffer, we will now drop the oldest lines whereas previous code would've dropped the newest lines instead.) The console control structure is modified in a sorta backwards-compatible way, so that new readers can continue to work with old console buffers and vice versa. When an old reader reads a new buffer that has already once overflowed (i.e. is operating in true ring buffer mode) it will print lines out of order, but it will at least still print out the whole console content and not do any illegal memory accesses (assuming it correctly implemented cursor overflow as it was already possible before this patch). BUG=chromium:651966 TEST=Rebooted and confirmed output repeatedly on a Kevin and a Falco. Also confirmed correct behavior across suspend/resume for the latter. Change-Id: Ifcbf59d58e1ad20995b98d111c4647281fbb45ff Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18301 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-19libpayload/libc/console: Flush input driver buffer on initFurquan Shaikh
When console input driver registers itself, perform flush of input buffer to avoid interpreting any stale key presses before libpayload is run. keyboard.c: Remove the redundant buffer flush. 8250.c: Ensure that serial_hardware_is_present is set before call to add input driver. BUG=b:37273808 TEST=Verified that any key presses in serial console before payload is up do not have any effect after the payload starts running. Change-Id: I46f1b6715ccf6418f5b2c741bf90db2ece26a60d Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19345 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-17libpayload: cbgfx: Show square images on portrait displaysJulius Werner
CBGFX currently doesn't support portrait screens at all. This will have to be fixed eventually but might take a bit of effort. As a first step to make devices with a portrait panel somewhat usable, this patch will just force a square canvas on these panels and keep the bottom part of the screen black. Also switch set_pixel to calculate framebuffer position via bytes_per_line instead of x_resolution. This is supposed to be the canonical way to do that and may differ in cases where the display controller requires a certain alignment from framebuffer lines. Change-Id: I47dd3bf95ab8a7d8b7e1913e0ddab346eedd46f1 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/19279 Tested-by: build bot (Jenkins) Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2017-03-15libpayload: usbhub: Force enumeration of all connected ports on initJulius Werner
We have found a non-compliant USB hub (RealTek RTS 5413) that does not set a port's Connect Status Change bit on its USB 3.0 half if the port had already been connected while the hub was being reset. To work around this bug, this patch adds code to initially request the status of every port after a hub was enumerated, clear the Connect Status Change bit if set, and then enumerate the port iff it is currently connected, regardless of whether the change bit was set. A similar behavior can also be found in the Linux kernel. BRANCH=oak BUG=b:35929438 TEST=Booted Elm with this change, my USB 3.0 sticks enumerate now even if they had been plugged in since boot. Change-Id: I8a28252eb94f005f04866d06e4fc61ea265cee89 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18729 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-01-24libpayload: drivers/keyboard: report power button eventsShelley Chen
Power button events are usually dropped because the button is not in the keyboard matrix range. Add condition to forward it like other keys. BUG=chrome-os-partner:61275 BRANCH=None TEST=reboot and make sure power button selection in depthcharge's detachable menus is processed on reef. Change-Id: I86897fa8d73a56533ef62bba05458ac3d339237e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 25654e214f0ab8685d445ced62612a02be851126 Original-Change-Id: I516a0043bd7730789728d5c5498d0a0f30a2acac Original-Signed-off-by: Shelley Chen <shchen@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/428199 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://review.coreboot.org/18177 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-13libpayload: usb: Reset ohci controller when trying to shutdown ohciJeffy Chen
Currently we just disabled ohci interrupts when calling ohci_shutdown, Which would not actually shutdown the ohci controller, for example it may still written the increased HccaFrameNumber to Hcca buffer. Perform a soft reset to ohci controller as the linux kernel ohci-hcd driver does. BUG=chrome-os-partner:60996 BRANCH=None TEST=Checked on gru, no more "BUG: Bad page state" error in kernel. Change-Id: I128ab6ba455ac5383a4d48be0bc12b8bb4533464 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4749fc82fdd1b74ca3f2ed3fdf0ef53a5e161087 Original-Change-Id: I3f192aea627ba2fa69533bc0a4270466ca18f2a7 Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/426338 Original-Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://review.coreboot.org/18125 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-01-06libpayload: usb: handle situation with no free device addressPatrick Georgi
Change-Id: I1308bdca90f1a09d980f384ee85552198a39b965 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1260940 Reviewed-on: https://review.coreboot.org/18036 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06libpayload: xhci: plug leakPatrick Georgi
Change-Id: Ia163872846906c6c78144a984a405812f856f626 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1325835 Reviewed-on: https://review.coreboot.org/18035 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06libpayload: timer: cast cpu_khz to make sure 64bit math is usedPatrick Georgi
Change-Id: Iaf84de2330b433076a66c22fa72ffb45e957c0dc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1261177 Reviewed-on: https://review.coreboot.org/18034 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-21libpayload: Get current tick from high register in generic timerPaul Kocialkowski
This fixes the generic timer driver to get the current tick from the high register, so that comparison with the high count value (obtained previously from the same register) has a chance to succeed. Change-Id: I5ce02bfa15a91ad34641b8e24813a5b7ca790ec3 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/17929 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-12-14libpayload/drivers/video: Improve check in if conditionPatrick Georgi
Coverity considers this a copy&paste error, and maybe it is. In any case, it makes sense to check the variable that (if the condition is true) is changed, and the values are the same before that test, so the change is harmless. Change-Id: I163c6a9f5baa05e715861dc19643b19a9c79c883 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1347376 Reviewed-on: https://review.coreboot.org/17837 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-08libpayload: Add Cougar Point PCH's AHCI to whitelistNico Huber
Change-Id: Ie8ca342a32323be4c26c236a5209052ec724317f Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17353 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2016-10-17libpayload: Reintroduce CONFIG_LP_CHROMEOS to set suitable defaultsJulius Werner
Chrome OS builds always have some inherent differences to "standard" libpayload configurations: they don't want to use curses or things like storage drivers, they always use the coreboot framebuffer and USB, etc. This patch reintroduces CONFIG_LP_CHROMEOS as an option that only affects Kconfig defaults. This allows Chrome OS builds to select most of what they need in one go and reduces board-specific .config files to only the options that are really specific to that board. Also restricts the 8250_SERIAL_CONSOLE Kconfig to only default to yes on x86 boards, which probably makes sense for all of libpayload (some but far from all ARM boards use 8250-compatible UARTs, and we should probably not default a platform option unless it's going to be correct with very high probability). BRANCH=None BUG=None TEST=Built and booted Jerry and Oak. Change-Id: Ie0c0593ffd399608d2cbfb83d20891f6f1864914 Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Commit-Id: e558f59 Original-Change-Id: I609637cd2ea7dfb4558aa3c04c90b64038c9ab57 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/347970 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17024 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-10-17libpayload: Replace majority of timer drivers with a generic oneJulius Werner
Currently every non-x86 platform supported by libpayload needs to provide its own timer driver. Most of the ones we have accumulated there look almost identical: For the frequency, return a preset constant. For the value, read a 32-bit register, possibly read another 32-bit register and shift+OR it with the previous one, then return that. Let's replace this with a single .c file that can easily handle all of those cases. Menuconfig convenience can still be maintained by providing several presets that select different defaults for the driver's configuration options (register address(es) and frequency). Removes an "enabled" check from Samsung MCT driver since coreboot always unconditionally enables that timer anyway. CQ-DEPEND=CL:344809 BRANCH=None BUG=None TEST=Booted Oak and Veyron, observed how dev-mode delay was still ~30s Change-Id: I61cb7d2ffd4902aa841c57f9afa9cd991f770acd Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Commit-Id: a036af6 Original-Change-Id: I9784e7c6aa5abd6d92478ea7ec1cf42c9a437546 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/347749 Reviewed-on: https://review.coreboot.org/17023 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-10-09libpayload: mvmap2315: Introduce timer driverHakim Giydan
Testing: booted successfully. Change-Id: I4a50c9fb7aec929ea29a3cf2eec3e424e3629c92 Signed-off-by: Hakim Giydan <hgiydan@marvell.com> Reviewed-on: https://review.coreboot.org/16692 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-02Fix newlines at the end of filesMartin Roth
All but ga-g41m-es2l/cmos.default had multiple final newlines. ga-g41m-es2l/cmos.default had no final newline. Change-Id: Id350b513d5833bb14a2564eb789ab23b6278dcb5 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16361 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Antonello Dettori <dev@dettori.io>
2016-08-02libpayload: split "Drivers" config section in KconfigAntonello Dettori
Move the configuration of the timer, storage and USB drivers from the main Kconfig to three separate ones stored in the respective directories. This reduces the LOC of Kconfig and makes it more manageable. Change-Id: I0786dbc1d5d8317c8ccb600f5de9ef4a8243d035 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/15914 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
This removes the newlines from all files found by the new int-015-final-newlines script. Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15975 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-02cbgfx: Use memset() for faster screen clearing if possibleJulius Werner
cbgfx currently makes a separate function call (recomputing some values) for every single pixel it draws. While we mostly don't care that much about display speed, this can become an issue if you're trying to paint the whole screen white on a lowly-clocked Cortex-A53. As a simple solution for these extreme cases, we can build a fast path into clear_screen() that just memset()s the whole framebuffer if the color and pixel format allow it. BUG=chrome-os-partner:54416 TEST=Screen drawing speed on Kevin visibly improves (from 2.5s to 3ms). Change-Id: I22f032afbb86b96fa5a0cbbdce8526a905c67b58 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/15524 Tested-by: build bot (Jenkins) Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-12libpayload: usb: xhci: Support rockchip xHCI controllerLiangfeng Wu
1. Make the xHCI driver to support xHCI controller v1.1 2. And a new function xhci_ring_doorbell(), it aims to add a memory barrier before ringing the doorbell, to ensure all TRB changes are written to memory. BRANCH=none BUG=chrome-os-partner:52684 TEST=boot from USB on Kevin rk3399 platform Change-Id: Ife1070d1265476d0f5b88e2acf3299fc84af5832 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 0c21e92 Original-Change-Id: I4e38e04dc3c7d32ee4bb424a473c70956a3c3ea9 Original-Signed-off-by: Liangfeng Wu <wulf@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/346831 Original-Commit-Ready: Brian Norris <briannorris@chromium.org> Original-Tested-by: Douglas Anderson <dianders@chromium.org> Original-Reviewed-by: Douglas Anderson <dianders@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/15111 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-05-09libpayload: ipq40xx: Introduce timer and uart driverVaradarajan Narayanan
BUG=chrome-os-partner:49249 TEST=None. Initial code not sure if it will even compile BRANCH=none Change-Id: Ibf2c91be93e2567cc1262b6fb84461eef51ab3e0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b87157138302b017e64a28417a22421c880c1bcb Original-Change-Id: I16a8324d3c8ef4ee729f4509fda5bfe703b24ce4 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/333304 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://review.coreboot.org/14656 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09libpayload: xhci: Set MPS based on speedVaradarajan Narayanan
BUG=chrome-os-partner:49249 TEST=Compiles and boots and detect USB storage BRANCH=none Change-Id: I9007399e1f785e6f1d2258225e3f7cc602053aed Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1db43f53973d2124e41186777caa829aa346ace3 Original-Change-Id: I943d19a3a7d785bd075073b57ba6388662d7df90 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/333311 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14659 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-16libpayload: Split off generic serial API from 8250 driverStefan Reinauer
There is a lot of generic code in the 8250 driver that should be available for non-8250 systems with serial ports as well. Change-Id: I67fcb12b5fa99ae0047b3cbf1815043d3919437e Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14371 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-09libpayload: use 32bit access when accessing 4byte wide uart registersPatrick Georgi
This fixes serial on rk3288. Change-Id: I3dbf3cc165e516ed7b0132332624f882c0c9b27f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/13636 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2016-02-04libpayload: Add timer driver for armada38xRuilin Hao
Add timer driver for armada38x BUG=chrome-os-partner:47462 TEST=emerge-cyclone libpayload BRANCH=tot Change-Id: Iefb6d1fcb907edb54d55ba8addfb66329af6c3c7 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: cd467160ecab050a541a445c2afab9e6bc625635 Original-Change-Id: Id42bafdbc34295b6f8afe5610fb3bab0e0e1b6e8 Original-Signed-off-by: Ruilin Hao <rlhao@marvell.com> Original-Reviewed-on: https://chromium-review.googlesource.com/313343 Original-Commit-Ready: Kan Yan <kyan@google.com> Original-Tested-by: Kan Yan <kyan@google.com> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Yuji Sasaki <sasakiy@chromium.org> Reviewed-on: https://review.coreboot.org/13114 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-14cbgfx: add error code to cbgfx_initDaisuke Nojiri
cbgfx_init can fail for multiple reasons. These codes help debugging cbgfx_init. BUG=chromium:502066 BRANCH=tot TEST=Tested on Glados Change-Id: Ifaa8d91b058bd838a53faf5d803c0337cb1e082c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4caf2496f3583e133f3f216ec401515c267e6e7b Original-Change-Id: I84f60dd961db47fa426442172ab19676253b9495 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/315550 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12930 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2015-11-28libpayload: Remove redundant 8250 MMIO32 UART driverAlexandru Gagniuc
The more generic 8250 driver can handle both port-mapped and memory- mapped 8250-compatible UARTs, with different register sizes. Thus, a separate driver for MMIO32 is not needed. The generic 8250 driver was tested to work for both output and input, on Apollolake SoC, which only presents an MMIO32 UART. Change-Id: Idab766588ddd097649a37de92394b0078ecc660a Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: https://review.coreboot.org/12524 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-11-13libpayload: udc/dwc2: Ignore setup packet in check for queue emptyFurquan Shaikh
during shutdown DWC2 UDC controller always requires an active packet to be present in EP0-OUT to ensure proper operation of control plane. Thus, during shutdown ignore EP0-OUT for queue empty check if only 1 packet is present. BUG=b:24676003 BRANCH=None TEST=Compiles successfully. "fastboot reboot-bootloader" reboots device without timeout in udc shutdown. Change-Id: Iafe46c80f58c4cd57f8d58f060d805b603506bbd Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4e7c27d849c0411aae58e60a24d8170a27ab8485 Original-Change-Id: Ifa493ce0e41964ee7ca8bb3a1f4bb8726fa11173 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/311257 Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12413 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
2015-11-10libpayload/udc: dwc2: Add handler for add_stringsFurquan Shaikh
BUG=b:24676003 BRANCH=None TEST=Compiles successfully. fastboot devices shows serial number for shark. Change-Id: I61d6c168fa458d1f880bc566db997aa5d6398361 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 45b286b318281aea9a4b0362c9259d748b66fd28 Original-Change-Id: Ib9cc22de9daa6c5ec9cde1e62c6f5f768e946069 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/310984 Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12348 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-10libpayload/udc: dwc2: Add timeout for shutdown operationFurquan Shaikh
BUG=b:24676003 BRANCH=None TEST=Verified that udc shutdown returns after the timeout. Change-Id: I5df598c4eddecbecb353343ef5a4e44eae4fc20b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 268913f21adea9969c9f88e3cb759341a60719f0 Original-Change-Id: I3ee059791d6e821f83f9ac41fd7c5385bd60e21e Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/310983 Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12347 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-11-05libpayload: xhci: Add delay to get reset working more reliablyRajmohan Mani
Existing Intel xHCI controllers require a delay of 1 ms, after setting the CMD_RESET bit in command register, before accessing any HC registers. This allows the HC to complete the reset operation and be ready for HC register access. Without this delay, the subsequent HC register access, may result in a system hang, very rarely. Verified CherryView / Braswell platforms go through over 1000 warm reboot cycles (which was not possible without this patch), without any xHCI reset hang in depthcharge. BRANCH=None BUG=None TEST=Verified CherryView / Braswell platforms go through over 1000 warm reboot cycles, without any xHCI reset hang in depthcharge. Change-Id: I8eff5115ca52738bdcf8bc65fbfb2a5f60a0abe1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3e7ea70df36e3bf35a6ee1297640900ee76bfdac Original-Change-Id: Id681a19d0eedb0e2c29e259c5467bcde577e3460 Original-Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/310022 Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/12325 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2015-11-05libpayload: Avoid confusing usb debug output in dwc2 driverPatrick Georgi
enqueue_packet already runs start_ep_transfer, which enqueues the next job. It's pretty much guaranteed that the port will look busy. BUG=none BRANCH=none TEST=no spurious ep 0-0 busy messages Change-Id: I9cbfa7b51dd37564262295ddbcdd0755da40c05b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 8997dbd78dc363334f4e22eaa61f25de1449ffba Original-Change-Id: I8a39713fc1d6f16b80284e0f21dc95685716a9b7 Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/308763 Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: yunzhi li <lyz@rock-chips.com> Reviewed-on: http://review.coreboot.org/12259 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-05libpayload: Fix building dwc2 UDC driver with debug enabledPatrick Georgi
hexdump() now takes a pointer instead of an int-containing-an-address. BUG=none BRANCH=none TEST=building with USB_DEBUG works Change-Id: Idd0c43031a212c8f3b6489f533c488805d98d6a9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 8660f6091bb124eeabe73302e8c7f1a8e46324f1 Original-Change-Id: I266efcb8b939d6da104ad05a3e79a78065c60beb Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/308762 Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: yunzhi li <lyz@rock-chips.com> Reviewed-on: http://review.coreboot.org/12258 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-29libpayload: usbmsc: Add small delay during initialization to fix CZ60Julius Werner
We found that some SanDisk Cruizer Glide CZ60 sticks (confirmed on 16GB and 64GB versions) have a problem responding to our first GET_MAX_LUNS request right after they received their SET_CONFIGURATION. They will continually return a NAK until the host gives up (which is 2 user-noticable seconds for us). Adding a small delay of about 15us seems to be enough to fix the issue, but let's do 50 to be save. Confirmed with both MT8173 and Intel LynxPoint XHCI controllers. BRANCH=None BUG=chrome-os-partner:45473 TEST=No notable delay before detecting stick on Oak and Falco. Change-Id: Ib03944d6484de0ccecbb9922d22666f54c9d53dd Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 589f19a901275fb8b00de4595763a7d577bed524 Original-Change-Id: I95c79fe40d3ad79f37ce2eb586836e5de55be454 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/308980 Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/12229 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-29libpayload: Fix building dwc2 UDC driverPatrick Georgi
Change Ie54699162 changed a structure's name and field names and we didn't notice. Adapt. BUG=none BRANCH=none TEST=building with UDC_DWC2 works Change-Id: I592ebc29b2a08a23e6dbc9d2186807cbbbbca330 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3dda8ad5ffc36593d8b8fd6664a7f9b4816f0f93 Original-Change-Id: I4a065de0f4045a01bef1dc9fbb2e0578b5508518 Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/308791 Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/12228 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2015-10-28cbgfx: Fix spelling of calculate_position()Jason A. Donenfeld
Change-Id: Ib0dc14b197091450596ad01a924539b0e69acd68 Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Reviewed-on: http://review.coreboot.org/12216 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2015-10-27libpayload/libcbgfx: Add license headersPatrick Georgi
Change-Id: I09a9d9eef9d8fe45cdd4d68d29b8d662fe5956e1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/12164 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-27cbgfx: remove load_bitmapDaisuke Nojiri
load_bitmap is no longer needed. BUG=none BRANCH=master TEST=Tested on Samus CQ-DEPEND=CL:305589 Change-Id: I4e598ade20a5d49850f9ad0f13681ea5d16cd8c7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 125bbc98195cbb8378ba0e4c7fece85ffca4cdfa Original-Change-Id: I64d685f7a6367b03455ae2a206b9936613614a24 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/305517 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11930 Tested-by: build bot (Jenkins)
2015-10-27cbgfx: add get_image_dimensionDaisuke Nojiri
get_image_dimension returns the width or height of the image projected on canvas. This is necessary for example when two images of different lengths have to be placed side by side in the center of the canvas and the widths of the images must be adjusted according to the height. BUG=chromium:502066 BRANCH=tot TEST=Tested on Samus Change-Id: I119c83891f48046e888b6b526e63348e74f8b77c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d1a97f0492eb02f906feb5b879b7b43518dfa4d7 Original-Change-Id: Ie13f7994d639ea1556f73690b6b6b413ae64223c Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/304113 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11929 Tested-by: build bot (Jenkins)
2015-10-27cbgfx: make the code more descriptiveDaisuke Nojiri
This change makes the code in graphics.c more descriptive and readable. Especially, it makes expressions for scale calculation look what they are meant to do. It also includes: - Rename variables (struct fraction, dim_org, etc.) for more consistency - Add more input validation (div-by-zero, etc.) BUG=chromium:502066 BRANCH=master TEST=Tested on Samus CQ-DEPEND=CL:304860 Change-Id: I2694912bb7b6017d5655de2fd655b95432addb22 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 0863dc3ee925d3a05c83c66397b19a57f5478ef3 Original-Change-Id: Id8e349b8e09082fb84c3e1a984617f916e16c518 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/304861 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11928 Tested-by: build bot (Jenkins)
2015-10-27cbgfx: add pivot option to draw_bitmapDaisuke Nojiri
This change adds 'pivot' option to draw_bitmap. It controls the point of the image based on which the image is positioned. For example, if a pivot is set to the center of the image horizontally and vertically, the image is positioned using pos_rel as the center of the image. This feature is necessary, for example, to place a text image in the center of the screen because each image has a different width depending on the language. This change also makes draw_bitmap accept both horizontal and vertical size. If either of them is zero, the other non-zero value is used to derive the size to keep the aspect ratio. Specifying the height is necessary to keep font sizes the same when drawing text images of different lengths. draw_bitmap_direct is a variant of draw_bitmap and it draws an image using a native coordinate and the original size (as opposed to the location and the size relative to the canvas). CL:303074 has real use cases. BUG=none BRANCH=tot TEST=Tested on Samus Change-Id: I5fde69fcb5cc9dc53e827dd9fcf001a0a32748d4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 82a0a8b60808410652552ed3a888937724111584 Original-Change-Id: I0b0d9113ebecf14e8c70de7a3562b215f69f2d4c Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/302855 Reviewed-on: http://review.coreboot.org/11927 Tested-by: build bot (Jenkins)
2015-10-27cbgfx: use bilinear interpolation to scale bitmapDaisuke Nojiri
This change replaces the current scaling algorithm (nearest neighbor) used for bitmap rendering with the bilinear interpolation, which has much better reproduction. BUG=none BRANCH=tot TEST=Tested on Samus Change-Id: I02520883debb7db40ffc19d4480244e0acabc818 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 764b383c1763a022728f2b2d9fb90e27c9e32e94 Original-Change-Id: I0ddd184343428904d04d8a76fe18a885529c7d3d Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/302195 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: http://review.coreboot.org/11926 Tested-by: build bot (Jenkins)
2015-10-27cbgfx: add load_bitmapDaisuke Nojiri
This change adds load_bitmap API, which loads a bitmap file from cbfs and returns a pointer to the image data. BUG=none BRANCH=tot TEST=Tested on Samus Change-Id: I7d7874f6f68c414dc877a012ad96c393e42dc35e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9d33e713a0cf6bd1365418dad989e47e86db01e4 Original-Change-Id: Idbf9682c2fa9df3f0bd296ca47edd02cd09cfd01 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/302194 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: http://review.coreboot.org/11925 Tested-by: build bot (Jenkins)
2015-10-27cbgfx: add clear_screenDaisuke Nojiri
clear_screen clears the screen with the specified color. BUG=none BRANCH=tot TEST=Tested on Samus Change-Id: I45e61c67485dbdbe15e2b602718232bc6382ad00 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 1ab04e2cc8d3c3e36e4eb41d9e7b0fdc25595200 Original-Change-Id: I1b3890b9e8ca52e796f417b5f41d4fa02a97a255 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/301451 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: http://review.coreboot.org/11924 Tested-by: build bot (Jenkins)
2015-10-27cbgfx: allow draw_bitmap to render outside canvasDaisuke Nojiri
This change allows draw_bitmap to draw an image outside the canvas with the original size if the scale parameter is zero. This is used for example when drawing a splash screen which has to be positioned at a pixel perfect location. BUG=none BRANCH=master TEST=Draw pictures and boxes on Samus and Ryu Change-Id: Ia2d8799184d1aa192e2c50850e248bee8f234006 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 45d4717fe5c3e3554bd79b63ade490d88cf00bbe Original-Change-Id: I48aa21122cfc2ee43bcb1b8f87b00c66abdc230e Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/295961 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11923 Tested-by: build bot (Jenkins)
2015-10-27cbgfx: add draw_bitmapDaisuke Nojiri
draw_bitmap renders a bitmap image on screen with position and sizes scaled relative to the screen. images are scaled up or down by nearest neighbor interpolation. BUG=chrome-os-partner:43444 BRANCH=tot TEST=drew bitmap images on Samus Change-Id: Ib599acc85b25626a6aed1fa9884ecd8e169bb860 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: c910c9cdb7efc53aace067bd081aeefc07556811 Original-Reviewed-on: https://chromium-review.googlesource.com/290302 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Change-Id: Ib599acc85b25626a6aed1fa9884ecd8e169bb860 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/295532 Reviewed-on: http://review.coreboot.org/11584 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-27cbgfx: coreboot graphics libraryDaisuke Nojiri
This change introduces cbgfx, a graphics library, which provides APIs for drawing basic shapes, texts, graphic data, etc. on a screen. BUG=chrome-os-partner:43444 BRANCH=tot TEST=Drew boxes by draw command of depthcharge cli on Samus Change-Id: I6019e5998e65dca3ab4785a90669b5db02463d2e Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: 5b3ebce8eae91be742e4f977d3407d24e1537580 Original-Reviewed-on: https://chromium-review.googlesource.com/290301 Original-Reviewed-by: Stefan Reinauer <reinauer@google.com> Original-Change-Id: I10db27715cb907bdc451a33ed99d257e3af241b7 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/291065 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11408 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-27libpayload: usb: Retry get_descriptor() on failureShawn Nematbakhsh
Certain Lexar USB disks may fail during the first calls to get_descriptor(..., DT_CFG, ...) for unknown reasons. Therefore, make several attempts before giving up. BUG=chromium:466758 TEST=Manual on Samus. Go to recovery mode, verify that Lexar LJDS70 USB stick is bootable. BRANCH=None Change-Id: I476ac22f9c4f844c60ebc6e53af8c144d70bb9d4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 93a0570b343479dd22506ad4d7961f0ea4251f8c Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Original-Change-Id: Ie581c7c71c53816065c7f59202581888a79e445e Original-Reviewed-on: https://chromium-review.googlesource.com/302403 Original-Commit-Ready: Shawn N <shawnn@chromium.org> Original-Tested-by: Shawn N <shawnn@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/12133 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-17libpayload: usb: dwc2: check device connect state before enable channelYunzhi Li
If the device has already been disconnected then we shouldn't enable host channel to start any transfer, otherwise this channel goes into an odd state the channel is enabled but can not be disabled by set hcchar.chdis=1. So we need check the device connect status before enable channel. BRANCH=None BUG=chrome-os-partner:44534 TEST=None Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ae3e690b2cd4a9ea8b5766ac873b0e00bf3a23de Original-Change-Id: Ib3ecf486649ca11b302144f9c00a5e88424e90fa Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/298402 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-(cherry picked from commit ea96f947b5304fdde2e0991d23febaeba209dde1) Original-Reviewed-on: https://chromium-review.googlesource.com/299398 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Change-Id: Idf48ffbc4c2794900e09dec6b2e34e33b21f87b4 Reviewed-on: http://review.coreboot.org/11662 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-17libpayload: usb: dwc2: fix hub hot-plug bugYunzhi Li
When disconnect is detected in dwc2_split_transfer() the split configuration registers should be cleared before return. BRANCH=None BUG=chrome-os-partner:44534 TEST=On Jerry, usb hot plug works with devices behind hubs Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 37594d8b4490b6d393d19d17d8e497db7de8817d Original-Change-Id: Ie1eecec067305874513c6ceb95df4240dc393cd6 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/295625 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-(cherry picked from commit d543e14cdc73bd549dd553c8d1d07672a1307981) Original-Reviewed-on: https://chromium-review.googlesource.com/299700 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Change-Id: Ib4604097743f2f9d763b29ee27f3bc1788a85a62 Reviewed-on: http://review.coreboot.org/11661 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-10libpayload: Fix merge of PL011 UART supportNico Huber
Wished I hadn't seen that. Git saw the conflict (file was gone), both committer and reviewer thought it would be a good idea to re-add it as dead code (see 558e9b5: libpayload: Add minimal support for PL011 UART). Change-Id: Ifea8113fbc59e0463eaedb86b976f54ec11113a9 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/11604 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-09-08video_printf: align textDaisuke Nojiri
This change allows video_printf to left/center/right-align text depending on the enum value provided by the caller. This is useful especially because usually the length of formatted string is unknown before calling video_printf. BUG=none BRANCH=smaug TEST=drew fastboot screens on Smaug CQ-DEPEND=CL:296460 Reviewed-on: https://chromium-review.googlesource.com/292929 Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 436f05f60c1b88626740a35913e3ad37b5c777a3) Change-Id: If1d50b7d8ddaa86eddc1618946756184cb87bfe1 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295413 Reviewed-on: http://review.coreboot.org/11583 Tested-by: build bot (Jenkins)
2015-09-08video: add video_printfDaisuke Nojiri
video_printf prints strings on the screen with specified foreground and background color. BUG=none BRANCH=smaug TEST=verified messages printed on Smaug Change-Id: I619625f7d4c5bc19cd9de64a0ba07899cf9ba289 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: e0ac4cb4c0d43b40f5c8f8f5a90eac45b0263b77 Original-Reviewed-on: https://chromium-review.googlesource.com/290130 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-(cherry picked from commit 75ea2c025d629c8fabc0cb859c4e8ab8ba6ce6e3) Original-Change-Id: Ief6d1fc820330b54f37ad9260cf3119853460b70 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/290373 Reviewed-on: http://review.coreboot.org/11407 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-28libpayload: usb: dwc2: Always return 'size' transferred bytes for OUTJulius Werner
Seems like our transferred bytes calculation for OUT transfers that span more than one packet had been wrong, and we just got lucky that we never noticed it before. The HCTSIZ.xfersize register field we're reading only counts bytes transferred by the last packet we sent. OUT endpoints cannot have short transfers -- every transfer should either finish all bytes we wanted to send or end in a proper error condition. Therefore, in the absence of an error we can just conclude that all input bytes have been transferred. BRANCH=veyron BUG=chrome-os-partner:35525 TEST=SMSC95xx netboot on Jerry now works. Change-Id: I57349e697c428df6b56e2f6f62e87652ef1e7a94 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: 0abee13b6d89dec12c6fff581ece1836393c7703 Original-Change-Id: Id0a127e6919f5786ba05218277705dda1067b8c3 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/293956 Original-Reviewed-by: yunzhi li <lyz@rock-chips.com> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/11404 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-19libpayload: usb: dwc2: fix usb plug/unplug bugYunzhi Li
Check device connect status while waiting for usb transfer complete Avoid coreboot get stuck when usb device unplugged BUG=chrome-os-partner:35525 TEST=None BRANCH=None Original-Change-Id: Id103501aa0d8b31b0b81bef773679c0fad79f689 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292630 Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292966 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Commit-Queue: David Hendricks <dhendrix@chromium.org> Change-Id: I49396b74131dbfda505d9d3de5adbdc87eb92ce1 Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Reviewed-on: http://review.coreboot.org/11236 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-14libpayload: usb: xhci: Fix list of cleared port change bitsJulius Werner
The xhci_rh_port_status_changed() function tries to always clear all port status bits, even though most of them don't interest us. This is generally a smart thing to do since not clearing a status bit may cause the controller to not generate any more Port Status Change Events. However, the bitmask we currently use doesn't cover bit 23 (Port Config Error Change) and instead covers bit 16 (Port Link State Write Strobe) which is not really related to this and not a W1C bit. Probably a typo, so let's fix that. BRANCH=None BUG=None TEST=Plugged/unplugged a bunch of USB devices on an XHCI Falco. Original-Change-Id: Ia83f5b72cce094859c0f0e730752d7b5cfa6e1c6 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/291842 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I11f5fe38cb70055daf6e866a8ee84ca80488e3bf Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/11194 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14libpayload: usb: xhci: Count new Max Scratchpad Bufs bits from XHCI 1.1Julius Werner
The 1.1 revision of the XHCI specification added an extra 5 bits to the Max Scratchpad Bufs field of HCSPARAMS2 that newer controllers make use of. Not honoring these bits means we're not allocating as many scratchpad buffers as the controller expects, which means it will interpret some uninitialized values from the end of the pointer array as scratchpad buffer pointers, which obviously doesn't end well. Let's fix that. BRANCH=none BUG=chrome-os-partner:42279 TEST=Makes a USB-related memory corruption issue disappear. Original-Change-Id: I7c907492339262bda31cdd2b5c0b588de7df8544 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/291681 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Iba1007bfebffe1f564f78bb875fff9ba0fe11a38 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/11189 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14libpayload: usb: dwc2: fix short packet transferYunzhi Li
If short packet detected, stop this transfer and return the actual transferred size BUG=chrome-os-partner:42817 TEST=Netboot could run well BRANCH=None Original-Change-Id: Icb4317f48aa04ac15bb1886b81d2e3c472d123d0 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/288215 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-(cherry picked from commit d372343b4e3d664ce2d76dbf55a5061b5d496bba) Original-Reviewed-on: https://chromium-review.googlesource.com/291064 Original-Commit-Queue: Julius Werner <jwerner@chromium.org> Original-Tested-by: Julius Werner <jwerner@chromium.org> Change-Id: I43d9edffe2074c037f2df203621863e54d2597fa Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Reviewed-on: http://review.coreboot.org/11187 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14libpayload: usb: Fixup wrong use of configChunfeng Yun
replace CONFIG_LP_XHCI_MTK_QUIRK by CONFIG_LP_USB_XHCI_MTK_QUIRK BRANCH=none BUG=none TEST=Rev0-oak Original-Change-Id: I68f58ed3b02caa7cef8f0f60a4a8f5e9755c97a7 Original-Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/290522 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I316712e99e0b44d292dab27cf66e26837dc2e957 Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-on: http://review.coreboot.org/11179 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14libpayload: xhci: Carry over fixes from Chromium treeJulius Werner
This patch re-adds a few fixes that originally went into the chromeos-2013.04 tree. I kinda seem to have slipped them into the backport of Nico's original XHCI patch (crosreview.com/168097) instead of making a new change, which was not very clever and caused them to be forgotten in the later upstreaming wave. Changing internal XHCI error numbers is just a cosmetic change to make them uniquely identifyable in debug output. Bumping the timeout to 3 seconds is an actually important fix since we have seen mass storage devices needing that much in the past. BRANCH=None BUG=None TEST=Diffed payloads/libpayload/drivers/usb between chromeos-2013.04 and chromeos-2015.07, confirmed that no serious differences remain. Original-Change-Id: I03d865dbe536072d23374a49a0136e9f28568f8e Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/290423 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I5d773d3a23683fb2164916cc046f4a711b8d259e Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/11178 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-13libpayload: usb: don't prematurely free the usb deviceAaron Durbin
Before the controller's destroy_device() could interrogate the usbdev_t object usb_detach_device() was freeing and NULLing out the pointer. That results in all callers who needed that object to start accessing random bits of memory. This eventually led into free()ing memory it shouldn't which corrupted the allocator's state. Eventually, all forward progress was lost by way of a single ended linked list turning into a circular list. The culprit seems to be a bad merge in commit e00ba21. BUG=chrome-os-partner:43419 BRANCH=None TEST=Can boot into OS now w/o "hanging" on glados. Original-Change-Id: I86dcaa1dbaf112ac6782e90dad40f0932f273a1f Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/290048 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Change-Id: I9135eb0f798bf7dbeccc7a033c3f8471720a0de5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11173 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-09license headers: Drop FSF addresses againPatrick Georgi
Some FSF addresses found their way back into our tree. Change-Id: I34b465fc78734d818eca1d6962a1e62bf9d6e7f3 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/11145 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-18libpayload: usb: Add support for SuperSpeed hubsJulius Werner
This patch adds support for the SuperSpeed half of USB 3.0 hubs, which previously prevented SuperSpeed devices behind those hubs from working. BRANCH=None BUG=chrome-os-partner:39877 TEST=Played around with multiple hubs and devices on Oak and Falco, can no longer find a combination that doesn't work. Change-Id: I20815be95769e33d399b7ad91c3020687234e059 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3db96ece20d2304e7f6f6aa333cf114037c48a3e Original-Change-Id: I2dd6c9c3607a24a7d78c308911e3d254d5f8d91d Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/284577 Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Original-Tested-by: chunfeng yun <chunfeng.yun@mediatek.com> Reviewed-on: http://review.coreboot.org/10958 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-18libpayload: usb: xhci: Prevent address reuseJulius Werner
We have been trying to avoid reassigning previously used USB addresses to different devices since CL:197420, because some devices seem to take issue with that. Unfortunately, that patch doesn't affect XHCI: those controllers insist on chosing addresses on their own. The only way to prevent them from reusing a previously assigned address is to not disable that slot at all. This patch implements address reuse avoidance on XHCI by not disabling slots when a device is detatched (which may occur both on physical detachment or if we simply couldn't find a driver for that device). Instead, we just release as many resources as we can for detached devices (by dropping all endpoint contexts) and defer the final cleanup until the point where the controller actually runs out of resources (a point that we probably don't often reach in most firmware scenarios). BRANCH=none BUG=chrome-os-partner:42181 TEST=Booted an Oak plugged into a Servo without having a driver for the SMSC network chip, observed that it could still enumerate the next device afterwards. Kept unplugging/replugging stuff until the cleanup triggered and made sure the controller still worked after that. Also played around a bit on a Falco without issues. Change-Id: Idfbab39abbc5bc5eff822bedf9c8d5bd4cad8cd2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 88c6bcbc41156729c3c38937c8a4adebc66f1ccb Original-Change-Id: I0653a4f6a02c02498210a70ffdda9d986592813b Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/284175 Original-Tested-by: Nicolas Boichat <drinkcat@chromium.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10957 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-16libpayload: usb: dwc2: support split transactionYunzhi Li
With split transaction, dwc2 host controller can handle full- and low-speed devices on hub in high-speed mode. This commit adds support for split control and interrupt transfers BUG=None TEST=Connect usb keyboard through hub, usb keyboard can work BRANCH=None Change-Id: If7a00db21c8ad4c635f39581382b877603075d1a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4fb514b7f7f7e414fa94bfce05420957b1c57019 Original-Change-Id: I07e64064c6182d33905ae4efb13712645de7cf93 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/283282 Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/10956 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>