aboutsummaryrefslogtreecommitdiff
path: root/Documentation
AgeCommit message (Collapse)Author
2022-01-18Documentation: gpio: Fix tableSubrata Banik
This patch fixes the indentation issue introduced with commit 0c1c2dec (Documentation: Capture anomalies between pad and lock reset type). BUG=b:211573253, b:211950520 Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ib6974cda26e6f7968688a2a7c30c7351d212a780 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-01-13Documentation: Capture anomalies between pad and lock reset typeSubrata Banik
This patch documents the recommendation as per Intel GPIO BWG on GPIO PAD lock configuration. As per GPIO BWG, it's recommended to change the Pad Reset Config for lock GPP as `Power Good` so that pad configuration and lock bit can be reset at the same time. Refer to Intel doc:630603 for details. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I3faf5dfc28c8c2dbc322db80a59f44a29002673c Reviewed-on: https://review.coreboot.org/c/coreboot/+/61000 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2022-01-10util/apcb: Add apcb_v3_edit toolRob Barnes
apcb_v3_edit.py tool edits APCB V3 binaries. Specifically it will inject up to 16 SPDs into an existing APCB. The APCB must have a magic number at the top of each SPD slot. BUG=b:209486191 BRANCH=None TEST=Inject 4 SPDs into magic APCB, boot guybrush with modified APCB Change-Id: I9148977c415df41210a3a13a1cd9b3bc1504a480 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60281 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-12-26mb/acer/g43t-am3: Add documentationMichael Büchler
Signed-off-by: Michael Büchler <michael.buechler@posteo.net> Change-Id: I0e296b3efbff0260f32badc699f1062f9885fa53 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56838 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-23mb/asrock: Add ASRock H77 Pro4-M mainboardMichael Büchler
This adds a new port for the ASRock H77 Pro4-M motherboard. It is microATX-sized with an LGA1155 socket and four DIMM sockets for DDR3 SDRAM. The port was initially done with autoport. It is quite similar to the ASRock B75 Pro3-M which is already supported by coreboot. Working: - Sandy Bridge and Ivy Bridge CPUs (tested: i5-2500, Pentium G2120) - Native RAM initialization with four DIMMs of two different types - PS/2 combined port (mouse or keyboard) - Integrated GPU by libgfxinit on all monitor ports (DVI-D, HDMI, D-Sub) - PCIe graphics in the PEG slot - All three additional PCIe slots - All rear and internal USB2 ports - All rear and internal USB3 ports with reasonable transfer rates - All six SATA ports from the PCH (two 6 Gb/s, four 3 Gb/s) - All two SATA ports from the ASM1061 PCIe-to-SATA bridge (6 Gb/s) - Rear eSATA connector (multiplexed with one ASM1061 port) - Console output on the serial port of the Super I/O - SeaBIOS 1.15.0 to boot slackware64 - SeaBIOS 1.15.0 to boot Windows 10 (needs VGA BIOS) - Internal flashing with flashrom-1.2 (needs `--ifd -i bios --noverify-all`) - External flashing with flashrom-1.2 and a Raspberry Pi 1 - S3 suspend/resume from either Linux or Windows 10 Not working: - Booting from the two SATA ports provided by the ASM1061 - Automatic fan control with the NCT6776D Super I/O Untested: - VBT (it is included, though) - Infrared header Change-Id: Ic2c51bf7babd9dfcbaf69a5019b2a034762052f2 Signed-off-by: Michael Büchler <michael.buechler@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45317 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-16Documentation/releases: Improve CSME sectionPaul Menzel
1. Fix typo in *based* 2. Use official spelling for Alder Lake 3. Mention *Converged Security* 4. Capitalize CMOS Change-Id: I36eac6f017229a3e9261e0eb84371421927e1cae Fixes: 941239d54d (Documentation/releases: Update 4.16 release notes) Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60133 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-13Documentation/releases: Update 4.16 release notesSean Rhodes
* Add StarBook Mk V as new mainboard * Add option to disable Intel Management Engine via HECI Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I9675a6a8960d93ae6de285d8b25ffc48a763483e Reviewed-on: https://review.coreboot.org/c/coreboot/+/59564 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-06Documentation: Add template for deprecation noticesPatrick Georgi
Change-Id: Ia2cc4f799804c7d56db572823246c487cd19a726 Signed-off-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59677 Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-12-06Documentation: Update SSH key procedurePatrick Georgi
Use ed25519 keys because recent changes to RSA keys in OpenSSH are making a mess. Also update references to the Gerrit UI to match the current version. Change-Id: Ib13836feb6968307d2c8b3022cb0c859dac89bb8 Signed-off-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-12-01Documentatiion/mb/facebook/fbg1701.md: Update memory informationFrans Hendriks
CPLD can be used for board revision determinition. Remove info about selecting memory type and add Rev 1.4 info BUG = N/A TEST = NA Change-Id: I4bc851f72ae03e98ab1b2e0e04b07ccf6135ebeb Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59756 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-11-22Documentation: Add warning about "private" changes on GerritPatrick Georgi
Private changes on Gerrit are a tricky beast in that they're well hidden in the UI and a few other places but still reachable under certain circumstances. Change-Id: I1c8c6cccfd023bc1d839dc5d9544204c88f89c7e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59229 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-11-22mainboard/starlabs: Add StarBook Mk VSean Rhodes
Tested using MrChromeBox's `uefipayload_202107` branch: * Windows 10 * Ubuntu 20.04 * MX Linux 19.4 * Manjaro 21 No known issues. https://starlabs.systems/pages/starbook-specification Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I090971a9e8d2be5b08be886d00d304607304b645 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56088 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-19Documentation: Add some notes about how to integrate FSPPatrick Georgi
While we don't _want_ FSP, we can't get around it sometimes. But when using it, we can still try to establish best practices to make life easier for everybody. Change-Id: I4efd273e4141dc6dc4cf8bdebda9cffd0d7cc1a1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58886 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-11-19Documentation/lint: Use Super I/O instead of SuperIOPatrick Georgi
Change-Id: Idb16092b687ebffb319bc1908f08f350d612d36a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39451 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Martin Roth <martinroth@google.com>
2021-11-18doc/mb/ocp: update Delta Lake documentationJonathan Zhang
Update Delta Lake document following the publish of OCP blog and the Wiwynn press release. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I3eaa765bf9918988b4b5cb01e8607a5c27b9bd17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58979 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-11-12Documentation/releases: Update index.mdJason Glenesk
Fix date for 4.16 release. Change-Id: I6ff5849cb4b7bd3bc6c1d91637536b6e94d92a1a Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59058 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-11-11mb/system76/gaze16: Add System76 Gazelle 16Jeremy Soller
https://tech-docs.system76.com/models/gaze16/README.html The gaze16 comes in 3 variants due to differences in the discrete GPU and network controller used. - NVIDIA RTX 3050, using Realtek Ethernet controller - NVIDIA RTX 3060, using Realtek Ethernet controller - NVIDIA RTX 3060, using onboard Intel I219-V Ethernet controller Tested on the 3050 variant. Tested with TianoCore (UefiPayloadPkg). Working: - PS/2 keyboard, touchpad - Both DIMM slots - M.2 NVMe SSD - M.2 SATA SSD - 2.5" SSD - All USB ports - SD card reader - Webcam - Ethernet - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - HDMI output - Internal microphone - Internal speakers - Combined headphone + mic 3.5mm audio* - 3.5mm microphone input* - S3 suspend/resume - Booting to Pop!_OS Linux 21.04 and Windows 10 20H2 - Flashing with flashrom Not working: - Discrete/Hybrid graphics - Mini DisplayPort output (requires NVIDIA GPU) - 3.5mm audio input/output detection on Windows Change-Id: Ifb90f9b73a10abf53a21738e2c466d539df9a37c Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56956 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-11Doc/releases/coreboot-4.16-relnotes.md: Fix typoAngel Pons
Change-Id: I7189ac62d5ec826cf0377712941ba227362c1e09 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59122 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-11Doc/releases: Fix coreboot 4.15 release notesAngel Pons
coreboot 4.15 has just been released, so it's neither "upcoming" nor "planned" anymore. Change-Id: I287e40deec5877764e511885e3268b606caff597 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59121 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-11Spell Intel Cooper Lake-SP with a spacePaul Menzel
Use the official spelling. [1] [1]: https://ark.intel.com/content/www/us/en/ark/products/codename/189143/products-formerly-cooper-lake.html Change-Id: I7dbd332600caa7c04fc4f6bac53880e832e97bda Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59036 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-11-09Documentation/security/vboot: Update 4.15 vboot supported boardsJason Glenesk
Update list of boards that support vboot. Change-Id: Id5d4d18202bf85c5ba407efd690eee5cba88a8a7 Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58975 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-09Documentation/releases: Update 4.16 target date and cadence informationJason Glenesk
Change-Id: I6c8327a7cf47217d32359b304b21e806c10dcc62 Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59022 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-11-09Documentation/releases: Update 4.15 release notesJason Glenesk
Update details for upcoming 4.15 release Change-Id: Ie4d47456cce38e7ec4329f8cb839167017c7e26b Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58974 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2021-11-05Documentation/releases/4.15: Add more System76 boardsTim Crawford
Most of the System76 boards have now been merged. Change-Id: I0353b28c1df3da8be961cb43225dcf9e30b47d16 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58868 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-11-05Documentation/acpi/gpio.md: Update implementation detailsArthur Heymans
The weak functions were removed in bce7458 "acpi/acpigen.c: Remove weak gpio definition". Change-Id: Ia6e51698d6209fbf4f59b7fbc988a1aa696e366f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58933 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-02mb/system76/oryp8: Add System76 Oryx Pro 8Jeremy Soller
https://tech-docs.system76.com/models/oryp8/README.html Tested with TianoCore (UeifPayloadPkg). Working: - PS/2 keyboard, touchpad - Both DIMM slots - Both M.2 SSD slots - All USB ports - Webcam - Ethernet - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - Internal microphone - Internal speakers - Combined 3.5mm headphone & microphone jack - Combined 3.5mm microphone & S/PDIF jack* - S3 suspend/resume - Booting to Pop!_OS Linux 21.10 and Windows 10 20H2 - Flashing with flashrom Not working: - Discrete/Hybrid graphics Not tested: - Thunderbolt functionality - S/PDIF output Change-Id: Iabc8e273f997d7f5852ddec63e0c1bf0c9434acb Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57652 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-11-02mb/system76/bonw14: Add System76 Bonobo Workstation 14Jeremy Soller
Change-Id: I55a827f8d6a5421c36f77049935630f4db4ba04d Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49173 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-11-02mb/system76/oryp6: Add Oryx Pro 7 as a variantJeremy Soller
Change-Id: Id00a45a6a6acf0880934c55f1a3f18e63f2aed43 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52296 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-11-01Documentation/releases/4.15: Fix typoFelix Singer
Change-Id: I3e64793c58f2acfbfc42e46782d68bec97088601 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58775 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-10-30Documentation/releases: Update index.mdJason Glenesk
Change-Id: I0fa24b233383bdc778b2c641f68e4e87f92206d1 Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58759 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-10-30Documentation/releases: Add 4.16 release notes templateJason Glenesk
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Change-Id: I42ce11914d7e7b32017747bbc6d3c7ac77e2868b Reviewed-on: https://review.coreboot.org/c/coreboot/+/58758 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-29Documentation: Open up avenue for codifying our best practicesPatrick Georgi
Change-Id: I3a2612ae64ecea2d1d7ecb695215bc50dccb1b19 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58663 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-29Documenation: call out `lcov` as requiredPaul Fagerburg
Code coverage requires `lcov`, so update the docs to call it out specifically. Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: Ie2898faa5188a7174c4e56ba34f1a4f02f939b03 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58633 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2021-10-28Documentation/releases: Update 4.15 release notesJason Glenesk
Update details for upcoming 4.15 release Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Change-Id: I4517f7c17ce5788c82a1eafb1589e39b1ce403ff Reviewed-on: https://review.coreboot.org/c/coreboot/+/58422 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-27Documentation: Remove libretrend from coreboot distributorsPatrick Georgi
As of 2020-07-21 their website says "we'll stop any device produce and won't have a date to return (if we return)." While wishing them best of luck (and welcome them back to the list of distributors), let's take them off the list while they don't ship hardawre. Change-Id: Ia110d0e25bf73c3d7db270b0c2c0e23b99fc36ef Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58573 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-10-26Documentation/releases/4.15: Add note about libpayload improvementsJakub Czapiga
Change-Id: I3043e70523db1b7f1df90789a69eadd155848bb0 Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-10-17Documentation: Improve preamble of coding stylePatrick Georgi
The coding style doc isn't short, so scrap that, and it's specific to the C parts of our tree, so add that. Change-Id: Ib1ef7c1a96ff40f0cfbae7d22a47a95128981eb8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58381 Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-16Doc/releases/coreboot-4.11-relnotes.md: Fix typoAngel Pons
Replace `bee` with `been`. Change-Id: I206f9b33d79386fc4f204db3e21a92fa20b703bd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-10-15Doc/mainboard_io_trap_handler_sample.c: Drop fileAngel Pons
Looks like nothing references this example. Remove it. If one needs an example, there's several mainboards which contain an I/O trap handler. Change-Id: I4a238fbf354926cb6568e1709bfb79cc546dfd73 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58322 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-10-08Documentation: Explain how to join SlackPatrick Georgi
Change-Id: I6a4d5011ea47576c9a459f20e0b368cff8a326c2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58150 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2021-10-05Documentation: Fix spelling errorsMartin Roth
These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-04mb/google/trogdor: Add new vaviant quackingstickSheng-Liang Pan
New boards introduced to trogdor family. BUG=b:201263032 BRANCH=none TEST=make Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: I8299ddda14eb82103f17f8464a14992aa757afa6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58033 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-09-23doc/mainboard/ocp: update Delta Lake documentationJonathan Zhang
Update Delta Lake documentation upon: * Delta Lake and Yosemite-V3 design specs acceptance by OCP. * Delta Lake OSF acceptance by OCP. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I315db879b75f0df2fbca2fa8bb6d00987a69efba Reviewed-on: https://review.coreboot.org/c/coreboot/+/57688 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com>
2021-09-22mb/system76/addw1: Add Adder WS 2 as a variantTim Crawford
Change-Id: I3965a90151bd9250a87dabc715d68a39699ff9e1 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48422 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-09-22mb/system76/addw1: Add System76 Adder Workstation 1Tim Crawford
Change-Id: I5dd3bc320ca640728e1d86180c6bfa0dc7295760 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48421 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-09-20mb/system76/cml-u: Add Darter Pro 6 as a variantTim Crawford
Change-Id: I9ba7d2af3c9c298fda2b2997d52546cc2f702a82 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52063 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-09-20mb/system76/cml-u: Add System76 Galago Pro 4Tim Crawford
Change-Id: I3dfa2ab430439d8dc71531b92aa7800db94d603b Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52034 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-09-16mb/system76/darp7: Add System76 Darter Pro 7Tim Crawford
https://tech-docs.system76.com/models/darp7/README.html Tested with TianoCore (UefiPayloadPkg). Working: - PS/2 keyboard, touchpad - Both DIMM slots - M.2 NVMe SSD - M.2 SATA SSD - MicroSD card reader - All USB ports - USB-PD - Webcam - Ethernet - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - HDMI output - DP over USB-C output - Internal microphone - Internal speakers - Combined 3.5mm headphone/microphone jack - S0ix suspend* - Booting to Ubuntu Linux 21.04 and Windows 10 - Flashing with flashrom Not working: - S0ix when a device is attached to the TBT port Not tested: - Thunderbolt functionality Change-Id: I80e5c5375f9d3881fc89a45a91ba68ed2e104a93 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52349 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-15Doc/Intel: Remove out-of-date documentationAngel Pons
There's dead links, CorebootPayloadPkg was replaced by UEFIPayloadPkg, the development procedures are severely out-of-date, the only FSP 1.1 platform is Braswell (which is no longer actively developed), and the pages don't appear in doc.coreboot.org (which uses Sphinx to generate HTML pages from .md files). Oh, and it doesn't seem to have a license associated to it. Get rid of outdated documentation. Change-Id: If359f554e85d32cdb65c3d928b5155db30bc40a5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-09-15mb/system76/galp5: Add System76 Galago Pro 5Tim Crawford
https://tech-docs.system76.com/models/galp5/README.html Tested with TianoCore (UefiPayloadPkg). Working: - PS/2 keyboard, touchpad - Both DIMM slots - M.2 NVMe SSD - All USB ports - SD card reader - Webcam - Ethernet - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - HDMI output - Internal microphone - Internal speakers - Combined 3.5mm headphone/microphone jack - S0ix suspend* - Booting to Pop!_OS Linux 21.04 and Windows 10 - Flashing with flashrom Not working: - Discrete/Hybrid graphics - S0ix when a device is attached to the TBT port Change-Id: I0d9052c0b064d4d43812ad837578d4a097149cc8 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52350 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-15mb/system76/lemp10: Add System76 Lemur Pro 10Tim Crawford
https://tech-docs.system76.com/models/lemp10/README.html Tested with TianoCore (UefiPayloadPkg). Working: - PS/2 keyboard, touchpad - DIMM slot and onboard RAM - Both M.2 NVMe SSDs - MicroSD card reader - All USB ports - USB-PD - Webcam - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - HDMI output - DP over USB-C output - Internal microphone - Internal speakers - Combined 3.5mm headphone/microphone jack - S0ix suspend* - Booting to Pop!_OS Linux 21.04 and Windows 10 - Flashing with flashrom Not working: - S0ix when a device is attached to the TBT port Change-Id: I15f7a3b6e9af07fcfde9a71d3f4a84ed625159b7 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52294 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-15documentation: Update information about Kontron mAL10Maxim Polyakov
1. The video output now works correctly with Intel IGD (tested with TianoCore, edk2-stable201903-3392-gf7fe27d686). 2. The kempld EC driver now supports GPIO configuration since commit 9941e5a5e6 (ec/kontron/kempld: Add minimal GPIO driver). 3. CorebootPayloadPkg is practically dead by now, so delete the comment about the problem with it. Change-Id: Ic216c3437b2670638c845ee8964f831b80e18fce Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57461 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-15google/trogdor: add new variant kingoftownKevin Chiu
This patch adds a new variant called kingoftown. it's clamshell only, no FPR, eDP panel. BUG=b:198365759 BRANCH=master TEST=make Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Change-Id: I648664c50dfad11530a854f574f39264158b44e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bob Moragues <moragues@google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-09-09intel/xeon_sp/cpx: Hook up public microcode releaseArthur Heymans
Change-Id: I7e575cb17e2004bd931f4fa1d05f17c4cdca29ba Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57444 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-09-07documentation: add a section on devicetree refsPeter Marheine
There is no existing documentation on how `device ref` and aliases work in the devicetree, and the behavior around devices not being in the same location is difficult to discern as well as somewhat unexpected. This should help prevent confusion leading to bugs such as the one fixed by https://review.coreboot.org/c/coreboot/+/57298 Change-Id: I4b30f7d531cfc3453d6523a76084f1969125b4bf Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57354 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-05mb/supermicro: Add X9SAE and X9SAE-VBill XIE
Mainboard information can be found in the included documentation. Change-Id: I9dfc58bb99e14cd9dac2ac53afc0ea11d2252aa9 Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57191 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-09-02Documentation: add Intel BroadwellIru Cai
Change-Id: I0b1c29162a64030b5c100368f2471702e22b8311 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54744 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-09-01tests: Improve test output readabilityJakub Czapiga
When running multiple tests, e.g. by using unit-tests target, it is hard to differentiate, which output comes from which file and/or configuration. This patch makes the output easier to analyze and understand by using new wrapper macro cb_run_group_tests(). This macro uses __TEST_NAME__ value (containing test path and Makefile test name) as a group name when calling cmocka group runner. Example: Test path: tests/lib/ Makefile test name: cbmem_stage_cache-test Test group array name: tests Result: tests/lib/cbmem_stage_cache-test(tests) Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I4fd936d00d77cbe2637b857ba03b4a208428ea0d Reviewed-on: https://review.coreboot.org/c/coreboot/+/57144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-09-01Doc/mb/ocp: Add hyperlink to src/mainboard/ocp/deltalake/vpd.hJohnny Lin
It would be easier for people to find the defined variables. Change-Id: I6d181f6602aa5d55019ea2110b2d8e1fa7e0159c Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
2021-08-28soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer
Since all mainboards use `CHIPSET_LOCKDOWN_COREBOOT`, make it the default by changing its enum value to 0 and remove its configuration from all related devicetrees. If `common_soc_config.chipset_lockdown` is not configured with something else in the devicetree, then `CHIPSET_LOCKDOWN_COREBOOT` is used. Also, add a release note for the upcoming 4.15 release. Change-Id: I369f01d3da2e901e2fb57f2c83bd07380f3946a6 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56967 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-08-27Doc/mb/ocp: Update Delta Lake documentation for RAS featuresJohnny Lin
Change-Id: I71b97930f1a1ca4a60f830a90d80af6ca0236c8e Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57093 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
2021-08-26device/mipi: Move to drivers/mipiJulius Werner
Sounds like we prefer to have this under drivers/ instead of device/. Also move all MIPI-related headers out from device/ into their own directory. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ib3e66954b8f0cf85b28d8d186b09d7846707559d Reviewed-on: https://review.coreboot.org/c/coreboot/+/57128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-08-16Documentation/util/kconfig: Remove silentoldconfigYu-Ping Wu
The "silentoldconfig" target has been removed in Linux 5.13's kconfig (CB:37152). As explained by Michal Marek at https://lkml.org/lkml/2011/8/31/189, the "silentoldconfig" target has become an internal interface and "oldconfig" is just as silent now. Therefore, correct the target for syntax checking. Change-Id: I8416bd4a96d15415f46c591ceb26ebb29aef1ab0 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56878 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2021-08-16Documentation: Mark ECC as working on Sandy BridgePatrick Rudolph
Change-Id: I9f9aa5bf6ed4e1430e7067bfe5d3ce8e59e85812 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56977 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-08-12mb/google/trogdor: Add new variant WormdinglerZanxi Chen
New board introduced to trogdor family. BUG=b:193870279 BRANCH=none TEST=make Change-Id: If3d9662e8725e30e1308d77b05545efbee29f846 Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56384 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-07-14Documentation: Remove KASAN from the project ideas listWerner Zeh
This project is already implemented and therefore should not be mentioned anymore as a new project idea in the documentation. Change-Id: I38c6e274e416b98485943d36536a57a14743945b Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-07-13util/kconfig: Uprev to Linux 5.13's kconfigPatrick Georgi
This was originally several commits that had to be squashed into one because the intermediate states weren't able to build coreboot: - one to remove everything that wasn't our own code, leaving only regex.[ch], toada.c, description.md and Makefile.inc. - one to copy in Linux 5.13's scripts/kconfig and adapt Makefile.inc to make the original Makefile work again. - adapt abuild to use olddefconfig, simplifying matters. - apply patches in util/kconfig/patches. - Some more adaptations to the libpayload build system. The patches are now in util/kconfig/patches/, reverse applying them should lead to a util/kconfig/ tree that contains exactly the Linux version + our own 5 files. Change-Id: Ia0e8fe4e9022b278f34ab113a433ef4d45e5c355 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37152 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-07-08Documentation/drivers/dptf: Add oem variables supportSumeet Pawnikar
Add oem variables information with usage example. BRANCH=None BUG=b:187253038 TEST=Built and tested on dedede board Change-Id: I45db17f6ee3328da28f985c6854d65a430c9c61b Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55846 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-07-02src: Consolidate x86_64 support KconfigAngel Pons
Introduce `USE_EXP_X86_64_SUPPORT` in `src/arch/x86/Kconfig` and guard it with `HAVE_EXP_X86_64_SUPPORT`. Replace the per-CPU implementations of the same functionality with the newly-added Kconfig options. Update documentation and the config file for QEMU accordingly. Change-Id: I550216fd2a8323342d6b605306b0b95ffd5dcd1c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55760 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2021-07-01mb/asus/p8x7x-series: Add P8C WS as a variant of P8X7X seriesBill XIE
Mainboard information can be found in the included documentation. Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: Idb696193e5a67c42adf45e54d455d2dff7681ca7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55850 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-06-24mb/google/trogdor: Add new vaviant mrblandZanxi Chen
New boards introduced to trogdor family. BUG=b:191800434 BRANCH=none TEST=make Change-Id: I93b74e79188bd0cc36c8b48e552230ae0d6f593a Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-06-16mb/asus/p8x7x-series: Add P8H77-V as a variant of P8X7X seriesBill XIE
Mainboard information can be found in the included documentation. Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: Ic811e24bd72da84e5ca8f5b09f2eb65872153b72 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55111 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-14mb/asus/p8z77-series: Add P8Z77-V as a variant of P8Z77 seriesBill XIE
Mainboard information can be found in the included documentation. Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: Ic56ac0e5f93a6e818ef0666e41996718471b1cf6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54338 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-06-11docs/flashmap: state the endianness of FMAPKrystian Hebel
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com> Change-Id: Idf6d46ed262b18c176d69352e333c56f4fdff66a Reviewed-on: https://review.coreboot.org/c/coreboot/+/55041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-06-10tests: Rework mocking facilityPatrick Georgi
Using the linker's --wrap feature has the downside that it only covers references across object files: If foo.c defines a() and b(), with b calling a, --wrap=a does nothing to that call. Instead, use objcopy to mark a weak and global so it can be overridden by another implementation, but only for files originating in src/. That way mocks - implemented in tests/ - become the source of truth. TEST=Had such an issue with get_log_level() in a follow-up commit, and the mock now takes over. Also, all existing unit tests still pass. Change-Id: I99c6d6e44ecfc73366bf464d9c51c7da3f8db388 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55360 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2021-06-08google/trogdor: Add new variant PazquelYunlong Jia
This patch adds a new variant called Pazquel that is identical to Lazor for now. BUG=b:187232137 TEST=make Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Change-Id: Ib531ea5df19fe91e619f23baada73842554538ad Reviewed-on: https://review.coreboot.org/c/coreboot/+/55268 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-06-04Revert "src/mainboard: Add Star Labs labtop series"Tim Wawrzynczak
This reverts commit 2e665eb8daa2963c52092e694a5316dc544a23f5. Reason for revert: Was submitted too early and out-of-order. Change-Id: I119b7a81b849bbe3424d73d5fdf9b55481444686 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54971 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-04src/mainboard: Add Star Labs labtop seriesSean Rhodes
Add support for LabTop Mk III (kblr) and LabTop Mk IV (cml) Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-06-01Documentation/community: Add link to the OSF SlackArthur Heymans
We are also present on Slack so advertise that. Change-Id: I7d9887e524e47e6f42a5013e9f696881ef54a631 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55036 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-06-01Documentation/community: Add Discord to forumsPatrick Georgi
Change-Id: Ib1d866ecf041ddc4aaf508d290a3e31b9a108cf2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55018 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2021-05-28Documentation: Fix up toctreePatrick Georgi
Some files weren't properly hooked up, making Sphinx complain. Change-Id: If959fa63d4ddbc3916c49c5ad6602e76b12a7e60 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55020 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-28Documentation: Fix named linkPatrick Georgi
The syntax requires two bracketed fields. Change-Id: I98ebe714e57f50017755eed7888f0dd2637a3066 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55019 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-05-28Documentation: Update real time chat optionsPatrick Georgi
Change-Id: I3035266c5e035b954c0d709bd2c09069128c3340 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55010 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Swift Geek (Sebastian Grzywna) <swiftgeek@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-28option: Allow mainboards to implement the APIAngel Pons
Some mainboards need a mainboard-specific mechanism to access option values. Allow mainboards to implement the option API. Also, add some documentation about the current option API, and describe when should one reimplement the option API in mainboard code: only when the code is mainboard-specific to comply with externally-imposed constraints. Change-Id: Idccdb9a008b1ebb89821961659f27b1c0b17d29c Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54729 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-20Doc/releases: Mention that Asus H61 boards got squashedAngel Pons
Not physically squashed, the coreboot code got turned into a variant setup with override devicetrees to drop redundant boilerplate. Change-Id: I7ae5530d2603d6d108ef3829004de7e1cad130f9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54690 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Christian Walter <christian.walter@9elements.com>
2021-05-19tests: improve code coverage supportPaul Fagerburg
Fix the exclusion path for lcov; it should exclude the directory with source code, not object files. Use the COV environment variable to * control whether we build for coverage or not * select the output directory Add a separate target for generating the report, so we can get a report for all of the tests together or just a single test. Add documentation. Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: I2bd2bfdedfab291aabeaa968c10b17e9b61c9c0a Reviewed-on: https://review.coreboot.org/c/coreboot/+/54072 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2021-05-17Documentation/gerrit: Describe core developer responsibilitiesPatrick Georgi
Change-Id: I8885e9fb401838229ead72b97394f3e2343aabed Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52951 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Martin Roth <martinroth@google.com>
2021-05-16Documentation/distributions: List System76Paul Menzel
Copy the text from the [Web site](https://coreboot.org/users.html). Change-Id: I805f558514eb50580b5bd79bd4f964e66a15158d Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-05-14Documentation/distributions: Order vendor list lexicographicallyPaul Menzel
Change-Id: Id1f27d68124de745ff0eaad669ee86ce0b57ec09 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2021-05-14Documentation/distributions: Separate all vendors by exactly one blank linePaul Menzel
Change-Id: Ib1718dfa174e2a4e9c2c4b5564e196e8483a8f3c Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54271 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-05-14Documentation/distributions: Separate parenthesis by dashesPaul Menzel
Change-Id: I5d6095c6d8423e3a67f027f23d4c00dcb34a50cb Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-05-13payloads/Tianocore: Update default build target, simplify build optionsMatt DeVillier
Drop the deprecated COREBOOTPAYLOAD option, and replace it with MrChromebox's updated UefiPayloadPkg option. Simplify the Kconfig options to make it easier to build from upstream edk2 master. Drop the TIANOCORE_USE_8254_TIMER Kconfig option since it applied only to CorebootPayloadPkg. Clean up the Makefile now that we're only building from a single Tianocore package/target. Test: build/boot qemu Q35 target with both UefiPayload and Upstream options. Change-Id: If545fbd0c30be6dcc6ff43107b80980fa23a527e Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54019 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-12Doc/nb/intel/sandybridge: Fix up some typos and cosmeticsAngel Pons
Change-Id: I23b0c94ec9881aef8e39a14bc048856a65a6286d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54035 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2021-05-12Documentation/releases: Add more details about release notesPatrick Georgi
There are some steps when updating the release notes that are easily missed (see: I missed them for 4.14), so document them. Change-Id: Icdb69eb74f8dd3a7189eb8803b0259c4e6a31f96 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54032 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-12Documentation/releases: Add 4.15 release notes templatePatrick Georgi
Change-Id: I52bd1ee6b297ba08e335f5c65941b09f14689a00 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-12Documentation/releases: Update checklistPatrick Georgi
Since we want commits to go through 24 hours of review, move the vboot list update a week earlier. Also point more directly at the right script to execute. Change-Id: I49e6dfe22894402d5a0526588f8a04595ac88862 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-12Documentation: Update vboot support listPatrick Georgi
Created by util/vboot_list/vboot_list.sh Change-Id: I49536c26540c0fd1940a32f588fa49afb55b108a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54029 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-11docs: add recommendation for gpios regarding soft strapsMichael Niewöhner
Soft straps, that can be configured by the vendor in the Intel Flash Image Tool (FIT), can influence some pads' default state. It is possible to select either a native function or GPIO mode for some pads on non-server SoCs, while on server SoCs most pads can be controlled. Thus, add a recommendation to always configure all pads for a board to guarantee integrity between different board or vendor firmware revisions where the soft straps might have been changed. Change-Id: I33063a3f6a1c9cd5267d85f7da84deb554489a26 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-05-11docs: correct and rewrite documentation regarding n/c / unused padsMichael Niewöhner
Intel PDGs starting from Skylake / Sunrise Point state that, different from the general recommendation in digital electronics, unconnected GPIOs defaulting to GPIO mode do explicitly not require termination. The reason for this is, that these GPIOs have the `GPIORXDIS` bit set, which effectively disconnects the pad from the internal logic by disabling the input buffer. This bit - besides `GPIOTXDIS` - can also be set explicitly by using the gpio macro `PAD_NC(pad, NONE)`. In some cases, a pull resistor may be required due to bad board design or when a vendor sets the RX/TX disable bits together with a pull resistor and schematics are not available to check if the pad is really unconnected or just unused. In this case the pull resistor should be kept. Pads defaulting to native functions usually don't need special handling. However, when pads requiring external pull-ups are missing these due to bad board design, they should be configured with `PAD_NC` to disconnect them internally. Rewrite the documentation to reflect these new findings. Also clarify the comment in soc/intel gpio code accordingly. Change-Id: Id01b197ebe8f2b8bb4ecf3d119ec2298b26d9be0 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52139 Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-10Documentation/releases: Fill in coreboot 4.14 release notesPatrick Georgi
Change-Id: I79530c91424112247e485a5a41debc666e0072d4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54003 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-21 15:35:07 +0000