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Private changes on Gerrit are a tricky beast in that they're well hidden
in the UI and a few other places but still reachable under certain
circumstances.
Change-Id: I1c8c6cccfd023bc1d839dc5d9544204c88f89c7e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59229
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Tested using MrChromeBox's `uefipayload_202107` branch:
* Windows 10
* Ubuntu 20.04
* MX Linux 19.4
* Manjaro 21
No known issues.
https://starlabs.systems/pages/starbook-specification
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I090971a9e8d2be5b08be886d00d304607304b645
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56088
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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While we don't _want_ FSP, we can't get around it sometimes. But when
using it, we can still try to establish best practices to make life
easier for everybody.
Change-Id: I4efd273e4141dc6dc4cf8bdebda9cffd0d7cc1a1
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Change-Id: Idb16092b687ebffb319bc1908f08f350d612d36a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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Update Delta Lake document following the publish of OCP blog
and the Wiwynn press release.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I3eaa765bf9918988b4b5cb01e8607a5c27b9bd17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58979
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Fix date for 4.16 release.
Change-Id: I6ff5849cb4b7bd3bc6c1d91637536b6e94d92a1a
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59058
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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https://tech-docs.system76.com/models/gaze16/README.html
The gaze16 comes in 3 variants due to differences in the discrete GPU
and network controller used.
- NVIDIA RTX 3050, using Realtek Ethernet controller
- NVIDIA RTX 3060, using Realtek Ethernet controller
- NVIDIA RTX 3060, using onboard Intel I219-V Ethernet controller
Tested on the 3050 variant.
Tested with TianoCore (UefiPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots
- M.2 NVMe SSD
- M.2 SATA SSD
- 2.5" SSD
- All USB ports
- SD card reader
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- Internal microphone
- Internal speakers
- Combined headphone + mic 3.5mm audio*
- 3.5mm microphone input*
- S3 suspend/resume
- Booting to Pop!_OS Linux 21.04 and Windows 10 20H2
- Flashing with flashrom
Not working:
- Discrete/Hybrid graphics
- Mini DisplayPort output (requires NVIDIA GPU)
- 3.5mm audio input/output detection on Windows
Change-Id: Ifb90f9b73a10abf53a21738e2c466d539df9a37c
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56956
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I7189ac62d5ec826cf0377712941ba227362c1e09
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59122
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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coreboot 4.15 has just been released, so it's neither "upcoming" nor
"planned" anymore.
Change-Id: I287e40deec5877764e511885e3268b606caff597
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59121
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Use the official spelling. [1]
[1]: https://ark.intel.com/content/www/us/en/ark/products/codename/189143/products-formerly-cooper-lake.html
Change-Id: I7dbd332600caa7c04fc4f6bac53880e832e97bda
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Update list of boards that support vboot.
Change-Id: Id5d4d18202bf85c5ba407efd690eee5cba88a8a7
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58975
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I6c8327a7cf47217d32359b304b21e806c10dcc62
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59022
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Update details for upcoming 4.15 release
Change-Id: Ie4d47456cce38e7ec4329f8cb839167017c7e26b
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58974
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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Most of the System76 boards have now been merged.
Change-Id: I0353b28c1df3da8be961cb43225dcf9e30b47d16
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58868
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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The weak functions were removed in bce7458 "acpi/acpigen.c: Remove weak gpio definition".
Change-Id: Ia6e51698d6209fbf4f59b7fbc988a1aa696e366f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58933
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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https://tech-docs.system76.com/models/oryp8/README.html
Tested with TianoCore (UeifPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots
- Both M.2 SSD slots
- All USB ports
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- Internal microphone
- Internal speakers
- Combined 3.5mm headphone & microphone jack
- Combined 3.5mm microphone & S/PDIF jack*
- S3 suspend/resume
- Booting to Pop!_OS Linux 21.10 and Windows 10 20H2
- Flashing with flashrom
Not working:
- Discrete/Hybrid graphics
Not tested:
- Thunderbolt functionality
- S/PDIF output
Change-Id: Iabc8e273f997d7f5852ddec63e0c1bf0c9434acb
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57652
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: I55a827f8d6a5421c36f77049935630f4db4ba04d
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49173
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: Id00a45a6a6acf0880934c55f1a3f18e63f2aed43
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: I3e64793c58f2acfbfc42e46782d68bec97088601
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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Change-Id: I0fa24b233383bdc778b2c641f68e4e87f92206d1
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Change-Id: I42ce11914d7e7b32017747bbc6d3c7ac77e2868b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58758
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I3a2612ae64ecea2d1d7ecb695215bc50dccb1b19
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58663
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Code coverage requires `lcov`, so update the docs to call it out
specifically.
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Change-Id: Ie2898faa5188a7174c4e56ba34f1a4f02f939b03
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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Update details for upcoming 4.15 release
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Change-Id: I4517f7c17ce5788c82a1eafb1589e39b1ce403ff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58422
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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As of 2020-07-21 their website says "we'll stop any device produce
and won't have a date to return (if we return)."
While wishing them best of luck (and welcome them back to the list
of distributors), let's take them off the list while they don't
ship hardawre.
Change-Id: Ia110d0e25bf73c3d7db270b0c2c0e23b99fc36ef
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58573
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Change-Id: I3043e70523db1b7f1df90789a69eadd155848bb0
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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The coding style doc isn't short, so scrap that, and it's specific to
the C parts of our tree, so add that.
Change-Id: Ib1ef7c1a96ff40f0cfbae7d22a47a95128981eb8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58381
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Replace `bee` with `been`.
Change-Id: I206f9b33d79386fc4f204db3e21a92fa20b703bd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Looks like nothing references this example. Remove it. If one needs an
example, there's several mainboards which contain an I/O trap handler.
Change-Id: I4a238fbf354926cb6568e1709bfb79cc546dfd73
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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Change-Id: I6a4d5011ea47576c9a459f20e0b368cff8a326c2
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58150
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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New boards introduced to trogdor family.
BUG=b:201263032
BRANCH=none
TEST=make
Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: I8299ddda14eb82103f17f8464a14992aa757afa6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58033
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Update Delta Lake documentation upon:
* Delta Lake and Yosemite-V3 design specs acceptance by OCP.
* Delta Lake OSF acceptance by OCP.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I315db879b75f0df2fbca2fa8bb6d00987a69efba
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57688
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
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Change-Id: I3965a90151bd9250a87dabc715d68a39699ff9e1
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48422
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I5dd3bc320ca640728e1d86180c6bfa0dc7295760
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I9ba7d2af3c9c298fda2b2997d52546cc2f702a82
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52063
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I3dfa2ab430439d8dc71531b92aa7800db94d603b
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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https://tech-docs.system76.com/models/darp7/README.html
Tested with TianoCore (UefiPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots
- M.2 NVMe SSD
- M.2 SATA SSD
- MicroSD card reader
- All USB ports
- USB-PD
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- DP over USB-C output
- Internal microphone
- Internal speakers
- Combined 3.5mm headphone/microphone jack
- S0ix suspend*
- Booting to Ubuntu Linux 21.04 and Windows 10
- Flashing with flashrom
Not working:
- S0ix when a device is attached to the TBT port
Not tested:
- Thunderbolt functionality
Change-Id: I80e5c5375f9d3881fc89a45a91ba68ed2e104a93
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52349
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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There's dead links, CorebootPayloadPkg was replaced by UEFIPayloadPkg,
the development procedures are severely out-of-date, the only FSP 1.1
platform is Braswell (which is no longer actively developed), and the
pages don't appear in doc.coreboot.org (which uses Sphinx to generate
HTML pages from .md files). Oh, and it doesn't seem to have a license
associated to it.
Get rid of outdated documentation.
Change-Id: If359f554e85d32cdb65c3d928b5155db30bc40a5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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https://tech-docs.system76.com/models/galp5/README.html
Tested with TianoCore (UefiPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots
- M.2 NVMe SSD
- All USB ports
- SD card reader
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- Internal microphone
- Internal speakers
- Combined 3.5mm headphone/microphone jack
- S0ix suspend*
- Booting to Pop!_OS Linux 21.04 and Windows 10
- Flashing with flashrom
Not working:
- Discrete/Hybrid graphics
- S0ix when a device is attached to the TBT port
Change-Id: I0d9052c0b064d4d43812ad837578d4a097149cc8
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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https://tech-docs.system76.com/models/lemp10/README.html
Tested with TianoCore (UefiPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- DIMM slot and onboard RAM
- Both M.2 NVMe SSDs
- MicroSD card reader
- All USB ports
- USB-PD
- Webcam
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- DP over USB-C output
- Internal microphone
- Internal speakers
- Combined 3.5mm headphone/microphone jack
- S0ix suspend*
- Booting to Pop!_OS Linux 21.04 and Windows 10
- Flashing with flashrom
Not working:
- S0ix when a device is attached to the TBT port
Change-Id: I15f7a3b6e9af07fcfde9a71d3f4a84ed625159b7
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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1. The video output now works correctly with Intel IGD (tested with
TianoCore, edk2-stable201903-3392-gf7fe27d686).
2. The kempld EC driver now supports GPIO configuration since
commit 9941e5a5e6 (ec/kontron/kempld: Add minimal GPIO driver).
3. CorebootPayloadPkg is practically dead by now, so delete the comment
about the problem with it.
Change-Id: Ic216c3437b2670638c845ee8964f831b80e18fce
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57461
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This patch adds a new variant called kingoftown.
it's clamshell only, no FPR, eDP panel.
BUG=b:198365759
BRANCH=master
TEST=make
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Change-Id: I648664c50dfad11530a854f574f39264158b44e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bob Moragues <moragues@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Change-Id: I7e575cb17e2004bd931f4fa1d05f17c4cdca29ba
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57444
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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There is no existing documentation on how `device ref` and aliases work
in the devicetree, and the behavior around devices not being in the same
location is difficult to discern as well as somewhat unexpected.
This should help prevent confusion leading to bugs such as the one fixed
by https://review.coreboot.org/c/coreboot/+/57298
Change-Id: I4b30f7d531cfc3453d6523a76084f1969125b4bf
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57354
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Mainboard information can be found in the included documentation.
Change-Id: I9dfc58bb99e14cd9dac2ac53afc0ea11d2252aa9
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Change-Id: I0b1c29162a64030b5c100368f2471702e22b8311
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54744
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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When running multiple tests, e.g. by using unit-tests target, it is hard
to differentiate, which output comes from which file and/or
configuration. This patch makes the output easier to analyze and
understand by using new wrapper macro cb_run_group_tests(). This macro
uses __TEST_NAME__ value (containing test path and Makefile test name)
as a group name when calling cmocka group runner.
Example:
Test path: tests/lib/
Makefile test name: cbmem_stage_cache-test
Test group array name: tests
Result: tests/lib/cbmem_stage_cache-test(tests)
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I4fd936d00d77cbe2637b857ba03b4a208428ea0d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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It would be easier for people to find the defined variables.
Change-Id: I6d181f6602aa5d55019ea2110b2d8e1fa7e0159c
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57255
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
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Since all mainboards use `CHIPSET_LOCKDOWN_COREBOOT`, make it the
default by changing its enum value to 0 and remove its configuration
from all related devicetrees.
If `common_soc_config.chipset_lockdown` is not configured with
something else in the devicetree, then `CHIPSET_LOCKDOWN_COREBOOT`
is used.
Also, add a release note for the upcoming 4.15 release.
Change-Id: I369f01d3da2e901e2fb57f2c83bd07380f3946a6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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Change-Id: I71b97930f1a1ca4a60f830a90d80af6ca0236c8e
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57093
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
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Sounds like we prefer to have this under drivers/ instead of device/.
Also move all MIPI-related headers out from device/ into their own
directory.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ib3e66954b8f0cf85b28d8d186b09d7846707559d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57128
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The "silentoldconfig" target has been removed in Linux 5.13's kconfig
(CB:37152). As explained by Michal Marek at
https://lkml.org/lkml/2011/8/31/189, the "silentoldconfig" target has
become an internal interface and "oldconfig" is just as silent now.
Therefore, correct the target for syntax checking.
Change-Id: I8416bd4a96d15415f46c591ceb26ebb29aef1ab0
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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Change-Id: I9f9aa5bf6ed4e1430e7067bfe5d3ce8e59e85812
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56977
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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New board introduced to trogdor family.
BUG=b:193870279
BRANCH=none
TEST=make
Change-Id: If3d9662e8725e30e1308d77b05545efbee29f846
Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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This project is already implemented and therefore should not be
mentioned anymore as a new project idea in the documentation.
Change-Id: I38c6e274e416b98485943d36536a57a14743945b
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This was originally several commits that had to be squashed into one
because the intermediate states weren't able to build coreboot:
- one to remove everything that wasn't our own code, leaving only
regex.[ch], toada.c, description.md and Makefile.inc.
- one to copy in Linux 5.13's scripts/kconfig and adapt Makefile.inc
to make the original Makefile work again.
- adapt abuild to use olddefconfig, simplifying matters.
- apply patches in util/kconfig/patches.
- Some more adaptations to the libpayload build system.
The patches are now in util/kconfig/patches/, reverse applying them
should lead to a util/kconfig/ tree that contains exactly the Linux
version + our own 5 files.
Change-Id: Ia0e8fe4e9022b278f34ab113a433ef4d45e5c355
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37152
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
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Add oem variables information with usage example.
BRANCH=None
BUG=b:187253038
TEST=Built and tested on dedede board
Change-Id: I45db17f6ee3328da28f985c6854d65a430c9c61b
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55846
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Introduce `USE_EXP_X86_64_SUPPORT` in `src/arch/x86/Kconfig` and guard
it with `HAVE_EXP_X86_64_SUPPORT`. Replace the per-CPU implementations
of the same functionality with the newly-added Kconfig options. Update
documentation and the config file for QEMU accordingly.
Change-Id: I550216fd2a8323342d6b605306b0b95ffd5dcd1c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55760
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Mainboard information can be found in the included documentation.
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: Idb696193e5a67c42adf45e54d455d2dff7681ca7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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New boards introduced to trogdor family.
BUG=b:191800434
BRANCH=none
TEST=make
Change-Id: I93b74e79188bd0cc36c8b48e552230ae0d6f593a
Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Mainboard information can be found in the included documentation.
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: Ic811e24bd72da84e5ca8f5b09f2eb65872153b72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55111
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Mainboard information can be found in the included documentation.
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: Ic56ac0e5f93a6e818ef0666e41996718471b1cf6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Change-Id: Idf6d46ed262b18c176d69352e333c56f4fdff66a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55041
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Using the linker's --wrap feature has the downside that it only covers
references across object files: If foo.c defines a() and b(), with b
calling a, --wrap=a does nothing to that call.
Instead, use objcopy to mark a weak and global so it can be overridden
by another implementation, but only for files originating in src/.
That way mocks - implemented in tests/ - become the source of truth.
TEST=Had such an issue with get_log_level() in a follow-up commit, and
the mock now takes over. Also, all existing unit tests still pass.
Change-Id: I99c6d6e44ecfc73366bf464d9c51c7da3f8db388
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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This patch adds a new variant called Pazquel that is identical to Lazor
for now.
BUG=b:187232137
TEST=make
Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com>
Change-Id: Ib531ea5df19fe91e619f23baada73842554538ad
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55268
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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This reverts commit 2e665eb8daa2963c52092e694a5316dc544a23f5.
Reason for revert: Was submitted too early and out-of-order.
Change-Id: I119b7a81b849bbe3424d73d5fdf9b55481444686
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54971
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add support for LabTop Mk III (kblr) and LabTop Mk IV (cml)
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55128
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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We are also present on Slack so advertise that.
Change-Id: I7d9887e524e47e6f42a5013e9f696881ef54a631
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: Ib1d866ecf041ddc4aaf508d290a3e31b9a108cf2
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55018
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Some files weren't properly hooked up, making Sphinx complain.
Change-Id: If959fa63d4ddbc3916c49c5ad6602e76b12a7e60
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55020
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The syntax requires two bracketed fields.
Change-Id: I98ebe714e57f50017755eed7888f0dd2637a3066
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55019
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Change-Id: I3035266c5e035b954c0d709bd2c09069128c3340
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55010
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Swift Geek (Sebastian Grzywna) <swiftgeek@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Some mainboards need a mainboard-specific mechanism to access option
values. Allow mainboards to implement the option API. Also, add some
documentation about the current option API, and describe when should
one reimplement the option API in mainboard code: only when the code
is mainboard-specific to comply with externally-imposed constraints.
Change-Id: Idccdb9a008b1ebb89821961659f27b1c0b17d29c
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54729
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Not physically squashed, the coreboot code got turned into a variant
setup with override devicetrees to drop redundant boilerplate.
Change-Id: I7ae5530d2603d6d108ef3829004de7e1cad130f9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54690
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
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Fix the exclusion path for lcov; it should exclude the directory
with source code, not object files.
Use the COV environment variable to
* control whether we build for coverage or not
* select the output directory
Add a separate target for generating the report, so we can get a
report for all of the tests together or just a single test.
Add documentation.
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Change-Id: I2bd2bfdedfab291aabeaa968c10b17e9b61c9c0a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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Change-Id: I8885e9fb401838229ead72b97394f3e2343aabed
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Martin Roth <martinroth@google.com>
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Copy the text from the [Web site](https://coreboot.org/users.html).
Change-Id: I805f558514eb50580b5bd79bd4f964e66a15158d
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Change-Id: Id1f27d68124de745ff0eaad669ee86ce0b57ec09
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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Change-Id: Ib1718dfa174e2a4e9c2c4b5564e196e8483a8f3c
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Change-Id: I5d6095c6d8423e3a67f027f23d4c00dcb34a50cb
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Drop the deprecated COREBOOTPAYLOAD option, and replace it with MrChromebox's
updated UefiPayloadPkg option. Simplify the Kconfig options to make it easier
to build from upstream edk2 master. Drop the TIANOCORE_USE_8254_TIMER Kconfig
option since it applied only to CorebootPayloadPkg. Clean up the Makefile now
that we're only building from a single Tianocore package/target.
Test: build/boot qemu Q35 target with both UefiPayload and Upstream options.
Change-Id: If545fbd0c30be6dcc6ff43107b80980fa23a527e
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54019
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I23b0c94ec9881aef8e39a14bc048856a65a6286d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54035
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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There are some steps when updating the release notes that are easily
missed (see: I missed them for 4.14), so document them.
Change-Id: Icdb69eb74f8dd3a7189eb8803b0259c4e6a31f96
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Change-Id: I52bd1ee6b297ba08e335f5c65941b09f14689a00
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Since we want commits to go through 24 hours of review, move the
vboot list update a week earlier. Also point more directly at the
right script to execute.
Change-Id: I49e6dfe22894402d5a0526588f8a04595ac88862
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Created by util/vboot_list/vboot_list.sh
Change-Id: I49536c26540c0fd1940a32f588fa49afb55b108a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54029
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Soft straps, that can be configured by the vendor in the Intel Flash
Image Tool (FIT), can influence some pads' default state. It is possible
to select either a native function or GPIO mode for some pads on
non-server SoCs, while on server SoCs most pads can be controlled.
Thus, add a recommendation to always configure all pads for a board to
guarantee integrity between different board or vendor firmware revisions
where the soft straps might have been changed.
Change-Id: I33063a3f6a1c9cd5267d85f7da84deb554489a26
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Intel PDGs starting from Skylake / Sunrise Point state that, different
from the general recommendation in digital electronics, unconnected
GPIOs defaulting to GPIO mode do explicitly not require termination.
The reason for this is, that these GPIOs have the `GPIORXDIS` bit set,
which effectively disconnects the pad from the internal logic by
disabling the input buffer.
This bit - besides `GPIOTXDIS` - can also be set explicitly by using
the gpio macro `PAD_NC(pad, NONE)`.
In some cases, a pull resistor may be required due to bad board design
or when a vendor sets the RX/TX disable bits together with a pull
resistor and schematics are not available to check if the pad is really
unconnected or just unused. In this case the pull resistor should be
kept.
Pads defaulting to native functions usually don't need special handling.
However, when pads requiring external pull-ups are missing these due to
bad board design, they should be configured with `PAD_NC` to disconnect
them internally.
Rewrite the documentation to reflect these new findings.
Also clarify the comment in soc/intel gpio code accordingly.
Change-Id: Id01b197ebe8f2b8bb4ecf3d119ec2298b26d9be0
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52139
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I79530c91424112247e485a5a41debc666e0072d4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54003
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Ibead1c75bb4e41fedc2799366b5b006d76fc8f4e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52735
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: Ifa58a9ac7c6dcc391cd9942295319a8677cd4492
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Document the roles we have on review.coreboot.org, the expectations
associated with them, and how to become part of any of these groups.
Change-Id: Ib31083f5a07bd89efd13ecd6aaf34a69d438d59d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52265
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I72a9056edfddb4e2cd2e6412cb5ea72cf965f9c6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53924
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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If device is supported as a wake source, _S0W should be set to D3hot.
This ensures that the device is put into D3hot by the OSPM.
Power resource(PRIC) for the device is listed in both _PR0 and _PR3. Thus, it ensures that the OSPM does not turn off power resource when device is put into D0 and D3hot. Hence, it is capable of waking the system from D3hot state. However, if it is put into D3cold, then the power resource is turned off by the OSPM.
The devices we are currently looking at for touchscreen/touchpad
do not really support auxiliary power and so do not support wake from D3cold.
BUG=b:186070097
TEST=build and check device wake state _S0W set to 3 in ssdt table.
Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52847
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
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Sooner or later, some board was going to need extra FW_CONFIG bits for
a field that was already in production, so this patch adds support for
adding extra (unused) bits to a field.
The extra are appended via a syntax like:
`field FIELD_NAME START0 END0 | START1 END1 | START2 END2 ...`
and the suffixed bits are all treated as if they are contiguous when
defining option values.
BUG=b:185190978
TEST=Modified volteer fw_config to the following:
field AUDIO 8 10 | 29 29 | 31 31
option NONE 0
option MAX98357_ALC5682I_I2S 1
option MAX98373_ALC5682I_I2S 2
option MAX98373_ALC5682_SNDW 3
option MAX98373_ALC5682I_I2S_UP4 4
option MAX98360_ALC5682I_I2S 5
option RT1011_ALC5682I_I2S 6
option AUDIO_FOO 7
option AUDIO_BAR 8
option AUDIO_QUUX 9
option AUDIO_BLAH1 10
option AUDIO_BLAH2 15
option AUDIO_BLAH3 16
option AUDIO_BLAH4 31
end
which yielded (in static_fw_config.h):
FW_CONFIG_FIELD_AUDIO_MASK 0xa0000700
FW_CONFIG_FIELD_AUDIO_OPTION_NONE_VALUE 0x0
FW_CONFIG_FIELD_AUDIO_OPTION_MAX98357_ALC5682I_I2S_VALUE 0x100
FW_CONFIG_FIELD_AUDIO_OPTION_MAX98373_ALC5682I_I2S_VALUE 0x200
FW_CONFIG_FIELD_AUDIO_OPTION_MAX98373_ALC5682_SNDW_VALUE 0x300
FW_CONFIG_FIELD_AUDIO_OPTION_MAX98373_ALC5682I_I2S_UP4_VALUE 0x400
FW_CONFIG_FIELD_AUDIO_OPTION_MAX98360_ALC5682I_I2S_VALUE 0x500
FW_CONFIG_FIELD_AUDIO_OPTION_RT1011_ALC5682I_I2S_VALUE 0x600
FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_FOO_VALUE 0x700
FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BAR_VALUE 0x20000000
FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_QUUX_VALUE 0x20000100
FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BLAH1_VALUE 0x20000200
FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BLAH2_VALUE 0x20000700
FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BLAH3_VALUE 0x80000000
FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BLAH4_VALUE 0xa0000700
Change-Id: I5ed76706347ee9642198efc77139abdc3af1b8a6
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52747
Reviewed-by: Duncan Laurie <duncan@iceblink.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The board can be flashed without adding a diode by just leaving VCC
unconnected. Rework the flashing section to describes that.
Change-Id: I37d55ffdbcfba4f3a1113a82f16ec8766bbb6e6c
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Fan control and FireWire work fine on my board.
Signed-off-by: Stefan Ott <stefan@ott.net>
Change-Id: Idc69e902370c4094daef93e843abc6ae564625f3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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https://tech-docs.system76.com/models/oryp6/README.html
Tested with TianoCore (UefiPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots
- M.2 NVMe
- M.2 SATA
- MicroSD card slot
- All USB ports
- Integrated graphics using Intel GOP driver
- Webcam
- Ethernet
- Internal microphone
- Combined headphone + mic 3.5mm jack
- Combined microphone + S/PDIF 3.5mm jack
- Booting to Ubuntu Linux 20.10 and Windows 10
- Flashing with flashrom
Not working:
- S3 suspend/resume: System hangs on wake from S3
- Discrete/Hybrid graphics: Requires a new driver
- Internal speakers: Enabled in separate patch
Not tested:
- Thunderbolt functionality
- S/PDIF output
Change-Id: If017d65ca6cb36fe1f631d4dadd050a1547c93fa
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47768
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I4c989de4d2af3e810fb0e4803d0fa2396917d93e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50829
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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