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2019-05-29Documentation: Warn about ME cleaner on Sandy BridgePatrick Rudolph
Document known issues with 'disabled' ME. Change-Id: I364f3ed49341523c781eb2f3b41e866f33632a7e Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32889 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-04-28Documentation/northbridge/intel/haswell/mrc.bin.md: add SPD addressesDaniel Maslowski
Change-Id: I8bf81637f582373d9bba1d47fe5205d459151f3e Signed-off-by: Daniel Maslowski <dan@orangecms.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32473 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-01-03Doc/nb/intel/haswell: Add a list of known issuesTristan Corrick
Change-Id: If0339831550f6c70e8056f78633e9a402f35a793 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30455 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-03Doc/nb/intel/haswell: Mention util/chromeos as a way to get mrc.binTristan Corrick
Change-Id: Ic099d0f052db5ef6a699d54b26028bae2fae4770 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30546 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-12-24Documentation/nb/intel: Add Haswell documentationTristan Corrick
At the moment, this just gives some details on the MRC. Change-Id: I84e8ca2543b2e19b84a24f7d7032a4aedb6e9272 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30356 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-10-04Documentation: Spell "blob" in lowercaseJonathan Neuschäfer
It's not an acronym (outside of database software). Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28827 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
2018-09-21Documentation: fix sphinx warningsTom Hiller
Fix warning from list in table cells for nri_registers.md Change-Id: I2b77ad266d1c5f693536e161f96f3db19832989c Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/28354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-16Documentation/mb/intel/sandybridge/nri: Change column name to "Comments"Jonathan Neuschäfer
This column doesn't really contain a description, but additional comments. Change-Id: I714972ee336bc1f8a4feb75292ee9efa583f0bb1 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28625 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-08-30Documentation/nb/intel/sandybridge/nri_registers.md: Fix mistakeAngel Pons
According to a comment on fa1a07b, the 100MHz clock is the Ivy Bridge only clock, not the 133MHz one. Change-Id: I28fed4a9264b96f93b9e88325f547a5db512514c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28377 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-27Documentation: Fix formattingTom Hiller
Fix formatting and missing close block quotes in nri_registers.md Change-Id: I5fa0136f4d7f05737a0d53ff9da7d2c77b22d675 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/28327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-08-22Documentation/northbridge/intel/sandybridge/*: fix typosAngel Pons
Fix some words' spelling and rename "Sandybridge" and "Ivybridge" in text (not filepaths) to match Intel's names "Sandy Bridge" and "Ivy Bridge". Change-Id: Ic77126ccaf1d3ec5530a35d1a0f7d2ea5e174c9a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-06-15Documentation: Add SandyBridge NRI feature matrixPatrick Rudolph
Change-Id: I69b014430802de132c8d9b6c8409bc762b995468 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/27093 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-30Documentation: Update index.md and move filesPhilipp Deppenwiese
* Add more subdirectories and index.mds. * Move "getting started" and "lessons" into sub-directories. * Move "NativeRaminit" into northbridge/intel/sandybridge folder. * Move "MultiProcessorInit" into soc/intel/icelake folder. * Reference new files Change-Id: I78c3ec0e8bcc342686277ae141a88d0486680978 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/26262 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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