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2024-07-09Docs: Fix paths in references to other markdown documentsNicholas Chin
This fixes a few "cross-reference target not found" warnings from MyST parser. In these cases, the relative path to the target markdown document was incorrect. Change-Id: I5d01deacc3ba7401faba30fc832e2357d4aedad8 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83383 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2024-03-21Docs: Replace Recommonmark with MyST ParserNicholas Chin
Recommonmark has been deprecated since 2021 [1] and the last release was over 3 years ago [2]. As per their announcement, Markedly Structured Text (MyST) Parser [3] is the recommended replacement. For the most part, the existing documentation is compatible with MyST, as both parsers are built around the CommonMark flavor of Markdown. The main difference that affects coreboot is how the Sphinx toctree is generated. Recommonmark has a feature called auto_toc_tree, which converts single level lists of references into a toctree: * [Part 1: Starting from scratch](part1.md) * [Part 2: Submitting a patch to coreboot.org](part2.md) * [Part 3: Writing unit tests](part3.md) * [Managing local additions](managing_local_additions.md) * [Flashing firmware](flashing_firmware/index.md) MyST Parser does not provide a replacement for this feature, meaning the toctree must be defined manually. This is done using MyST's syntax for Sphinx directives: ```{toctree} :maxdepth: 1 Part 1: Starting from scratch <part1.md> Part 2: Submitting a patch to coreboot.org <part2.md> Part 3: Writing unit tests <part3.md> Managing local additions <managing_local_additions.md> Flashing firmware <flashing_firmware/index.md> ``` Internally, auto_toc_tree essentially converts lists of references into the Sphinx toctree structure that the MyST syntax above more directly represents. The toctrees were converted to the MyST syntax using the following command and Python script: `find ./ -iname "*.md" | xargs -n 1 python conv_toctree.py` ``` import re import sys in_list = False f = open(sys.argv[1]) lines = f.readlines() f.close() with open(sys.argv[1], "w") as f: for line in lines: match = re.match(r"^[-*+] \[(.*)\]\((.*)\)$", line) if match is not None: if not in_list: in_list = True f.write("```{toctree}\n") f.write(":maxdepth: 1\n\n") f.write(match.group(1) + " <" + match.group(2) + ">\n") else: if in_list: f.write("```\n") f.write(line) in_list = False if in_list: f.write("```\n") ``` While this does add a little more work for creating the toctree, this does give more control over exactly what goes into the toctree. For instance, lists of links to external resources currently end up in the toctree, but we may want to limit it to pages within coreboot. This change does break rendering and navigation of the documentation in applications that can render Markdown, such as Okular, Gitiles, or the GitHub mirror. Assuming the docs are mainly intended to be viewed after being rendered to doc.coreboot.org, this is probably not an issue in practice. Another difference is that MyST natively supports Markdown tables, whereas with Recommonmark, tables had to be written in embedded rST [4]. However, MyST also supports embedded rST, so the existing tables can be easily converted as the syntax is nearly identical. These were converted using `find ./ -iname "*.md" | xargs -n 1 sed -i "s/eval_rst/{eval-rst}/"` Makefile.sphinx and conf.py were regenerated from scratch by running `sphinx-quickstart` using the updated version of Sphinx, which removes a lot of old commented out boilerplate. Any relevant changes coreboot had made on top of the previous autogenerated versions of these files were ported over to the newly generated file. From some initial testing the generated webpages appear and function identically to the existing documentation built with Recommonmark. TEST: `make -C util/docker docker-build-docs` builds the documentation successfully and the generated output renders properly when viewed in a web browser. [1] https://github.com/readthedocs/recommonmark/issues/221 [2] https://pypi.org/project/recommonmark/ [3] https://myst-parser.readthedocs.io/en/latest/ [4] https://doc.coreboot.org/getting_started/writing_documentation.html Change-Id: I0837c1722fa56d25c9441ea218e943d8f3d9b804 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73158 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-09-21mb/x11-lga1151-series: Add x11ssw-fKieran Kunhya
This board is similar to x11ssm-f but has a proprietary form factor with NVMe and a single x16 slot (potentially bifurcated to 2x x8) and a x4 slot. Change-Id: I53a0b6012ae64cf1ba4b625f11aaf771637307f3 Signed-off-by: Kieran Kunhya <kieran@kunhya.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77610 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2022-03-11Documentation: Move firmware flashing tutorial to tutorial sectionFelix Singer
There is no need that the tutorial for flashing firmware has its own point in the main menu. Thus, move it to the tutorial section. Change-Id: Ife6d97254af4c006fe01480a78c76303f9cb34bb Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
2022-03-11Documentation: Use file paths to flashing firmware tutorialFelix Singer
In preperation for CB:62424, replace HTTP links pointing to the flashing firmware tutorial with file paths to the Markdown files. Change-Id: I6a271a912348cbe002bc9cced9922ed743e1133c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62452 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-09-05mb/supermicro: Add X9SAE and X9SAE-VBill XIE
Mainboard information can be found in the included documentation. Change-Id: I9dfc58bb99e14cd9dac2ac53afc0ea11d2252aa9 Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57191 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-05-28Documentation: Fix named linkPatrick Georgi
The syntax requires two bracketed fields. Change-Id: I98ebe714e57f50017755eed7888f0dd2637a3066 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55019 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-04-29docs/mb/supermicro/x11ssm-f: rework flashing sectionMichael Niewöhner
The board can be flashed without adding a diode by just leaving VCC unconnected. Rework the flashing section to describes that. Change-Id: I37d55ffdbcfba4f3a1113a82f16ec8766bbb6e6c Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52679 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-04-03docs/mb/supermicro: add SUM tool for flashing with disabled MEMichael Niewöhner
Change-Id: I08543c0908a6cb4ef9fb46d0eb3a7aa481fb95d9 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49887 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-15mb/supermicro/x11-lga1151-series: add support of X11SSH-LN4F to X11SSH-FAlexander Couzens
The X11SSH-LN4F and X11SSH-F are very similiar. They both use the same PCB and use the same Supermicro BIOS ID. The X11SSH-LN4F has 4 NICs in difference to the X11SSH-F which only has 2 NICs. The two additional NICs aren't populated on the X11SSH-F. Enable the PCIe root ports connected to the two additional Intel NICs. Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Change-Id: Id4e66be47ceef75905ba760b8d5a14284e130f63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51330 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-02-09Documentation: Use correct KiB/MiB units instead of KB/MBEvgeny Zinoviev
Fix a common mistake of using KB/MB where KiB/MiB is what actually is meant. 1 MB = (10^3)^2 = 1000000 1 MiB = (2^10)^2 = 1048576 Change-Id: I78327652b6c6526318071a9d4bafd7ec279ea614 Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39685 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-27docs/mb/supermicro/x11-lga-series: Update documentationMichael Niewöhner
- Drop issue about non-working TianoCore with Aspeed NGI. see CB:35726 - Add missing reference to X11SSH-F - Drop TODO reference; there are no TODOs left Change-Id: I5becfa9ea01a0d9d651c6b51b30ebfcedb6412a5 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48101 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-27{docs/,}mb/supermicro/x11ssh-tf: drop TODO sectionMichael Niewöhner
Drop the TODO comment, since there is no TODO left. Also drop the now obsolete TODO section from the board documentation. Change-Id: I4192aaedc1429c8ff1bd7c52baa4741e1df0d0c5 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48126 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2020-11-27docs/mb/supermicro/x11ssm-f: Update board documentationMichael Niewöhner
- Drop vanished issue on PCIe warning - Drop TODO section, since the TODOs are done - Document the jumper J6, that was not documented by the vendor. Its function has been determined by dissecting a dead board. - The flash is not socketed anymore. Drop that note and compress the whole paragraph. Also add a note about flashing via the BMC web interface. Change-Id: I2b5a08a6b6d80717621d6a30f31829fe4b84891a Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2020-10-20mb/supermicro/x11-lga1151-series: add x11ssh-f board as a variantBill XIE
This adds another X11 series board, the X11SSH-F, which is similiar to X11SSH-TF but differs in PCIe interfaces/devices, ethernet interfaces. Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: I92c32bff861f0b5697aea52ff282fae76b3b78ac Reviewed-on: https://review.coreboot.org/c/coreboot/+/45229 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2020-01-06util/supermicro: Add and use new tool smcbiosinfoPatrick Rudolph
The BMC and tools interacting with it depend on metadata placed inside the ROM in order the flash the BIOS. Add a new tool smcbiosinfo, integrate it into the build system, and generate a 128byte metadata file called smcbiosinfo.bin on build. You need to provide the BoardID for every SMC mainboard through a new Kconfig symbol: SUPERMICRO_BOARDID Some fields are unknown, but it's sufficient to flash it using SMC vendor tools. Tested on Supermicro X11SSH: * Flashing using the WebUI works * Flashing using SMCIPMITool works No further validation is done on the firmware. Change-Id: Id608c2ce78614b45a2fd0b26d97d666f02223998 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35484 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-11-19Documentation: Reword Supermicro X10SLM+-F datasheet referencesPaul Menzel
Change-Id: I24c4254ef65edcddadcf0386e0cbe996a5e99458 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35486 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-11-19docs: intel fsp: add memory retraining bug on SPS systemsMichael Niewöhner
FSP2.0 forces MRC retraining on cold boot on Intel SPS systems. Change-Id: I3ce812309b46bdb580557916a775043fda63667f Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36935 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-11-01Documentation: Fix typoPatrick Rudolph
The document isn't included in any toc-tree due to a typo. Change-Id: Ic1491dde2d48b5d004fc28c743bbee6de12f433c Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36540 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-23mb/supermicro/x11-lga1151-series: add x11ssm-f boardMichael Niewöhner
This adds another x11 series board, the X11SSM-F, which is similiar to X11SSH-TF but differs in PCIe interfaces/devices, GPIO settings and Ethernet interfaces. Change-Id: I24e6f0f41a844652f88b562285b26beef311a2c9 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Michael Niewöhner
2019-10-15soc/intel/common/block/sgx: Fix crash in MP initPatrick Rudolph
On Hyper-Threading enabled platforms the MSR_PRMRR_PHYS_MASK was written when already locked by the sibling thread. In addition it loads microcode updates on all threads. To prevent such race conditions only call the code on one thread, such that the MSRs are only written once per core and the microcode is only loaded once for each core. Also add comments that describe the scope of the MSR that is being written to and mention the Intel documents used for reference. Fixes crash in SGX MP init. Tested on Supermicro X11SSH-TF. Change-Id: I7102da028a449c60ca700b3f9ccda9017aa6d6b5 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35312 Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-07src: Capitalize Super I/OElyes HAOUAS
Change-Id: I9ad9294dd2ae3e4a8a9069ac6464ad753af65ea5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35541 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-10-04mb/supermicro/x11-lga1151-series: rework documentationMichael Niewöhner
This splits the x11-lga1151-series' documentation into a generic and a board specific section as a preparation for CB:35427. Additionally this adds some more information on the x11ssh board. Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Change-Id: I40ddd0b5cce0b1a3306eae22fc0a0bc6b2a6263c Reviewed-on: https://review.coreboot.org/c/coreboot/+/35547 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-09-26mb/supermicro: restructure x11ssh-tf to represent a x11 board seriesMichael Niewöhner
Most of the X11 boards with socket LGA1151 are basically the same boards with just some minor differences like different NICs (1 GbE, 10 GbE), number of NICs / PCIe ports etc. There are about 20 boards that can be added, if there is a community for testing. To be able to add more x11 boards easily like x11ssm (see CB:35427) this restructures the x11ssh tree to represent a "X11 LGA1151 series". There were multiple suggestions for the structure like grouping by series (x10, x11, x...), grouping by chipset or by cpu family. It turned out that there are some "X11 series" boards that are completely different. Grouping by chipset or cpu family suffers from the same problem. This is why finally we agreed on grouping by series and socket ("X11 LGA1151 series"). The structure uses the common baseboard scheme, while there is no "real" baseboard we know of. By checking images, comparing logs etc. we came to the conclusion that Supermicro does have some base layout which is only modified a bit for the different boards. X11SSH-TF was moved to the variants/ folder with it's gpio.h. As we expect the other boards to have mostly the same device tree, there is a common devicetree that gets overridden by each variant's overridetree. Besides that some very minor modifications happened (formatting, fixing comments, ...) but not much. Documentation is reworked in CB:35547 Change-Id: I8dc4240ae042760a845e890b923ad40478bb8e29 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35426 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-22Documentation: Capitalize Super I/OPaul Menzel
Change-Id: I6bfe11abc1b3763f3d6c390bbccd9191b417945d Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35487 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-09-20Documentation: X11SSH-TF update known issuesPatrick Rudolph
Change-Id: I5811fb829b45381ac19b2c3f2411c91f85b61d08 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35465 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-09-16Documentation: rename "Rookie guide" to "tutorial"Patrick Georgi
We generally try to stay away from ascribing attributes to (future) devs. "Rookie guide" refers to the reader, while "tutorial" refers to the material. In the same spirit, move from "lessons" to "parts". It's not school :-) Change-Id: I11a69a2a05ba9a0bc48f8bf62463d9585da043ec Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35425 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao <lance.zhao@gmail.com> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-09-01mb/supermicro/x11ssh: Add Supermicro X11SSH-TFChristian Walter
Add support for the X11SSH-TF which is based on Intel KBL. Working: * SeaBIOS payload * LinuxBoot payload * IPMI of BMC * PCIe, SATA, USB and M.2 ports * RS232 serial * Native graphics init Not working: * TianoCore doesn't work yet as the Aspeed NGI is text mode only. * Intel SGX, due to random crashes in soc/intel/common For more details have a look at the documentation. Please apply those patches as well for good user experience: Ica0c20255f661dd61edc3a7d15646b7447c4658e Signed-off-by: Christian Walter <christian.walter@9elements.com> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Felix Singer <felix.singer@9elements.com> Change-Id: I2edaa4a928de3a065e517c0f20e3302b4b702323 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32734 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-01-09Doc/mb/supermicro/x10slm-f: Remove PCIe issue that has been fixedTristan Corrick
The issue in question was resolved with commit 334be3289d6c ("nb/intel/haswell: Add support for PEG"). Also add a link to the known issues for Haswell, which has some information on PCIe. Change-Id: Icc3061b60893394e3d537d3b86f4ac748cec2eb4 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30689 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-29mainboard: Add Supermicro X10SLM+-FTristan Corrick
This board runs well with coreboot. The documentation part of this commit lists what works and what doesn't. Tested with GRUB 2.02 as a payload, loading SeaBIOS 1.12.0 which then boots FreeBSD 11.2. It has also been tested with GRUB directly booting Debian GNU/Linux 9.6 (kernel 4.9). Change-Id: I291573d4651bdffe24eb841033ea6189fcbf8502 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30357 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-15 11:38:41 +0000