| Age | Commit message (Collapse) | Author |
|---|
|
http://www.linuxbios.org/pipermail/linuxbios/2007-October/025385.html ,
but change all apparantly related values that differ on my board with
legacy BIOS.
This makes both PCI cards appear, as well as the firewire device
TSB43AB23.
* PCI 01:07.0 appears fully functional
* PCI 01:08.0 (closer to the board edge) appears, but no interrupts
* PCI 01:0a.0 (FireWire) untested
Since none of these was even present without the patch I suggest to
apply it.
Signed-off-by: Torsten Duwe <duwe@lst.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Harald Gutmann <harald.gutmann@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2917 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
of all the other boards in this patch series.
Add missing PIRQ table to make most devices work.
Enable VGA support. Add flashrom flashing protection code.
Make CPU init actually work (result: massive speed-up).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
buildROM passes build flags through the CPU_OPT environment variable -
especially -fno-stack-protector for those of us lucky enough to have
Debian/Ubuntu. This adds to the cache_as_ram_auto.inc target
for the GA-2761GXDK so that the resulting cpu0.S is clean.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
This is not yet enough to actually successfully build the board, but
now abuild at least _attempts_ to build it.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: <corey.osgood@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
mainboard/ path. Also add a Config.lb for abuild. It's required for the
three images variant as abuild doesnt detect this automatically.
Trivial patch - it does not even fix the build yet. Patches welcome.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
code. This is trivial, I did it for the other components before.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2904 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Add support for the Fujitsu MBM29F400TC flash part.
Detection and reading works, writing is not tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
southbridge now:
From: Morgan Tsai <my_tsai@sis.com>
It supports SiS761GX / SiS966 chipset, only for AMD K8 platform so far.
Due to integrated VGA sharing system memory, some code in southbridge
folder have to init northbridge.
Copyright (C) 2007 Morgan Tsai <my_tsai@sis.com>
Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
Change Log:
Newly support GIGABYTE GA-2761GXDK
CPU type: AMD AM2 socket
Northbridge: SiS 761GX
Southbridge: SiS 966
SuperIO: ITE8716F
Signed-off-by: Morgan Tsai <my_tsai@sis.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2902 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
This is generic PCI stuff, not nothbridge-specific in any way.
The respective #defines are already present in src/include/device/pci_def.h.
Abuild-tested, so shouldn't break anything.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Ethernet yet. The fixes are a board-specific fake spd_read_byte, cleaning up
comments, and just in general customizing for the 1c.
The lxraminit
change fixes a bug (&& used instead of ||), adds some debug prints which were
VERY useful debugging the alix1c, changes fatal error messages from print_debug
to print_emerg, and adds two functions:
banner, which just prints out a string with a banner, and
hcf, which print an emergency message and then pushes null bytes
into the uart forever, just to make sure that no bytes get lost
for any reason.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2899 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
This board uses nearly the same devices as the BCOM Winnet100, so most of
the new code here is from the BCOM Winnet100. They differ in the IRQ routing
table only.
BTW: The AXUS board uses standard DIMM memory and can be run at 100MHz SDRAM
clock speed (it runs reliably here since month).
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Looking through the sources of Uniflash utility I found that this chip
is no more no less than low-voltage variant of Am29F040B but with
different ID.
So I created a very quick patch (attached).
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
- Add missing entry for the NIC:
device pci 0f.0 on end # Ethernet (onboard)
- Drop the following lines:
register "com1" = "{115200}"
register "com2" = "{38400}"
Those entries hardcode the BAUD rate (as far as I can tell, please
correct me if I'm wrong). We don't want that -- instead the config option
TTYS0_BAUD in Options.lb should be used(?) I verified that dropping those
lines will not break serial output (COM1, 115200, 8n1).
- Enable IDE (PCI device 00:12.2) and add the following register lines
to tell the CS5530 code to actually enable IDE channel 0:
register "ide0_enable" = "1"
register "ide1_enable" = "0" # Not available/needed on this board
Tested with a 2.5" hard drive and FILO, works fine.
- Enable USB (PCI device 00:13.0), not sure why it was commented.
- Enable COM2 as it's used by the smartcard reader.
- Add CONFIG_COMPRESSED_PAYLOAD_LZMA to Options.lb, in order to fix
abuild for this board.
- Add some more comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
(trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
making the output of "make -s" finally usable.. (still trivial, doesn't
change any logic or remove any code)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
make them const before putting them into the read-only segment...
(trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
rodata.pci_driver" warnings are coming from? We were packing those
structures into a read-only segment, but forgot to mark them const.
Despite its size, this is a fairly trivial patch created by a simple
search/replace
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2888 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
assumes a 1MB rom chip.
Hence the default position for the VGA bios should also assume a 1MB rom chip,
not a 512KB chip.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
them yet.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
since it is still our most wide-spread codebase.
The patch is pretty trivial, and nobody except Torsten even looked at
it in a week, so....
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
serious issue, so I am self-acking.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
days on a function named pll_reset that, on exit, says "Done
cpuRegInit", and which, in turn, made me think it was a lot farther
along that it was.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2878 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
status register instead.
This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a
MX25L4005 chip.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
chip the code was tested and verified with is the Macronix MX25L4005,
but other chips should work as well.
Timeouts are still hardcoded to data sheet maxima, but the status
register checking code is already there.
Thanks to Harald Gutmann for the initial code on which this is loosely
based.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
the --dump option, it just means lots of additional work for no gain, IMO.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
We often want to know the exact version number of superiotool which
was used to gather a certain output/dump.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
case of keyboard failure (the keyboard initialization was never hit).
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Ed Swierk in
http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html .
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
This has not been working at all until now. With this fix, keyboard,
mouse, parallel port, and the Super I/O sensors work fine (tested
on actual hardware).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
- Install binary in /usr/sbin (not /usr/bin), as it's a root-only tool.
- Rename manpage from flashrom.1 to flashrom.8, as section 8 contains
"System administration commands (usually only for root)".
- Actually install the manpage upon 'make install'.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Advantech PCM-5820 board (confirmed by Erwan Velu <erwan@seanodes.com>
on IRC). Trivial (and tested) patch.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Michael van der Kolff <mvanderkolff@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
applying abstraction and wrapping.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
has a slightly different format than that of the W83697UF/UG so we have
to hack around it a bit.
This patch has been verified to work on real hardware by
Idwer Vollering <idwer_v@hotmail.com> on IRC (thanks!).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
replacing it with a minimal, but working, framework which will be expanded.
Drop a bunch of useless and duplicated files, add missing license headers.
I'm self-acking it this time, the diff is a huge unreadable mess and the old
code is broken anyway...
This code is tested to build fine, and can boot a Linux kernel up to a
login-prompt via FILO (IDE). This is verified on actual hardware.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Move SPI code out of board_enable.c where it started its life. The SPI
chip finding and SPI chip accessor code is moved as well. This can be
split later if we feel like it.
The non-use of svn cp is intentional because the only history we'd have
to preserve are a few commits which were early prototypes of chip
identification code. For those who intend to look at that history, they
can look at board_enable.c revision 2853.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
chip finding and SPI chip accessor code is moved as well. This can be
split later if we feel like it.
The non-use of svn cp is intentional because the only history we'd have
to preserve are a few commits which were early prototypes of chip
identification code. For those who intend to look at that history, they
can look at board_enable.c revision 2853.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
of the Winbond chips from being detected (trivial fix).
This is verified on real hardware and works fine now.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Without this bugfix, the resource for the PCI/ISA video memory at
0xa0000 - 0xbffff is too big, i.e. it goes up to 0xcffff instead of
just 0xbffff as it should.
Here's the diff from two runs of the tool from
http://www.linuxbios.org/pipermail/linuxbios/2007-June/022449.html
on the MSI MS-7260 (K9N Neo), with and without the bugfix. After applying,
the resource size is correct again.
--- dumpres_lb_pci_vgacard_without_resfix.txt
+++ dumpres_lb_pci_vgacard_with_resfix.txt
@@ -11,7 +11,7 @@
MMIO map: #2 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0
MMIO map: #3 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0
MMIO map: #4 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0
-MMIO map: #5 0x00000a0000 - 0x00000cffff Access: R/W Dstnode:0 DstLink 0
+MMIO map: #5 0x00000a0000 - 0x00000bffff Access: R/W Dstnode:0 DstLink 0
MMIO map: #6 0x00fc000000 - 0x00fd1fffff Access: R/W Dstnode:0 DstLink 0
MMIO map: #7 0x00fd200000 - 0x00fd1fffff Access: R/W Dstnode:0 DstLink 0
MMIO map: #0 0x000000 - 0x003fff Access: R/W ISA VGA Dstnode:0 DstLink 0
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2853 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Ulf Jordan <jordan@chalmers.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2852 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
day :-)
Also minor changes to remove tab-space combinations where possible.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Index: jedec.c
===================================================================
--- jedec.c (revision 2847)
+++ jedec.c (working copy)
@@ -281,7 +281,7 @@
// dumb check if erase was successful.
for (i = 0; i < total_size; i++) {
if (bios[i] != (uint8_t) 0xff) {
- printf("ERASE FAILED\n");
+ printf("ERASE FAILED @%d, val %02x\n", i, bios[i]);
return -1;
}
}
Index: board_enable.c
===================================================================
--- board_enable.c (revision 2847)
+++ board_enable.c (working copy)
@@ -153,7 +153,8 @@
return 1;
}
/* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note:
- We can't use writecnt directly, but have to use a strange encoding */
+ * We can't use writecnt directly, but have to use a strange encoding
+ */
outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port);
do {
busy = inb(port) & 0x80;
@@ -202,43 +203,39 @@
/*
* Helper functions for many Winbond Super I/Os of the W836xx range.
*/
-#define W836_INDEX 0x2E
-#define W836_DATA 0x2F
-
/* Enter extended functions */
-static void w836xx_ext_enter(void)
+static void w836xx_ext_enter(uint16_t port)
{
- outb(0x87, W836_INDEX);
- outb(0x87, W836_INDEX);
+ outb(0x87, port);
+ outb(0x87, port);
}
/* Leave extended functions */
-static void w836xx_ext_leave(void)
+static void w836xx_ext_leave(uint16_t port)
{
- outb(0xAA, W836_INDEX);
+ outb(0xAA, port);
}
/* General functions for reading/writing Winbond Super I/Os. */
-static unsigned char wbsio_read(unsigned char index)
+static unsigned char wbsio_read(uint16_t index, uint8_t reg)
{
- outb(index, W836_INDEX);
- return inb(W836_DATA);
+ outb(reg, index);
+ return inb(index+1);
}
-static void wbsio_write(unsigned char index, unsigned char data)
+static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data)
{
- outb(index, W836_INDEX);
- outb(data, W836_DATA);
+ outb(reg, index);
+ outb(data, index+1);
}
-static void wbsio_mask(unsigned char index, unsigned char data,
- unsigned char mask)
+static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask)
{
- unsigned char tmp;
+ uint8_t tmp;
- outb(index, W836_INDEX);
- tmp = inb(W836_DATA) & ~mask;
- outb(tmp | (data & mask), W836_DATA);
+ outb(reg, index);
+ tmp = inb(index+1) & ~mask;
+ outb(tmp | (data & mask), index+1);
}
/**
@@ -248,37 +245,80 @@
* - Agami Aruma
* - IWILL DK8-HTX
*/
-static int w83627hf_gpio24_raise(const char *name)
+static int w83627hf_gpio24_raise(uint16_t index, const char *name)
{
- w836xx_ext_enter();
+ w836xx_ext_enter(index);
/* Is this the w83627hf? */
- if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */
+ if (wbsio_read(index, 0x20) != 0x52) { /* Super I/O device ID register */
fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n",
- name, wbsio_read(0x20));
- w836xx_ext_leave();
+ name, wbsio_read(index, 0x20));
+ w836xx_ext_leave(index);
return -1;
}
/* PIN89S: WDTO/GP24 multiplex -> GPIO24 */
- wbsio_mask(0x2B, 0x10, 0x10);
+ wbsio_mask(index, 0x2B, 0x10, 0x10);
- wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2 */
+ wbsio_write(index, 0x07, 0x08); /* Select logical device 8: GPIO port 2 */
- wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */
+ wbsio_mask(index, 0x30, 0x01, 0x01); /* Activate logical device. */
- wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */
+ wbsio_mask(index, 0xF0, 0x00, 0x10); /* GPIO24 -> output */
- wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */
+ wbsio_mask(index, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */
- wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */
+ wbsio_mask(index, 0xF1, 0x10, 0x10); /* Raise GPIO24 */
- w836xx_ext_leave();
+ w836xx_ext_leave(index);
return 0;
}
+static int w83627hf_gpio24_raise_2e(const char *name)
+{
+ return w83627hf_gpio24_raise(0x2d, name);
+}
+
/**
+ * Winbond W83627THF: GPIO 4, bit 4
+ *
+ * Suited for:
+ * - MSI K8N-NEO3
+ */
+static int w83627thf_gpio4_4_raise(uint16_t index, const char *name)
+{
+ w836xx_ext_enter(index);
+ /* Is this the w83627thf? */
+ if (wbsio_read(index, 0x20) != 0x82) { /* Super I/O device ID register */
+ fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n",
+ name, wbsio_read(index, 0x20));
+ w836xx_ext_leave(index);
+ return -1;
+ }
+
+ /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */
+
+ wbsio_write(index, 0x07, 0x09); /* Select logical device 9: GPIO port 4 */
+
+ wbsio_mask(index, 0x30, 0x02, 0x02); /* Activate logical device. */
+
+ wbsio_mask(index, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */
+
+ wbsio_mask(index, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */
+
+ wbsio_mask(index, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */
+
+ w836xx_ext_leave(index);
+
+ return 0;
+}
+
+static int w83627thf_gpio4_4_raise_4e(const char *name)
+{
+ return w83627thf_gpio4_4_raise(0x4E, name);
+}
+/**
* Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs.
*
* We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there.
@@ -335,12 +375,12 @@
pci_write_byte(dev, 0x59, val);
/* Raise ROM MEMW# line on Winbond w83697 SuperIO */
- w836xx_ext_enter();
+ w836xx_ext_enter(0x2E);
- if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */
- wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */
+ if (!(wbsio_read(0x2E, 0x24) & 0x02)) /* flash rom enabled? */
+ wbsio_mask(0x2E, 0x24, 0x08, 0x08); /* enable MEMW# */
- w836xx_ext_leave();
+ w836xx_ext_leave(0x2E);
return 0;
}
@@ -487,9 +527,11 @@
{0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
"gigabyte", "m57sli", "GIGABYTE GA-M57SLI", it87xx_probe_serial_flash},
{0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise},
+ "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e},
+ {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e},
{0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000,
- "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise},
+ "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e},
{0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01,
NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m},
{0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118,
@@ -509,8 +551,8 @@
* Match boards on LinuxBIOS table gathered vendor and part name.
* Require main PCI IDs to match too as extra safety.
*/
-static struct board_pciid_enable *board_match_linuxbios_name(char *vendor,
- char *part)
+static struct board_pciid_enable *board_match_linuxbios_name(char *vendor,
+ char *part)
{
struct board_pciid_enable *board = board_pciid_enables;
@@ -525,10 +567,11 @@
continue;
if (board->second_vendor &&
- !pci_dev_find(board->second_vendor, board->second_device))
+ !pci_dev_find(board->second_vendor, board->second_device))
continue;
return board;
}
+ printf("NOT FOUND %s:%s\n", vendor, part);
return NULL;
}
@@ -545,20 +588,20 @@
continue;
if (!pci_card_find(board->first_vendor, board->first_device,
- board->first_card_vendor,
- board->first_card_device))
+ board->first_card_vendor,
+ board->first_card_device))
continue;
if (board->second_vendor) {
if (board->second_card_vendor) {
if (!pci_card_find(board->second_vendor,
- board->second_device,
- board->second_card_vendor,
- board->second_card_device))
+ board->second_device,
+ board->second_card_vendor,
+ board->second_card_device))
continue;
} else {
if (!pci_dev_find(board->second_vendor,
- board->second_device))
+ board->second_device))
continue;
}
}
@@ -582,7 +625,7 @@
if (board) {
printf("Found board \"%s\": Enabling flash write... ",
- board->name);
+ board->name);
ret = board->enable(board->name);
if (ret)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
use that feature in order to not waste RAM.
Also, add missing CONFIG_VIDEO_MB for the eaglelion/5bcm, which should
fix the build for that board.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
currently don't have it but need it to compile with the new Geode GX1
VGA support. This sets the size at 4MB, which was the size previously
defined in the VGA code.
Signed-off-by: Corey Osgood <corey.osgod@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
See http://www.linuxbios.org/BCOM_WINNET100_Build_Tutorial for hardware
description and build tutorials.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
went wrong in one of the recent commits.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
This makes sense on systems with small memories when the VGA feature is
not used (CONFIG_VIDEO_MB = 0 in this case).
On Geode GX1 based systems the following amount of memory should be reserved
when VGA support is enabled:
- 1MiB for VGA and SVGA resolutions
- 2MiB for XGA resolution
- 4MiB for SXGA resolution
Signed-off-by: Juergen Beisert <juergen127@kreuzholzen.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2840 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
while I'm at it (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Also, dump support for the NSC PC87351.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2837 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Painting the splash graphic is now ifdef'ed.
Signed-off-by: Juergen Beisert <juergen127@kreuzholzen.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2836 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
about where to send additional register dumps.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2834 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2832 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Rasmus Wiman <rasmus@wiman.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
to set up one of five screen resolutions (sorry no autodetection at runtime,
resolution is selected at buildtime) and displays a graphic in the right
bottom corner (splash screen).
Signed-off-by: Juergen Beisert <juergen127@kreuzholzen.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2827 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2826 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
be detected, as it needs a non-standard init sequence.
Minor other fix: Drop incorrect 0x2b from LDN 5 of the ITE IT8705F.
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2825 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Add notes which IDs were taken from sensors-detect (as where we lack
datasheets, thus cannot verify them) and which we support but sensors-detect
does not (yet). I'll post patches on the lm-sensors list to sync up
the detected chips between superiotool and sensors-detect.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
* Improve the --verbose output a bit more. Print the "Probing..." text for
all Super I/Os and if a Super I/O is not known, show the data we were
able to read from the chip (what data this is is very vendor/chip specific).
* Thus the common no_superio_found() is dropped, it's not useful.
The "read from 0x20" part was wrong for all Super I/Os other than the
NSC ones anyway.
* Winbond: For the 'olddevid' only use bits 3..0, mask away the others.
* SMSC: Print which ID registers we try to read (in --verbose mode).
* Minor cosmetic fixes.
* Rename PC8374 to PC8374L (as per datasheet).
* Rename probe_idregs_simple() to probe_idregs_nsc().
* Rename dump_readable_ns8374() to dump_readable_pc8374l().
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
