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2003-09-27ok that's it. I think this might work.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1157 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-27a few tweaks etc.Ronald G. Minnich
Still probably wrong. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1156 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26it's getting through the 8601 but the values are still not right.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1155 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26something is wrong here but not sure what.Ronald G. Minnich
But nothing is getting set into the north bridge. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26via epia is putting out bytes!Ronald G. Minnich
ron git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26serial supprt.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26just to get us back where we were.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26It builds!Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26add cpufixup.oRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26cpu fixup for p6Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1148 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26remove fixed ROM_SIZE setting, add default to 256kStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26keyboard supportRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1146 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26added CONFIG_KEYBOARD, default 0Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1145 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26fix 'deprecated' warningsRonald G. Minnich
more via fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26fix buildrom statement if there's only one romimage specified.Stefan Reinauer
roms always needs to be an array. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26ignore target temp build dirStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26add cvsignore files for target files. Use gcc -m32 to build on AMD64Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26ignore temp. build directoryStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1140 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26get rid of pointer/int cast warnings on 64bit.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26via epia; also yh lu tyan.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25allow default settings in the mainboard fileRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25new from yh luRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25new from tyanRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25no default rom sizeRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25ROM_SIZE has no default now.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1133 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25added via vt8231Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25first cut at 8601 supportRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25add another compat chain keepalife fixStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25khepri resource map update to keep compatibility chainStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1129 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25remove last occurence of AMD8111_DEVStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-23new target configuration: newisys khepriStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1125 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-23update hypertransport setup for khepriStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-23fix hypertransport setup for quartet.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-23make coherent ht setup capable of non-standard link configurationsStefan Reinauer
(i.e. with CPU1 not connected to ACROSS link of CPU0) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1122 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-18first shot of legacybios emulation.Stefan Reinauer
does not work yet.. sorry :-( git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-17fix romcc compiling 32bit code on amd64Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-17add filename to buildromStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-17add filename to buildrom commandStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-12add cvsignore fileStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-12add "clean" targetStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-11update Config.lb and add khepri ht chainStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-11add quartet and dspace targets, disable reboot in Solo target.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-11add new target for DSPACE DS1006 card, make quartet auto.c all verboseStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1109 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-09remove old config files, adopt to new config method. fix resource map (?)Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-08automatically build config.py if it's not there.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-08add solo target config file for new config methodStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-08update SOLO code (untested but compiling and pretty much complete!?!)Stefan Reinauer
drop old configuration method. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-04- Include hypertransport.h in hypertransport.cEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-04- Remove dead argument to hypertransport_scan_chainEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-03moved init_timer() to static initializationGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-03cosmeticsStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-02- 1.1.4Eric Biederman
Major restructuring of hypertransport handling. Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically Updates to hard_reset handling when resetting because of the need to change hypertransport link speeds and widths. (a) No longer assume the boot is good just because we get to a hard reset point. (b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the boot counter. Updates to arima/hdama mptable so it tracks the new bus numbers git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-02- Major update of the dynamic device tree so it can handleEric Biederman
* subtractive resources * merging with the static device tree * more device types than just pci - The piece to watch out for is the new enable_resources method that was needed in all of the drivers git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-01- Update the version number to 1.1.2 and update the NEWS fileEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-01- Add back in the hard reset code from the freebios1 tree.Eric Biederman
This allows generic code to reset the box. - Update the hypertransport code to automatically calculate link widths and freequencies, and to call hard_reset if neecessary for the changes to go into effect. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-01- Updates to config.g so that it works more reliably and has initial supportEric Biederman
for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc - Updates to config.g so that it works more reliably and has initial support for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc killed src/sdram/generic_dump_spd.inc killed src/sdram/generic_dump_spd.inc - Updated the arima/hdama to build with the new configuration system - Updated config.g to list all of the variables with make echo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-29more targetsRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-29new targetsRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-28add first bunch of newisys khepri files.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-28more motherboard specific cleanupsStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-28cleaning out motherboard specific changes from the generic directories.Stefan Reinauer
Moving tyan resource map to tyan directory. Making IOMMU for hammer choosable via ENABLE_IOMMU git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-27support for new mobos and fixesRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-26fixed irq tables for hdamaRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-07more quartet fixesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1085 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-07fix resource map for quartetStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1084 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-07fix quartet buildStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-06I mean it this time. NO more unnecessary 'dir' commands for cpus.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-06end silly multiple sources of /cpu/whatever.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1081 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-06add XIP_ROM_[BASE|SIZE] to newconfig for quicker bootupStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05turn down the spew level to 7Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05fixup. SMP works fine.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05Fixed version skew problem.Greg Watson
Use warning() and fatal(). git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05missing file chip.hRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05now needed.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05- Update the Makefile to have a proper ALL: targetEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04patches from Yh Lu. Tested and working on HDAMARonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04Commits for the new config static device design, to allow more than one staticRonald G. Minnich
cpu of a certain type and to eliminate the cpu p5 cpu p6 cpu k7 nonsense in the old config files. Next step is to hook into Eric's pci device stuff. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04- Fix poor resource allocation estimate.Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1066 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-01- Remove useless definitionsEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-01- Update cpufixup so we support more than 4GB of memoryEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-01- Update raminit.c so it works properly for multiple cpusEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1062 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-31fix for newconfigRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-30make solo target build againStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1060 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-30updates from YhLu, plus fixes for PPC/K8 issues.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28Added support for naming instances of parts. This is to allow arbitraryGreg Watson
device arrangement that can be statically configured during boot. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28adjust optionsGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28PPC 4XX supportGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28use longsGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28PVR supportGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28added new routinesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28deal with different reset vector addressesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28made timer more genericGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28added ppc_ to function namesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28CPU_OPT for cpu specific flagsGreg Watson
_RESET to specify reset vector address (ppc4xx reset vector is at end of memory, rather than at beginning of ROM) CONFIG_SYS_CLK_FREQ to specify frequency of system clock (needed for ppc4xx clock speed calculation) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28corrected cpu path, added clock.oGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28cpus have vendors nowGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28moved extern to chip.hGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1046 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28Fix for RAMBASE.Ronald G. Minnich
remove unused make.base.lb git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1045 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25change it so linuxbios.rom is the final target.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1044 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25Fix for ROM_SIZE to ROM_SECTION_SIZERonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-26 23:35:07 +0000