Age | Commit message (Expand) | Author |
2020-06-14 | soc/intel/xeon_sp/cpx: add cpu entries in ssdt | Jonathan Zhang |
2020-06-14 | soc/intel/xeon_sp/cpx: fix MADT ACPI table | Jonathan Zhang |
2020-06-14 | soc/intel/xeon_sp/cpx: add IIO stack resources to DSDT | Jonathan Zhang |
2020-06-14 | soc/intel/xeon_sp/cpx: add NUMA ACPI tables | Jonathan Zhang |
2020-06-14 | util/board_status: Also check remotely retrieved coreboot console log | Paul Menzel |
2020-06-14 | mb/google/hatch/vr/puff: Set up PL2 and PsysPL2 | Tim Chen |
2020-06-14 | mb/google/fizz: add variant chipset display init | Jeff Chase |
2020-06-14 | util/intelmetool: Add support for Intel Cannon Point LP HECI Controller | Matt DeVillier |
2020-06-14 | mb/google/dedede: Enable early EC software sync | Meera Ravindranath |
2020-06-14 | mb/google/dedede: Select Recovery Cache Kconfig option | Meera Ravindranath |
2020-06-14 | sb/intel/i82801ix: Fix SPDX license header | Kyösti Mälkki |
2020-06-14 | mb/google/hatch: Switch USB2 port1 and port3 on Noibat | Edward O'Callaghan |
2020-06-14 | soc/amd/picasso/acpi: Add a wrapper method WAL1 for calling ALIB function 1 | Furquan Shaikh |
2020-06-14 | ec/google/chromeec: Call \PNOT () on initializing AC power state | Furquan Shaikh |
2020-06-13 | cpu/intel/car: Use symbols for CAR MTRR setup | Kyösti Mälkki |
2020-06-13 | arch/x86: Add symbols for CAR MTRRs in linker script | Kyösti Mälkki |
2020-06-13 | soc/intel/common: Introduce ASL2.0 syntax | Alexey Buyanov |
2020-06-13 | arch/x86: Include id.ld unconditionally in memlayout.ld | Furquan Shaikh |
2020-06-13 | arch/x86: Drop early_ram.ld | Furquan Shaikh |
2020-06-13 | soc/amd/picasso: Place early stages and data buffers at the bottom of DRAM | Furquan Shaikh |
2020-06-13 | util/cbfstool: Drop IS_TOP_ALIGNED_ADDRESS() check in cbfstool_convert_fsp | Furquan Shaikh |
2020-06-13 | cbmem_id: Add CBMEM ID for early DRAM usage | Furquan Shaikh |
2020-06-13 | soc/amd/picasso: Add custom memlayout.ld file | Furquan Shaikh |
2020-06-13 | treewide: Add Kconfig variable MEMLAYOUT_LD_FILE | Furquan Shaikh |
2020-06-13 | mb/google/zork: update DRAM SPD table for vilboz | Paul Ma |
2020-06-12 | mb/google/volteer/var/voxel: Add memory parts and generate DRAM IDs | Furquan Shaikh |
2020-06-12 | tests: Add some basic warnings and fix resulting issues | Julius Werner |
2020-06-12 | vendorcode/intel/fsp: Update Tiger Lake FSP Headers for v3197 | Srinidhi N Kaushik |
2020-06-12 | mb/google/volteer: Customize PCH VR settings for better Sx power savings | Venkata Krishna Nimmagadda |
2020-06-12 | soc/intel/tigerlake: Add devicetree support to change PCH VR settings | Venkata Krishna Nimmagadda |
2020-06-12 | mb/google/dedede: Add new variant boten | Peichao Wang |
2020-06-12 | nb/intel/i945/rcven.c: Correct comment | Angel Pons |
2020-06-12 | nb/intel/i945: Clean up raminit coding style | Angel Pons |
2020-06-12 | mb/google/hatch: Remove unused USB2 port from Noibat | Edward O'Callaghan |
2020-06-12 | soc/amd/picasso: Reconfigure SPI speeds after FSP-S has run | Furquan Shaikh |
2020-06-12 | sb/intel/i82801ix: Use PCI bitwise ops | Angel Pons |
2020-06-12 | mb/google/puff: Update i2c[2] and i2c[3] rise and fall times | Sam McNally |
2020-06-12 | sb/intel/i82801jx: Use PCI bitwise ops | Angel Pons |
2020-06-11 | soc/amd/picasso/uart: fix possible out of bounds access | Felix Held |
2020-06-11 | vc/amd/fsp/platform_descriptors: drop prefix from PCIe/DDI structs | Felix Held |
2020-06-11 | mb/google/dedede: Add new variant drawcia | Wisley Chen |
2020-06-11 | mb/google/volteer: Update DPTF TSR2 sensor ID for volteer | Deepika Punyamurtula |
2020-06-10 | Revert "util/abuild: Have abuild generate the .xcompile if it doesn't exist" | Nico Huber |
2020-06-10 | util/abuild: Ensure .xcompile exists | Nico Huber |
2020-06-10 | amd/picasso: Load x86 microcode from CBFS modules | Zheng Bao |
2020-06-10 | device/xhci: Add xHCI utility to enumerate capabilities | Raul E Rangel |
2020-06-10 | mb/google/hatch: drop VBOOT_LID_SWITCH from hatch baseboard | Matt DeVillier |
2020-06-10 | soc/intel/common: Replace cse_bp and ME with cse_lite in all console logs | Sridhar Siricilla |
2020-06-10 | mb/google/dedede/variants/waddledoo: Adjust I2Cs CLK to meet spec | John Su |
2020-06-10 | nb/intel/i945: Use PCI bitwise ops | Angel Pons |
2020-06-10 | sb/intel/bd82x6x: Use PCI bitwise ops | Angel Pons |
2020-06-10 | sb/intel/bd82x6x/pcie.c: Move `pch_pcie_acpi_name` up | Angel Pons |
2020-06-10 | soc/amd/picasso: Enable APOB/MRC training data cache | Furquan Shaikh |
2020-06-10 | drivers/intel/fsp2_0: Allow SoC/mainboard to update NvsBufferPtr | Furquan Shaikh |
2020-06-10 | mb/google/zork: Set FMDFILE for zork family | Furquan Shaikh |
2020-06-10 | Documentation: Add section about SPD tools for TGL and JSL | Furquan Shaikh |
2020-06-10 | soc/intel/cannonlake: Put braces around *else* branch | Paul Menzel |
2020-06-10 | soc/intel/skylake: Remove space after type cast | Paul Menzel |
2020-06-10 | soc/intel/skylake: Use unit macros KiB and MiB | Paul Menzel |
2020-06-10 | arch/x86: Remove some x86_32 vs x86_64 noise | Kyösti Mälkki |
2020-06-10 | binaryPI: Replace CONFIG(ARCH_xx) test | Kyösti Mälkki |
2020-06-10 | lib/program.ld: Replace CONFIG(ARCH_xx) tests | Kyösti Mälkki |
2020-06-10 | mb/google/dedede: Enable S0ix support | Aamir Bohra |
2020-06-10 | mb/google/dedede: Add mainboard acpi support for GPIO PM configuration | Aamir Bohra |
2020-06-10 | templates: remove Dedede and Volteer Makefile.inc | Paul Fagerburg |
2020-06-10 | soc/intel/tigerlake: Add Hot-Plug and PME event handlers for Thunderbolt | John Zhao |
2020-06-10 | soc/amd/picasso: initialize ACP device at init() time | Aaron Durbin |
2020-06-10 | ACPI: Remove Kconfig COMMON_FADT | Kyösti Mälkki |
2020-06-10 | mb/intel/cannonlake_rvp,coffeelake_rvp: Add MAINBOARD_HAS_LPC_TPM | Kyösti Mälkki |
2020-06-10 | crossgcc: Backport GNAT exception handler v1 patch | Iru Cai |
2020-06-10 | amd/00730F01: Clean the Microcode updating | Zheng Bao |
2020-06-10 | nb/intel/x4x: Drop unused `pci_ops.h` include | Angel Pons |
2020-06-10 | nb/intel/pineview: Use PCI bitwise ops | Angel Pons |
2020-06-10 | amd/common: Add the macro definition for patch level MSR | Zheng Bao |
2020-06-10 | sb,soc/amd, ACPI: Do not override FADT preferred_pm_profile | Kyösti Mälkki |
2020-06-10 | sb/amd/agesa,cimx,pi: Select COMMON_FADT | Kyösti Mälkki |
2020-06-10 | soc/amd/stoneyridge,picasso: Select COMMON_FADT | Kyösti Mälkki |
2020-06-10 | mb,sb/amd/cimx/sb800: Remove FADT_PM_PROFILE | Kyösti Mälkki |
2020-06-10 | sb,soc/amd: Remove FADT_PM_PROFILE | Kyösti Mälkki |
2020-06-10 | sb/intel, ACPI: Do not override FADT preferred_pm_profile | Kyösti Mälkki |
2020-06-10 | sb/intel/i82801ix: Select COMMON_FADT | Kyösti Mälkki |
2020-06-10 | sb/intel/i82371eb: Select COMMON_FADT | Kyösti Mälkki |
2020-06-10 | aopen/dxplplusu,intel/i82801dx: Select COMMON_FADT | Kyösti Mälkki |
2020-06-09 | soc/amd/picasso/acpi/sb_fch: use local variable in _CRS methods | Felix Held |
2020-06-09 | mb/google/volteer: move volteer-specific GPIOs to variant gpio.c | Nick Vaccaro |
2020-06-09 | soc/intel/tigerlake: Set FSPS UPD ITbtConnectTopologyTimeoutInMs | John Zhao |
2020-06-09 | vendorcode/intel/fsp: Update Tiger Lake FSP Headers for v3197 | Srinidhi N Kaushik |
2020-06-09 | ACPI: Move redundant FADT reserved entry | Kyösti Mälkki |
2020-06-09 | nb/intel/x4x: Use PCI bitwise ops | Angel Pons |
2020-06-09 | nb/intel/haswell: Use PCI bitwise ops | Angel Pons |
2020-06-09 | soc/intel/tigerlake: Increase heap size | Duncan Laurie |
2020-06-09 | mb/google/hatch/vr/puff: Set up PL2 and PsysPL2 | Gaggery Tsai |
2020-06-09 | SMBIOS: Remove Kconfig SYSTEM_ENCLOSURE_TYPE | Kyösti Mälkki |
2020-06-09 | mb/scaleway/tagada: Move override of SMBIOS_ENCLOSURE_TYPE | Kyösti Mälkki |
2020-06-09 | Revert "sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register" | Nico Huber |
2020-06-09 | mb/google/poppy: Add retail names | Angel Pons |
2020-06-09 | MAINTAINERS: Add myself as some northbridges' maintainer | Angel Pons |
2020-06-09 | MAINTAINERS: Add myself to x4x and pineview northbridges | Angel Pons |
2020-06-09 | MAINTAINERS: Add myself as some mainboards' maintainer | Angel Pons |
2020-06-09 | nb/intel/sandybridge: Use MCHBAR bitwise ops | Angel Pons |