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2014-01-29cbfstool/lzma: Remove C++ remnantsAlexandru Gagniuc
The original lzma code was probably designed as a library, and had tons of checks for __cplusplus and extern "C". They were not removed when imported, but remove them now. Change-Id: I4ae6e7739d191093c57130de8ae40da835e81bd1 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4835 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-29cbfstool/lzma: Use stdint and stdbool typesAlexandru Gagniuc
This is the first patch on a long road to refactor and fix the lzma code in cbfstool. I want to submit it in small atomic patches, so that any potential errors are easy to spot before it's too late. Change-Id: Ib557f8c83f49f18488639f38bf98d3ce849e61af Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4834 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-29cbfs: fix issues with word size and endianness.Ronald G. Minnich
Add XDR functions and use them to convert the ELF headers to native headers, using the Elf64 structs to ensure we accomodate all word sizes. Also, use these XDR functions for output. This may seem overly complex but it turned out to be much the easiest way to do this. Note that the basic elf parsing function in cbfs-mkstage.c now works over all ELF files, for all architectures, endian, and word size combinations. At the same time, the basic elf parsing in cbfs-mkstage.c is a loop that has no architecture-specific conditionals. Add -g to the LDFLAGS while we're here. It's on the CFLAGS so there is no harm done. This code has been tested on all chromebooks that use coreboot to date. I added most of the extra checks from ChromeOS and they triggered a lot of warnings, hence the other changes. I had to take -Wshadow back out due to the many errors it triggers in LZMA. BUG=None TEST=Build and boot for Peppy; works fine. Build and boot for nyan, works fine. Build for qemu targets and armv8 targets. BRANCH=None Change-Id: I5a4cee9854799189115ac701e22efc406a8d902f Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://chromium-review.googlesource.com/178606 Reviewed-by: Ronald Minnich <rminnich@chromium.org> Commit-Queue: Ronald Minnich <rminnich@chromium.org> Tested-by: Ronald Minnich <rminnich@chromium.org> Reviewed-on: http://review.coreboot.org/4817 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-28libpayload: adjust max number of memrangesAaron Durbin
Rambi currently has more than 16 memory ranges. Because of this libpayload is silently dropping them and the full amount of memory is not being properly wiped. Correct this by bumping the number of ranges to 32. BUG=None BRANCH=None TEST=Built and booted rambi. Noted that the full amount of memory was being properly wiped. Change-Id: Ida456decf2498cb1547c0ceef23df446a975606b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175792 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/4942 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2014-01-28x86: add common definitions for control registersAaron Durbin
The access to control registers were scattered about. Provide a single header file to provide the correct access function and definitions. BUG=chrome-os-partner:22991 BRANCH=None TEST=Built and booted using this infrastructure. Also objdump'd the assembly to ensure consistency (objdump -d -r -S | grep xmm). Change-Id: Iff7a043e4e5ba930a6a77f968f1fcc14784214e9 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172641 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/4873 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-28rmodule: consolidate rmodule stage loadingAaron Durbin
There are 3 places rmodule stages are loaded in the existing code: cbfs and 2 in vboot_wrapper. Much of the code is the same except for a few different cbmem entry ids. Instead provide a common implementation in the rmodule library itself. A structure named rmod_stage_load is introduced to manage the inputs and outputs from the new API. BUG=chrome-os-partner:22866 BRANCH=None TEST=Built and booted successfully. Change-Id: I146055005557e04164e95de4aae8a2bde8713131 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174425 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/4897 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-28spi: Add support for Winbod W25Q64DWAaron Durbin
The W25Q64DW spi part is programatically equivalent to the other W25Q64 parts except it operates at 1.8V. Just add a new entry with the appropriate ID. BUG=chrome-os-partner:22292 BRANCH=None TEST=SPI controller can program the part. Change-Id: I65b0261223a9fefcb07477a43b6a3edb8228dd03 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170011 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/5077 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-28cbmem: add reference code idsAaron Durbin
In order to identify the ram used in cbmem for reference code blobs add common ids to be consumed by downstream users. BUG=chrome-os-partner:22866 BRANCH=None TEST=Built and booted with ref code support. Noted reference code entries in cbmem. Change-Id: Iae3f0c2c1ffdb2eb0e82a52ee459d25db44c1904 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174424 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/4896 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-01-28x86/mtrr: don't assume size of ROM cached during CAR modeAaron Durbin
Romstage and ramstage can use 2 different values for the amount of ROM to cache just under 4GiB in the address space. Don't assume a cpu's romstage caching policy for the ROM. Change-Id: I689fdf4d1f78e9556b0bc258e05c7b9bb99c48e1 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4846 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-01-28intel: fix microcode compilation failure in bootblockAaron Durbin
When not building with CONFIG_SSE there are not enough registers for ROMCC to use for spilling. The previous changes to this file had too many local variables that needed to be tracked -- thus causing romcc compilation issues. Change-Id: I3dd4b48be707f41ce273285e98ebd397c32a6a25 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4845 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-28bachmann/ot200: Fix cmos.layout.Vladimir Serbinenko
In current cmos.layout baud_rate overlaps with hardcoded reboot byte. Fix the layout and provide the default for upgrade. Change-Id: I979b8743c4aab6f17b3acf61b92a74a333203379 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4804 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2014-01-28chromeos: include stddef to fix compilation errorAaron Durbin
As some of the standard definitions were shuffled around chromeos started failing to build. Correct this. Change-Id: I9927441ccb2d646e8b3395e6e9f8e8166de74ab0 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4844 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-28x86: include header to define types in useAaron Durbin
The tsc header is using u32 w/o including the file with defines it. Change-Id: I9fcad882d25e93b4c0032b32abd2432b0169a068 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4843 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-27coreboot_table: don't add CMOS checksum twice.Vladimir Serbinenko
Checksum is already in cmos_layout.bin. No need to add it twice Change-Id: I6d12f35fd8ff12eee9a17365bbfab38845c09574 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4829 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-27siemens/sitemp-g1p1: Add missing boot_option option.Vladimir Serbinenko
Unlike other additions this doesn't require versionning first since the bootblock reads it anyway from this hardcoded offset. Change-Id: I3e3f65602bb1b92b91097692ee13e6948a748061 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4832 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-27sitemp-g1p1: Migrate to new cmos.default approachVladimir Serbinenko
Current code just prints warning, defaults match the behaviour of current code when checksum is incorrect and look sane. Change-Id: Icda0d3cb3517fc15e6a0ee787b00276d2d435776 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4827 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-27util/superiotool: Add initial support for Fintek F71869AD.Edward O'Callaghan
Change-Id: Ia2ce8214d8b419d0ca0186e6f6b2241097b0847b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/4802 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-27superio/fintek: Add initial support for Fintek F71869AD.Edward O'Callaghan
Change-Id: I41f1ee20517dd179a4dee914ab7f6332739e326e Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/4784 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-26google/stout: Provide cmos.defaultAlexandru Gagniuc
Change-Id: Ief0d08e0cd3dc469d700acf8567435894651171e Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4822 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-26google/butterfly: Provide cmos.defaultAlexandru Gagniuc
Change-Id: I0ec0d80f6c6682a0d3656a0c0743d166b1bc85c2 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4820 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-26lenovo/t60: Add CMOS defaults.Denis 'GNUtoo' Carikli
The code for handling the invalid CMOS space in mainboard.c is now useless and so it was removed. Change-Id: I86ec6a7f73e32948adff9087d4af5372a49a46a5 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3520 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-26pc80/keyboard: Ignore interface test failure.Vladimir Serbinenko
On Asus A8N-E this test fails but if failure is ignored keyboard works. Change-Id: Ifeeff2f41537b35bc90a679f956fea830b94292c Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4816 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-26asus/a8n-e: Implement basic ACPI.Vladimir Serbinenko
Change-Id: I3c8fa1fbec2175787666697f2239abb70020019e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4819 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-26asus/a8n-e: Add IRQ for onboard audio.Vladimir Serbinenko
Now onboard audio works. Change-Id: I1a598390c980287744689011b40210cec0145c6a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4818 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-26asus/a8n-e: Fix GPIO resources.Vladimir Serbinenko
Allocator can't currently handle both PnP and PCI resources together. Only 2 resources in PnP are not fixed. So fix them. Change-Id: Iad695d1d991d110b726ec429fff87c616af5ac8b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4815 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-26asus/a8n-e: supply cmos.defaultVladimir Serbinenko
Change-Id: Ib54cda60c9d8c57885c2b62f978222e01c1c3347 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4814 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-26src/cpu: Fix spelling of MTTR to MTRRPaul Menzel
Change-Id: Ia4718ac31a5b2bd12f8cda5e107aa878d74d2a03 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/4805 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-26Revert "Makefile: Check $CC variable returned from xcompile is not empty."Alexandru Gagniuc
This reverts commit 1287d1cc80c52ff2598f2bae235fc42d8456f44a. This commit has the side-effect of making abuild fail, and as such is reverted until a safe solution can be found. Change-Id: Ib8cb78468c2922322b490e0b52c0bd24f3de7ef9 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/3269 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-24nb/sandybridge: Move MRC cache above mrc.binAlexandru Gagniuc
This small change greatly reduces CBFS fragmentation. There is now a small gap of only 728 bytes between mrc.bin and mrc.cache, with the 64 KiB alignment maintained for mrc.cache -- assuming systemagent-r6 is used. The gap was just under 64 KiB before. With this change, it is easier to accommodate fallback and normal boot stages without having to manually place the stages in the highly fragmented CBFS. Change-Id: Ia2340c1928ed6e232949e053d1943c2f5737f741 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4763 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-01-24asrock/e350m1/board_info.txt: Specify ROM socket and Flashrom support.Vladimir Serbinenko
Based on info by Kevin O'Connor. Change-Id: I21d447fec976e0ee967ba64b0f506c97c22917a3 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4765 Tested-by: build bot (Jenkins) Reviewed-by: Kevin O'Connor <kevin@koconnor.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-24asus/a8n-e/board_info.txt: Set ROM Protocol.Vladimir Serbinenko
Change-Id: I65f2faee672d4d7dea50b67cf6426f503034b380 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4760 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-24cbfstool: correct size left calculation for "empty" entriesAaron Durbin
After removing a file sandwiched between two other files, that file could no longer be re-added at the same location. cbfstool tried to add the file, and a new "empty" entry, which, together, would no longer fit, so it continued checking for the next available space. Change the behavior to add the file if there is enough space for the file alone, then only add the "empty" entry if there is enough space for it. Change-Id: Iad3897dd28cf12f12ae877cfd83e1990fa7d2f0f Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4772 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-23intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH.Vladimir Serbinenko
Not used anymore since microcode was moved. Change-Id: Id666c80cb20e90e3664c4dcfcc0c41a4aeb4864c Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4788 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-23Makefile: Check $CC variable returned from xcompile is not empty.Andrew Wu
If xcompile can't find out suitable GCC compiler for i386/armv7, it will not set $CC_i386/$CC_armv7 variable. Makefile sets $CC variable from xcompile, and will print strange error messages when executing $CC program if $CC is empty. Add checking to avoid this problem. If $CC is empty, also delete invalid .xcompile file, so Make can recreate this file next time. Change-Id: Ia8d481d76ca52f3351cb99f05779d06947161c5d Signed-off-by: Andrew Wu <arw@dmp.com.tw> Reviewed-on: http://review.coreboot.org/3905 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23sandy/ivy SPI: Support hardware sequencing and use with multiple chipsVladimir Serbinenko
When 2 chips are present to get to the second one you have to use hardware sequencing. Also use it as the fallback if chip is unknown. Based on code in flashrom by Stefan Tauner and Carl-Daniel Hailfinger distributed under compatible license. Tested on Lenovo X230 which has EN25QH64 (8M) + N25Q032..3E (4M) Change-Id: I56f3cf0406b5f09fa327ed052c8e8b1df1d8a11f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4613 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23SPI: Add API for programmer-specific flashing.Vladimir Serbinenko
Change-Id: I7a2f5b9ae74458b5ed6271b1c27842c61546dcd2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4712 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23keyboard.c: fix coding style with indentAndrew Wu
Change-Id: Ie8efa9fb9bdc65bf8015eec197f44c432e87d907 Signed-off-by: Andrew Wu <arw@dmp.com.tw> Reviewed-on: http://review.coreboot.org/3986 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-23dmp/vortex86ex: Initialize I2C controller base address/IRQAndrew Wu
Change-Id: Iefd6852f2300f703ebed8b52aee627107a024f85 Signed-off-by: Andrew Wu <arw@dmp.com.tw> Reviewed-on: http://review.coreboot.org/4570 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23lenovo/x230: Enable wacom USB portVladimir Serbinenko
Based on lsusb -t info from David Schissler. Change-Id: I061881f531b11dc6f5f7719269cf9f3c9b0b99e1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4786 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23Multiboot: remove multiboot tables generation.Vladimir Serbinenko
GRUB2-as-payload doesn't use them. Libpayload can live with just coreboot tables if loaded as payload. memtest86+ can use them but is buggy with them. Solaris needs a huge boot archive not supported by coreboot and too big to fit in flash (dozens of megabytes). All-in-all looks like no users are left for this. Change-Id: Id92f73be5a397db80f5b0132ee57c37ee6eeb563 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4628 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-01-23lenovo/x230: Add missing copyright line.Vladimir Serbinenko
Change-Id: I5ecd25e23cebf83d4ae9300307aaac527e05c377 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4778 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Enable expresscard hotplug.Vladimir Serbinenko
Change-Id: Ieefc2ad775c16de9aa974b2602d55ee047c9f568 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4643 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23nehalem: Fix SMRAM register addressVladimir Serbinenko
Change-Id: If6646853039d15d6ba0fcf2b9b9b0658004be6e6 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4787 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23lenovo/x201: Reinit CBMEM only on S3 resume.Vladimir Serbinenko
Change-Id: I0643cdab10cda3f19ab56223f5fa77376a8046ac Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4782 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Move early nehalem S3 magic to right place.Vladimir Serbinenko
This MCH magic needs to be done before GPIO. Now S3 (Suspend-to-RAM) works on X201. Change-Id: I319e57af52ff01083bfbffbcd883ac5f453320a1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4632 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23nehalem: Restore frequency ratio registers on S3 resumeVladimir Serbinenko
Previously registers 274/265 and 6dc/6e8 were recomputed which lead to a slightly different values. On S3 resume it needs to be a perfect match. Change-Id: I14f42c7659dde5f327979831fcb1f84ea0c78dee Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4634 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23nehalem: Small cleanup to raminit RE bindingsVladimir Serbinenko
Change-Id: Ifd3f172a1c8a108909d1a7dae94f926b2778c2b1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4633 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23Ibexpeak: add missing thermal init.Vladimir Serbinenko
Without it ME doesn't always start correctly and no temperature is reported, no fan management and so on. Change-Id: Iff71f3afbc35a1453a20d182890ae2d196c556bd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4636 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23nehalem: Move mrc.cache to 0xfffe0000.Vladimir Serbinenko
On nehalem there is no MRC.bin. To avoid excessively fragment the CBFS, put MRC.bin as high as possible. Change-Id: Ia3f7aef5a1e62a42c9fa9ea0f6eec2b29eb6722d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4708 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Add missing LPC registersVladimir Serbinenko
Without them PMH7 is inaccessible from running system. Change-Id: Ib5a524325040e253a9d914906f90263fc208c313 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4655 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Add missing CPU counter.Vladimir Serbinenko
Change-Id: If9f10ef40193fc84ab1849429b5af678ffe831b2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4624 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23nehalem: Simplify acpi.c by using __SIMPLE_DEVICE__Vladimir Serbinenko
Change-Id: I93351a2716cd58c2006400cecca1390b1704e94b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4603 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Add azalia verb.Vladimir Serbinenko
Adds missing sound codec configuration. Change-Id: I3a7097ab0a7c85524f2400471323f5d2d15569ed Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4641 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23board_info.txt: Add ROM information for google butterflyAlexandru Gagniuc
Change-Id: I7d973ef41c4f2973e71015ec292ae88faaeb5840 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4766 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-23lenovo/x230/dsdt.asl: Change space to tab.Vladimir Serbinenko
Change-Id: I9e6d39a5a08fe9fd27daeca0e8393ff019b722d4 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4779 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-22board_info.txt: Classify almost all remaining boards.Vladimir Serbinenko
Based on info from commit messages (most devel/eval boards are mentioned as such in commit message) and information from vendor sites (mostly based on form factor). Classification for siemens/sitemp_g1p1 is based on info by Nico Huber. For Google boards based on info from ML posted by Aaron Durbin. Remaining unclassified board is: google/pit For which very little info is available publically. Change-Id: I12dfff4c629811a48cfc77be27bdc5081530b8f6 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4759 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-01-22CBMEM: Rename cbmem_reinit()Kyösti Mälkki
This function does not really initialize anything, but only checks for the TOC. Change-Id: I9d100d1823a0b630f5d1175e42a6a15f45266de4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4669 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-22lenovo/x230: Fix CBMEMKyösti Mälkki
Fix build. Changes to static CBMEM functions were written before this board was in tree. Change-Id: I6b20d0c2815337edc330d384a409f1f939727c2b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4781 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-22AMD K8/fam10: Fix CBMEM on S3 resumeKyösti Mälkki
Change to use cbmem_recovery() to wipe CBMEM region and reset ACPI wakeup if CBMEM TOC was not found. Change-Id: Ic362253eaa00bd442d4cc0514632f9096e20bfa6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4673 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-22AMD AGESA: Fix CBMEM on S3 resumeKyösti Mälkki
Change to use cbmem_recovery() to wipe CBMEM region and reset ACPI wakeup if CBMEM TOC was not found. Change-Id: I6648570d76b5c137f50addcc5bce9c126d179c65 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4672 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-22CBMEM: Replace cbmem_initialize() with cbmem_recovery()Kyösti Mälkki
The replacement function confirms CBMEM TOC is wiped clean on power cycles and resets. It also introduces compatibility interface to ease up transition to DYNAMIC_CBMEM. Change-Id: Ic5445c5bff4aff22a43821f3064f2df458b9f250 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4668 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2014-01-22lenovo/x201: Really do EARLY_CBMEM_INITKyösti Mälkki
The board was missing cbmem_initialize() call in romstage. Selecting EARLY_CBMEM_INIT implies this is done in romstage. Change-Id: I9ec93f89fe4cbb9e729532be36db601b6e62bca6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4667 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-22roda/rk9: Add EARLY_CBMEM_INITKyösti Mälkki
Change-Id: I450f78cce7172fd2dee66dc81b4f33e07c1aff09 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4664 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-22intel/i945 boards: Add EARLY_CBMEM_INITKyösti Mälkki
Inspired by commits ac6ea04b and 4560ca50 that enabled this feature for lenovo/x60 and lenovo/t60 with i945 chipset. Change-Id: Ia04f58b8c3769b5734708c6a338bb80c13c5aeba Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3994 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-01-22emulation/qemu-armv7: Fix wrong stack parameters.Vladimir Serbinenko
Now it boots up to message "Could not find payload". Change-Id: I07ddca7046492f7e0dec15a8ea00c2870b09ee67 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4754 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-22Lenovo X230: new portVladimir Serbinenko
probably a problem in MRC: - EHCI output failure after sysagent - no S3 - no MRC cache - MRC needs watchdog - less MTRR could be used by some memory map optimisations Not tested: - dock (probably doesn't work) - msata (probably works) - wwan (probably works) - mini displayport (probably works) Blobs: MRC VGA Oprom Change-Id: I5bdb9372971f48e048848d57b6c924b79782dbde Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4679 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-21cbfstool: cleaner filling fieldsPatrick Georgi
The LARCHIVE header isn't a string (not null terminated). It confused coverity, and while it should be obvious that we're not aiming for any null bytes after the header, we can also just not pretend it's a string. Change-Id: Ibd5333a27d8920b8a97de554f1cd27e28f4f7d0a Found-by: Coverity Scan Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4088 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2014-01-21CAR_GLOBAL: Define section details oncePatrick Georgi
Improve clang compatibility by dropping an opaque hack The section attribute was only ever meant for specifying section names, not their properties - otherwise they would have provided section(name,attribute,class) instead of only section(name). The hack to add attribute and class to the name, and commenting out the "real" definitions inserted by the compiler (see the terminating "#"), is refused by clang developers. This is a cleaner implementation in that the section is first declared with its properties, then used later-on, expecting that later conflicting declarations are ignored. It can still break in two ways: 1. The assembler or linker could complain about a section declared in two different ways. 2. The assembler could just use the latest declaration, not the first, to determine the section's properties. I won't sort these out unless they actually happen. Change-Id: I4640b0fc397b301102dde6dc3ea1a078ce9edf1c Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4716 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-21sandybridge/igd: Add brightness register descriptionsVladimir Serbinenko
Needed for brightness control for Lenovo X230 Change-Id: Ib6d127d2e050671dd402c31af06ff4726f65156c Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4618 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2014-01-21board_status.sh: Replace [[ with [.Vladimir Serbinenko
[[ is a bashism. Change-Id: Ief7c43fc1740db32ed97850a415b0c256b5bb35a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4764 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-20google/butterfly: Remove unused cmos.layout optionsAlexandru Gagniuc
Do not expose options that are unsupported by the board. I tried for a couple of days to see why hyperthreading wasn't working. It's not supported by the CPU. The same applies to the baud_rate option. It makes no sense to expose it to userspace via nvramtool. Change-Id: I89b91820616d92fb4db20bf77f4b7f48a70353d5 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4697 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-20sconfig: don't "const" structs twicePatrick Georgi
It's useless and makes clang unhappy. Change-Id: If256b99aebabd87df30a3a078c5804330b82989b Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4713 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-20X201: Fix SMI bindings.Vladimir Serbinenko
Doesn't have a visible effect currently but it's better if those bindings are correct. Change-Id: I0f1a468e59429b14db139cc48e1e68c0e1841300 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4645 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-20boardstatus: Fix creation of links to configs.Vladimir Serbinenko
The unusual construction ls + grep + while read fails for unknown reason. Use standard for x in * consruction instead. Change-Id: Ibcdf5e18543587f71a605bae2d0df72b6a286a5b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4757 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-20google/falco/board_info.txt: Declare as a laptop.Vladimir Serbinenko
Change-Id: I42c77d03b6a5f8ef88f1276de543bb3fc55467af Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4755 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19board_info.txt: Add mentions of thin client names.Vladimir Serbinenko
Based on info from old page Change-Id: Ibd07b5904569e510de249e4216875438a855ff57 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4746 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19boardstatus: Add useful info from old page header to foreword.Vladimir Serbinenko
Change-Id: Ie3d1be1e51df458cd8b55230c888f032ab705ef8 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4743 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19linutop: Add Linutop-1 as a clone of artecgroup/dbe61Vladimir Serbinenko
Change-Id: I69e99e2a1bf9b890281caaf0633f91850d923241 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4747 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19boardstatus: Do not error out on unknown CPU/northbridgeVladimir Serbinenko
On bot, stderr is unmonitored, so it make no sense to stop with an error. Instead use some sensible guesses. Change-Id: I6292e9fbf446b751471b95f86e7515c6680bddf3 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4748 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19nvramcui: Trim values when setting.Vladimir Serbinenko
Values get space-padded by curses and then enum search fails to match them. Rtrim to compensate for curses. Change-Id: Iecf095f21cfade9425eaa039b67625615eb80481 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4692 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2014-01-19libpayload/lpgcc: Add curses include path.Vladimir Serbinenko
Without it payloads that need curses fail to build. Change-Id: I4533238b547e4c2d9e0778fb7d314db35a9559df Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4689 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-01-19boardstatus: Drop v4 mention of coreboot version.Vladimir Serbinenko
Change-Id: I5cf34e14f6e11c03822a6ce6226365c76e0f6875 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4742 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19libpayload/options: Fix out of array read.Vladimir Serbinenko
It resulted in garbage in upper bytes of numeric options. Change-Id: I5e5d8b770ed93c7e8a1756a5ce32444b6a045bac Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4691 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-01-19libpayload: Bring keyboard_wait_write() backPatrick Georgi
Code is using it... Change-Id: I6894b45cbbf70c8e7ce37ce18d93cadf0ea9fbfc Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4649 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-01-19boardstatus: Accept only hex digits for AMD family number.Vladimir Serbinenko
Change-Id: Ia13e54f35215d07d93f93887eef5aeb91ffb874d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4741 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19boardstatus: Skip SKI_ISA_DMA_INIT configs.Vladimir Serbinenko
Change-Id: I10872c31baa0d73ce55d1738a0643fda2555c62e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4740 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19boardstatus: Add new category "sbc".Vladimir Serbinenko
Change-Id: I8a7bf265ebb30dd5997f93729a0329e74f463a23 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4739 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19boardstatus: Add category "emulation".Vladimir Serbinenko
Change-Id: If9d26b9e4cb1895452316c9cf2e8c75a01cfd7c2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4738 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19board_info.txt: Remove some needless name overrides.Vladimir Serbinenko
Overrides were to have names in line with wiki but names derived from the tree are better in some cases. Change-Id: Ic805ba9a3b9c7f926dc9ef27f8673f2c18e9af34 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4737 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19board_info.txt: Change iei/kino's link to web.archive.org.Vladimir Serbinenko
Original link is dead. Change-Id: I56e975ee411f7290c12aad501f490ccc5dedaf05 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4736 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19board_info.txt: declare chromebooks as laptops.Vladimir Serbinenko
Change-Id: I4a3ed7e9b6aaec8aba8ffc47eafdbcca31e4c700 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4734 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19board_info.txt: Categorize various boardsVladimir Serbinenko
Info supplied by: idwer Change-Id: I3086e8118a721ded33c578c6c82e20642ef9d776 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4733 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19boardstatus: Remove some needless name overrides.Vladimir Serbinenko
Overrides were to have names in line with wiki but names derived from the tree are better in some cases. Change-Id: Iff3c27db1a4936b03f976c82d872589e41df0c90 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4735 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19boardstatus: Handle clones.Vladimir Serbinenko
Change-Id: I7bfe19eb800729713a549dc0396765a9785e11b1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4732 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19boardstatus: Use Board:$vendor/$board for board pages.Vladimir Serbinenko
Change-Id: I5249d86188845e1104d25163faa5010b943e707a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4731 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19board-status: Add board_info.txt manually for irregular wiki entriesVladimir Serbinenko
Based on info from wiki. Change-Id: Iebd799abe48550c4df55632b8177d845df7d9a7d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4706 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19board-status: Add board_info.txt extracted from wiki.Vladimir Serbinenko
board_info.txt is a file to be used by board-status to add some useful info to the generated table like flash chip type. This series is autogenerated from wiki page Supported_Motherboards. Change-Id: Ie2bda900713ef4883134477163320936c84c34f5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4701 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19jetway/j7f4k1g2e and jetway/j7f4k1g5d: Add as clones of jetway/j7f2.Vladimir Serbinenko
Change-Id: I16e027b78dc65538d8f0cd6f5e57bbdfc10b7169 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4729 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19boardstatus: Remove support for multiname mobos.Vladimir Serbinenko
It's ugly and not needed anymore. Change-Id: I98301c75684813a217c3ca0435a15b6e4ffef558 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4730 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19jetway/j7f24: Rename to jetway/j7f2.Vladimir Serbinenko
Original actually meant j7f[24] which without square brackets became confusing. There is no such board as j7f24. This is a prerequisite to adding j7f4* as cloned boards Change-Id: Ia7708b13ac4141ef788183c7817fce1366919936 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4728 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 20:45:58 +0000