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2007-12-08Add detection and dump support for NSC PC87309.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3001 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-07Add/fix some LDN descriptions (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-07Fix typo. According to National's datasheet PC87317 has SID = 0xd0 andUlf Jordan
PC97317 has SID = 0xdf. PC87371/PC97371 do not seem to exist. Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-05Remove the coherent_ht_car.c file. It is exactly the same asUwe Hermann
coherent_ht.c (save one empty line removed) so there's no use to keep it around. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-04Various coding style fixes, constification, fixed typos (trivial).Uwe Hermann
Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-04Enable vga option rom support for 1MB rom chip, which is what the h8dmr ↵Ward Vandewege
ships with (trivial). Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-02Add board-enable for Acorp 6A815EPD.Jonathan A. Kollasch
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2995 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-30Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):Uwe Hermann
- Implement ISA related support: - Initialize the RTC - Enable access to all BIOS regions (but _not_ write access to ROM) - Enable ISA (not EIO) support - Without the *_isa.c file, the Super I/O init is never performed - Improve IDE support: - Add config option to enable Ultra DMA/33 for each disk - Add config option to enable legacy IDE port access - Implement hard reset support - Implement USB controller support - Various code cleanups and improvements The code partially supports southbridges other than the 82371EB (but which are very similar), more complete support will follow. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-29fix abuild.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-29Various small fixes (trivial).Uwe Hermann
- Add missing contributors to the README. - Drop obsolete -D option from manpage. - Only list contributors who added non-trivial amounts of code as copyright holders (and do not list those who merely provided register dump support for Super I/Os). Those contributors are still listed in the README, of course. See discussion in the thread starting at http://www.linuxbios.org/pipermail/linuxbios/2007-October/025516.html - Make a function static. - Fix incorrect URL in code comment. Drop obsolete comments. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-29Flashrom does not work after booting LinuxBIOS on the Iwill DK8-HTX board,Mondrian Nuessle
according to mcqmcqmcq@fastmail.fm. Fix it. Signed-off-by: Mondrian Nuessle <nuessle@uni-mannheim.de> Acked-by: mcq <mcqmcqmcq@fastmail.fm> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-29Restructure/rename/comment a few 82371XX-related PCI IDs (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-29Update AMD CPU IDs in model_fxx_init.c with information fromUwe Hermann
the latest version (Rev. 3.73, October 2007) of the 'Revision Guide for AMD Athlon 64 and AMD Opteron Processors' datasheet. Also, add information about the CPU socket for each ID (as per datasheet). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-27Drop the unfinished, non-working Bitworks IMS board.Uwe Hermann
It never worked in v2 (the v1 port did work AFAIK, though), and it's not really useful as reference for other boards anymore (as we now have a dozen or so 440BX boards which work in v2). This is a specialized, custom board (not sold on the "public market"), so it's probably not useful for pretty much everyone out there anyway. We can easily re-add it later (based on one of the other 440BX boards) should there be interest and/or someone with the hardware to test. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-26Correction to irq tables. Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-25Dump support for SMSC FDC37C67x.Robinson P. Tryon
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-25More abuild fixes, the previous ones weren't enough. Hopefully this covers ↵Corey Osgood
everything. Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-25Small abuild fix for the iwill dk8_htx and latest iasl. Building this still ↵Corey Osgood
fails for me, but it's an lzma error and probably Debian's fault. Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-25abuild fix for the asus a8v-e_se and newest iasl version (trivial)Corey Osgood
Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-25abuild fix for the amd serengeti_cheetah and the latest iasl version (trivial)Corey Osgood
Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-25Fix abuild for ASUS MEW-AM.Uwe Hermann
You cannot set 'default ROM_SIZE = 0' in Options.lb (and override it in targets/*/Config.lb). While it'll work for manual builds, abuild doesn't cope with that very well. So set a valid value in Options.lb, too. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-24Add support for the ASUS MEW-AM board.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-24Add dump support for the PC87366.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-22Mark devices which are not available on the board with "N/A" toUwe Hermann
make it clearer why they are disabled (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-22Dump support for the SMSC LPC47B27x (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-201. Fix pirq routing table setting for GA-2761GXDK.Morgan Tsai
2. Southbridge PCIe slots are working correctly now. 3. Disable keyboard & mouse ports for GA-2761GXDK. Signed-off-by: Morgan Tsai <my_tsai@sis.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2976 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17Detection support for more Super I/Os. Small fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-15Various cosmetic fixes and improvements (trivial).Uwe Hermann
- Use 'static' where appropriate. - Use 'const' where appropriate. - Indentation fixes. - Add comment wrt init code which is only valid for VT8237R. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-14Gigabyte M57SLI: Fix watchdog clocksource to be external, not internal.Carl-Daniel Hailfinger
Reason: The existing code does not tell us why it sets the watchdog clock at all, but since it appears in cache_as_ram_auto.c instead of the usual place (Config.lb) there has to be some meaning to it. Simply do what the proprietary bios does: Use the external clock source. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-14Autodetect presence of serial flash and set up the board accordingly.Carl-Daniel Hailfinger
This enables us to have only one configuration and one set of code for all revisions of the Gigabyte GA-M57SLI-S4. Flash is now setup correctly for both SPI and LPC flash. Detection of SPI flash in flashrom on rev. 2.x boards now hangs instead of failing. However, that is just an effect of the combination of incomplete initialization of the SPI controller and paranoid checks in the flashrom SPI code. If anyone wants to work on that, he needs a logic analyzer or creative imagination. Hint: LPC-to-SPI read passthrough, clock signal. Remaining issues for the M57SLI: Fan/environment control. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Harald Gutmann <harald.gutmann@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2972 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-14* Maintaining SiS south bridge device IDs.Morgan Tsai
* Strip unnecessary driver modules. Signed-off-by: Morgan Tsai <my_tsai@sis.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-14Add detection and dump support for the SMSC FDC37N958FR (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Small fix to make abuild happy (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Fix ACPI issues brought up with Intel's latest ASL compiler.Stefan Reinauer
iasl now defaults to put created files into the input file's path, not into the current directory. This (trivial) patch fixes the behavior for the northbridge specific ASL code. Further checkins to be expected. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13[LinuxBIOS] flashrom support for AMD Geode CS5536Lane Brooks
Attached is a patch that enables AMD Geode CS5536 chipset support. I have tested it successfully on a MSM800 board from digital logic. Signed-off-by: Lane Brooks <lbrooks@mit.edu> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Random minor cosmetical or coding style fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2966 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Add support for FID/VID changes messages.Rudolf Marek
Upon incoming SMAF message from CPU (C3 or FID/VID change), the SB will assert SLP# which is connected to LDTSTOP_L on K8 CPUs. Question is for how long. Imho for 100us. Which is more than plenty (2us required) I will try to justify this once I know what bios to set in SB. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2965 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Small fixes. Drop unneeded or incorrect lines (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Add dump support for NSC PC87360.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2963 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Fix ATMEL 29C020 detection with flashrom. The JEDEC probe routine hadCarl-Daniel Hailfinger
a delay of 10 us after entering ID mode and this was insufficient for the 29C020. The data sheet claims we have to wait 10 ms, but tests have shown that 20 us suffice. Allow for variations in chip delays with a factor of 2 safety margin. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Drop obsolete failover.c, forgot it in the last commit (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Various small fixes to make the Tyan S1846 match the format ofUwe Hermann
the other supported 440BX boards. Fix up totally b0rked static device tree in Config.lb. Drop useless and duplicated failover.c, use global one. Make CPU init actually work (result: massive speed-up). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Add support for the Advantech PCM-5820.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Fine-tune the V-link bus between K8T890 and VT8237R and setRudolf Marek
it to 8X transfer rate (up to 1066 MB/s) similar code placed here would be needed for VT8237A/S etc. Using VIA recommended values despite they are for K8T890CF, this is K8T890CE (still dont know what is exactly different). This patch enables the parity error reporting on V-Link, so it enables NMI generation for the SERR# errors. The NMI may not be generated, maybe port 61h needs some tuning too. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Grouping register dumps by 8 register values per group for better readability.Frieder Ferlemann
Remove trailing spaces within the register dumps. Signed-off-by: Frieder Ferlemann <Frieder.Ferlemann@web.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-12Drop superfluous exit_conf_mode*() calls, we don't want to call them twice.Uwe Hermann
Small cosmetic fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-12Fix the remaining issues with GA-M57SLI Super I/O GPIO configuration.Carl-Daniel Hailfinger
With this patch, flashing the parallel EEPROM on board revisions 1.x finally works. Flashing the serial EEPROM of board revisions 2.x is just one patch away. Torsten Duwe says: Flash erase on my board was failing reliably. Now it works! Andreas B. Mundt says: For the first time I was able to write with flashrom and LB. $flashrom -Vv --write linuxbios.rom [...] Vendor ID: GIGABYTE, part ID: m57sli Found chipset "NVIDIA MCP55", enabling flash write... OK. [...] SST49LF040B found at physical address 0xfff80000. Flash part is SST49LF040B (512 KB). LinuxBIOS last image size (not ROM size) is 4096 bytes. Manufacturer: GIGABYTE Mainboard ID: m57sli This firmware image matches this motherboard. Programming page: 0007 at address: 0x00070000 Verifying flash... VERIFIED. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Torsten Duwe <duwe@lst.de> Tested-by: Andreas B. Mundt <andi.mundt@web.de> Tested-by: Torsten Duwe <duwe@lst.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-12Try to fix a few loose ends on the GA-M57SLI Super I/O GPIO Carl-Daniel Hailfinger
configuration. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Torsten Duwe <duwe@lst.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-08Fix up totally broken Super I/O config on the MS-6178. AddUwe Hermann
PIRQ table to make most devices work. Random small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-07Final set of changes to make Alix1c work.Ronald G. Minnich
Fix IRQ tables (Thanks to Marc Jones) Fix IRQ SLOT # Comment out ram test in early startup. make the debug print in lx/raminit.c a debug print, not emerg print Set the default console log level to 3, but leave in the possibility of running with more info (leave maximum at 11) Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-07Add initial support for all known ICH* southbridges to theUwe Hermann
i82801xx code for the following parts: - AC97 audio/modem - Onboard network interface cards (NICs) - USB 1.1 controllers - SMBus controllers Some other parts are still missing and will be added later. Use PCI ID #defines from pci_ids.h everywhere. Constify various structs. Also, fix some random cosmetic issues in the code. All of this is relatively trivial and tested by manually building all boards which currently use the i82801xx code. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-07Make the LZMA compression option work in buildrom.Myles Watson
Signed-off-by: Myles Watson <myles@pel.cs.byu.edu> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-07This patch masks the function prototypes in stdlib.h from ROMCC, so thatCorey Osgood
ARRAY_SIZE() can be used on ROMCC-dependent systems. Also adds stdlib.h to vt8237r_early_smbus.c, so it'll build on those systems. Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-07This patch adds the pci ids of c7 cpus to the existing model_centaur. c3 Corey Osgood
and c7 init are identical, according to the datasheets, so there's no need for another folder. As the comment says, some of these model IDs may never be produced, but they are reserved by Via for the c7. Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-07Add PCI IDs for most Intel southbridges of the 82801 seriesUwe Hermann
(ICH/ICH0 up to the ICH9 family) in preparation for further code improvements for the i82801xx southbridge code. Small fixes in the 6300ESB PCI IDs. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-05Fix the M57SLI routing table, as apparently set up from LinuxBIOS onTorsten Duwe
that board. Shift PCIe pin numbers downwards, and PCI int pins upwards. This puts both PCI slots' int A and PCIe 16x int A into the right position. Signed-off-by: Torsten Duwe <duwe@lst.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-05* Change one PCI vendor ID from Nvidia to SiSCarl-Daniel Hailfinger
* Remove dead code * Remove unused variables * Fix bug where array was one element too small * Fix error value truncation, the old code never entered the error path * Remove warnings Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-04make agami aruma compile again. Stefan Reinauer
Rudolf's suggestion making the symbol weak is elegant, but let's allow some more discussion. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2944 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-04another small abuild fix.. add payload compression "uses" for the a8v-e-seStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-04Small fix to make abuild happy on the asus/a8v-e_se (trivial)Corey Osgood
Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-04Add dummy function for MCFG on those mainboards that provide ACPI but don't Stefan Reinauer
have PCIe MMCONFIG. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-04merge changes to match agami's production environmentStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-04Various cosmetics, coding style fixes, constifications (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-04Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up toUwe Hermann
ICH5/ICH5R (more to follow) in preparation of further 82801xx improvements. Use human-readable names for the PCI ID #defines. Rename *_ISA to *_LPC as per datasheet. The 82801DBM only has 3 (not 4) USB devices, looks like a copy-paste error. The fixes in southbridge code are only to keep the build working for now, any real improvements will only go into the 82801xx code in future. This is abuild-tested so it shouldn't break anything. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2938 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-03This patch is some small changes to the vt8237r to prepare it forCorey Osgood
the Jetway J7F2 patch that should be coming soon, and also moves most defines into vt8237r.h. I've changed some of the values from u32 to u8, because that's all they should ever need to be. Also includes doxygenized comments! Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2937 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-03This patch adds support for MCFG table, which allows OS to find theRudolf Marek
MMCONFIG for memory mapped PCIe config. However this patch is not enough to enable it on Linux, Linux do not trust BIOSes too much, so a small patch to kernel to disable the check if this region is e820 reserved. PCI: BIOS Bug: MCFG area at e0000000 is not E820-reserved PCI: Not using MMCONFIG. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2936 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02This patch changes the "if else" style of parameter matching to table and ↵Rudolf Marek
also changes the rdpreamble parameter, which will cause that more then one DIMM will work for 939 motherboard. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02Asus A8V-E-SE support from Rudolf MarekRudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2934 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02remaining part of the patch.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02Delete a file no longer used by the SiS implementationJordan Crouse
No functional code changes. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-021. vgabios removed, will go to extra repositoryMorgan Tsai
2. Rename sisnb.c to sis761.c 3. Delete many mis-definition for sis device in src/include/device/pci_ids.h 4. Trim trailing spaces for all files Signed-off-by: Morgan Tsai <my_tsai@sis.com> Acked-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02fix up iwill board compilation. Untested, trivialStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02fix up IBM servers.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02get arima hdama building again.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02fix juki 511p abuild by adding a Config-abuild.lb. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02This patch fixes the superio of the khepri 2100e as detected:Stefan Reinauer
> superiotool r2922 > Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x0d) at 0x2e Don't use the non-working trident driver for the blade3d (onboard vga in the rom emulator has not been tested either) It also adds some preliminary CAR support to the board, so it has a chance to build again. This board was broken since a couple of months, and the changes are minimal, so I consider this a trivial change -- It doesn't change anything that was used, obviously Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02trivial fix for the .data problemStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-01This patch is a trivial response to a good comment from Uwe, so I amRonald G. Minnich
self-acking before it gets lost. Acked-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31Use the preferred order of 'static const' instead of 'const static'.Uwe Hermann
This is the common style in both Linux as well as in LinuxBIOS. Self-ack as this is pretty trivial and a similar patch was already acked. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31Use the preferred order of 'static const' instead of 'const static'.Uwe Hermann
This is the common style in both Linux as well as in LinuxBIOS. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31As started in Torsten Duwe
http://www.linuxbios.org/pipermail/linuxbios/2007-October/025385.html , but change all apparantly related values that differ on my board with legacy BIOS. This makes both PCI cards appear, as well as the firewire device TSB43AB23. * PCI 01:07.0 appears fully functional * PCI 01:08.0 (closer to the board edge) appears, but no interrupts * PCI 01:0a.0 (FireWire) untested Since none of these was even present without the patch I suggest to apply it. Signed-off-by: Torsten Duwe <duwe@lst.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Harald Gutmann <harald.gutmann@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31Add initial support for the Compaq Deskpro EN SFF P600.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31Add initial support for the Biostar M6TBA.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31Add initial support for the AZZA PT-6IBD.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31Add initial support for the A-Trend ATC-6220.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2917 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31Add initial support for the GIGABYTE GA-6BXC.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31Add initial support for the ASUS P3B-F.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Add initial support for the ASUS P2B-F.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Various smaller fixes to make the ASUS P2B match the formatUwe Hermann
of all the other boards in this patch series. Add missing PIRQ table to make most devices work. Enable VGA support. Add flashrom flashing protection code. Make CPU init actually work (result: massive speed-up). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Various fixes and improvements of the 82801xx code.Joseph Smith
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30[LINUXBIOS] Add the CPU_OPT flag to facilitate passing flags into the buildJordan Crouse
buildROM passes build flags through the CPU_OPT environment variable - especially -fno-stack-protector for those of us lucky enough to have Debian/Ubuntu. This adds to the cache_as_ram_auto.inc target for the GA-2761GXDK so that the resulting cpu0.S is clean. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Small rename to make abuild happy (trivial).Uwe Hermann
This is not yet enough to actually successfully build the board, but now abuild at least _attempts_ to build it. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Drop empty directories (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Rename the SiS761GX/SiS966 board to the correct name, GIGABYTE GA-2761GXDK.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Add support for the VIA VT8237R southbridge.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: <corey.osgood@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30move target directory to have the same name as the directory in theStefan Reinauer
mainboard/ path. Also add a Config.lb for abuild. It's required for the three images variant as abuild doesnt detect this automatically. Trivial patch - it does not even fix the build yet. Patches welcome. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30fix the readwrite/readonly clashes for the pci_driver structs in the sisStefan Reinauer
code. This is trivial, I did it for the other components before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30K8 resource dump utility from Rudolf MarekRudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2904 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Add support for Intel 440MX systems.Uwe Hermann
Add support for the Fujitsu MBM29F400TC flash part. Detection and reading works, writing is not tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-29Thanks to the great efforts of Morgan Tsai of SiS we support the SiS966Morgan Tsai
southbridge now: From: Morgan Tsai <my_tsai@sis.com> It supports SiS761GX / SiS966 chipset, only for AMD K8 platform so far. Due to integrated VGA sharing system memory, some code in southbridge folder have to init northbridge. Copyright (C) 2007 Morgan Tsai <my_tsai@sis.com> Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) Change Log: Newly support GIGABYTE GA-2761GXDK CPU type: AMD AM2 socket Northbridge: SiS 761GX Southbridge: SiS 966 SuperIO: ITE8716F Signed-off-by: Morgan Tsai <my_tsai@sis.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2902 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-19 12:51:33 +0000