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2009-04-16I deleted mptable.c in my patch, but forgot to svn rm it.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15v2/src romfs->cbfs renamePeter Stuge
romfs.c has been replaced by cbfs.c. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4121 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15This patch cleans up mpspec.h and allows it to be included whenMyles Watson
HAVE_MP_TABLE=0 It also removes the artifacts from the Asus m2v-mx_se that were necessary before the change. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15Add -r|--remove option to force abuild to remove the output directoryUwe Hermann
after every board build, in order to save disk space if you don't need the actual output files. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15Some coding style and consistency fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15r4097 broke the tree and it remains unfixed :-( Stefan Reinauer
Repeat: Cosmetic patches shall not break the tree for 20 revisions. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14EPIA-CN does not have any ACPI tables. Fixes manual and auto build here.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14util/cbfstool/tools/rom-mk*->cbfs-mk* renamePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4114 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/src romfs->cbfs renamePeter Stuge
This also has the config tool changes in v2/util. Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14fix up the tree.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14util: romfs->cbfs renamePeter Stuge
I noticed this before sed, but forgot to change it back after sed. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/util: romfs -> cbfs renamePeter Stuge
It's all sed here. romfs->cbfs, ROMFS->CBFS, romtool->cbfstool Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/documentation: romfs -> cbfs renamePeter Stuge
This is svn mv romfs.txt cbfs.txt and sed romfs->cbfs, ROMFS->CBFS along with one manual change: CBFS_file->cbfs_file Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4109 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Fix the build. This error was introduced by change in acpi.c, the ↵Rudolf Marek
acpi_slp_type exists only conditionally. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Fix typo. Add missing copyright year.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Emergency fix. Most targets now build. Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4106 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13I need to do uses HAVE_ACPI_RESUME for each board. Here we go.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> It should fix the build break introduced in r4101 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13The wake_vec must be HAVE_ACPI_RESUME guarded because PPC uses -Werror on ↵Rudolf Marek
this file. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Self ack, trivial fix: Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds support for the ACPI resume on Asus M2V-MX SE. The ACPIRudolf Marek
code just blinks the leds. The motherboard resources are use to reserve coreboot used memory. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds resume (exit from self refresh) support for AMD K8 revFRudolf Marek
CPUs. It handles both type of erratas on those CPUs. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch implements ACPI resume support for coreboot. The hardware mainRudolf Marek
hook will come in separate patch perhaps. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds support for resume on VT8237 based motherboards. The NBRudolf Marek
part of this patch adds support for resume well NVRAM. In which DQS values are stored. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds necessary hooks and as well the compile time checks forRudolf Marek
ACPI suspend/resume. The memory cleared now is just the coreboot memory not the low memory. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Fix the following errors:Carl-Daniel Hailfinger
In file included from src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:93: src/northbridge/amd/amdk8/raminit.c: In function ‘sdram_set_spd_registers’: src/northbridge/amd/amdk8/raminit.c:2123: error: implicit declaration of function ‘activate_spd_rom’ In file included from src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:101: src/cpu/amd/model_fxx/init_cpus.c: In function ‘init_cpus’: src/cpu/amd/model_fxx/init_cpus.c:319: error: implicit declaration of function ‘soft_reset’ In file included from src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c:98: src/northbridge/amd/amdk8/raminit_f.c: In function ‘sdram_set_spd_registers’: src/northbridge/amd/amdk8/raminit_f.c:2848: error: implicit declaration of function ‘activate_spd_rom’ Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12This patch cleans up the calls to $CC in mainboard Config.lb files. TheyCarl-Daniel Hailfinger
now all have the same parameter order. action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -o $@" The idea behind this parameter order is: - *FLAGS at the beginning. - Use a common set of *FLAGS. - Include files and directories listed afterwards. - nostdinc, nostdlib, no-builtin tell the compiler this is standalone code. - Warnings. They do not influence source or compilation. - Compilation strategy (small) and output mode (asm or binary). - File to be compiled. - Output name. - $(DEBUG_CFLAGS) and -S are only used for asm output. Other changes in this patch: - src/supermicro/h8dme/Config.lb now uses $DEBUG_CFLAGS instead of hardcoding the respective flags. - $DEBUG_CFLAGS was added to asm outputting $CC calls: supermicro/h8dme/Config.lb lippert/roadrunner-lx/Config.lb - $DISTRO_CFLAGS was added to some $CC calls in: iwill/dk8_htx/Config.lb (CAR AP code) supermicro/h8dmr/Config.lb (CAR AP code) supermicro/h8dme/Config.lb (CAR AP code) gigabyte/m57sli/Config.lb (CAR AP code) gigabyte/ga_2761gxdk/Config.lb (CAR AP code) amd/serengeti_cheetah_fam10/Config.lb (everywhere) msi/ms7135/Config.lb (everywhere) nvidia/l1_2pvv/Config.lb (CAR AP code) -$CFLAGS was added to all $CC calls in: amd/db800/Config.lb amd/dbm690t/Config.lb amd/norwich/Config.lb amd/pistachio/Config.lb amd/serengeti_cheetah/Config.lb amd/serengeti_cheetah_fam10/Config.lb arima/hdama/Config.lb artecgroup/dbe61/Config.lb asus/a8n_e/Config.lb asus/a8v-e_se/Config.lb asus/m2v-mx_se/Config.lb broadcom/blast/Config.lb digitallogic/msm800sev/Config.lb gigabyte/ga_2761gxdk/Config.lb gigabyte/m57sli/Config.lb ibm/e325/Config.lb ibm/e326/Config.lb iei/pcisa-lx-800-r10/Config.lb iwill/dk8_htx/Config.lb iwill/dk8s2/Config.lb iwill/dk8x/Config.lb kontron/986lcd-m/Config.lb lippert/roadrunner-lx/Config.lb lippert/spacerunner-lx/Config.lb msi/ms7135/Config.lb msi/ms7260/Config.lb msi/ms9185/Config.lb msi/ms9282/Config.lb newisys/khepri/Config.lb nvidia/l1_2pvv/Config.lb pcengines/alix1c/Config.lb sunw/ultra40/Config.lb supermicro/h8dme/Config.lb supermicro/h8dmr/Config.lb technexion/tim8690/Config.lb tyan/s2735/Config.lb tyan/s2850/Config.lb tyan/s2875/Config.lb tyan/s2880/Config.lb tyan/s2881/Config.lb tyan/s2882/Config.lb tyan/s2885/Config.lb tyan/s2891/Config.lb tyan/s2892/Config.lb tyan/s2895/Config.lb tyan/s2912/Config.lb tyan/s2912_fam10/Config.lb tyan/s4880/Config.lb tyan/s4882/Config.lb - Use $@ wherever appropriate. - Kill that evil CACHE_AS_RAM_AUTO_C variable. - Trailing whitespace fixups on lines which were touched anyway. We now only have 6 remaining different calls to $CC whereas before there were 20. If I am allowed to rename src/mainboard/kontron/986lcd-m/auto.c to src/mainboard/kontron/986lcd-m/cache_as_ram_auto.c, we're down to 4 different calls. If we can decide on the use of $CPU_OPT, we are down to 3 different calls. One additional point I'd like to clear up: if ASSEMBLER_DEBUG makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm end "-dA -fverbose-asm" is only useful for asm output. For these flags, DEBUG_CFLAGS is a total misnomer. What about calling them DEBUG_ASMCFLAGS or somesuch? "-g" should be controllable by a separate switch. It is useful even for object code. The following targets are broken by this patch because they contain implicit declarations, but the error did not trigger due to missing CFLAGS: amd/serengeti_cheetah asus/a8v-e_se asus/m2v-mx_se digitallogic/msm800sev pcengines/alix1c supermicro/h8dme supermicro/h8dmr Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12The IT8712F needs to have the configuration bits changed to handle the power forRudolf Marek
memory correctly during suspend.s Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11Bring S2912 and S2912_Fam10 Config.lb in line with each other.Carl-Daniel Hailfinger
- Use $(CACHE_AS_RAM_AUTO_C) instead of cache_as_ram_auto.c - Compile apc_auto.c with $(DISTRO_CFLAGS) - Clean up whitespace If anyone can explain the remaining differences in Config.lb which are NOT caused by the K8/Fam10 switch, I'd be glad to hear them. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11This patch fixes an edge case for K8 raminit. Specifically, it brings the codeWard Vandewege
in line with the K10 code. I was trying to use DDR2 800 (CL6) memory on an m57sli, but booting failed. Marc Jones found this bug (thanks!), which fixes booting with this specific memory. For the record, it was Crucial CT2KIT25664AA800. I put the machine through a few days of use. It also succesfully passed a run of http://people.redhat.com/dledford/memtest.shtml: $ ./memtest TEST_DIR: /tmp SOURCE_FILE: linux-2.6.29.1.tar.bz2 NR_PASSES: 20 MEGS_PER_COPY: 270 NR_COPIES: 45 PARALLEL: no COMPRESS_RATIO: 5 COMPRESS_FLAG: j COMPRESS_PROG: /bin/bzip2 EXTRACT: yes Creating comparison source...done. Starting test pass #1: unpacking, comparing, removing, done. Starting test pass #2: unpacking, comparing, removing, done. Starting test pass #3: unpacking, comparing, removing, done. Starting test pass #4: unpacking, comparing, removing, done. Starting test pass #5: unpacking, comparing, removing, done. Starting test pass #6: unpacking, comparing, removing, done. Starting test pass #7: unpacking, comparing, removing, done. Starting test pass #8: unpacking, comparing, removing, done. Starting test pass #9: unpacking, comparing, removing, done. Starting test pass #10: unpacking, comparing, removing, done. Starting test pass #11: unpacking, comparing, removing, done. Starting test pass #12: unpacking, comparing, removing, done. Starting test pass #13: unpacking, comparing, removing, done. Starting test pass #14: unpacking, comparing, removing, done. Starting test pass #15: unpacking, comparing, removing, done. Starting test pass #16: unpacking, comparing, removing, done. Starting test pass #17: unpacking, comparing, removing, done. Starting test pass #18: unpacking, comparing, removing, done. Starting test pass #19: unpacking, comparing, removing, done. Starting test pass #20: unpacking, comparing, removing, done. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11Kill remaining unneeded CAR/ROMCC if-blocks.Carl-Daniel Hailfinger
Lots of Config.lb files still have "if USE_DCACHE_RAM" sections although USE_DCACHE_RAM is always set for them. Such checks are not only pointless, they actively make the files hard to read. A full abuild run confirmed that compilation did not change with this patch applied. The patch does not change whitespace of the remaining code to ease review and svn blame. With this change, it should be possible to have two or three Config.lb variants in total (except the actual hardware config). Right now, some Config.lb have comments, some don't, some have empty lines for better readability, some don't, some have leading whitespace, some don't. This is an utter mess and unifying these files would certainly reduce the headaches I have when looking at them. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11Mention a few more flash chip packages in README/manpage.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10move architecture override before cross compiler detection, or the SandpointStefan Reinauer
skeleton will have get a cross compiler before it gets the architecture set to SKIP. Pretty much build system internal, so self-acked. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10Add a note that 'modprobe msr' might be required.Uwe Hermann
Remove trailing whitespace. Fix typos. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10Fix typo.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10Various manpage / README fixes:Uwe Hermann
- Improve description a bit, especially wrt chip packages and protocols. - Add some missing parameters to manpage option descriptions. - Remove long obsolete DoC support note. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10unify spd_ddr2.h (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-09Fixed the typo should indeed be a 0x2e.Mondrian nuessle
Tested on an iWILL DK8-HTX board. Signed-off-by: Mondrian nuessle <nuessle@uni-hd.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-08* commit previously forgotten romfs.txtStefan Reinauer
* fix a copy & paste error in src/lib/romfs.c Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4085 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-08fix sandpointx3_altimus_mpc7410 target. We're back at all boards compiling.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4084 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-08Only build romfs on those target that have CONFIG_ROMFS enabled.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-07This tested ok, but qemu can't really handle c0000 as RAM.Ronald G. Minnich
(trivial) Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-07add Config-abuild for the new board (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4081 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-07This is a bit of an emergency fix for qemu. Ethernet routing has not been Ronald G. Minnich rminnich
working. Given all the limitations of PIRQ routing we keep it simple and just set the IRQ directly. Most BIOSes are doing setup this way anyways, since there are so many errors in PIRQ tables. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06This fixes a bug in romfs code; see comment. If we add the pci rom Ronald G. Minnich
to romfs for qemu,we get this: Check pci1013,00b8.rom found it, @ fff99698, first word is e946aa55 In cbfs, rom address for PCI: 00:02.0 = 0 On mainboard, rom address for PCI: 00:02.0 = fff99698 copying VGA ROM Image from fff99698 to 0xc0000, 0x8c00 bytes This is sort of OK, excpet that when it gets to payload time, the system explodes. I suspect that copy is kind of a problem. But this is a pretty important bug fix so in it goes. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06Some changes for option roms: Ronald G. Minnich
- don't make users pick the name. Names for option roms are in the v3-defined format of pci%04x,%04x.rom with the vendor and device id filling in the %04x. - users pass in vendor and device id. - users pass in a dest. If the dest is 0, the address of the ROM image in FLASH is returned. If the address is non-zero, then the decmpressor is called, and it will make sure the ROM image is copied to the destination (even in the uncompressed case). move qemu over to always using ROMFS Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06Add support for romfs to option rom loading. Ronald G. Minnich
Pretty simple: Find the rom in the romfs, if found, set dev properties so that the rest of the code works. At some point, we can remove some of the other code, i.e. the first else, and stop requiring people to do math. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06(trivial) fix some warningsStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06Daniel Toussaint wrote:Daniel Toussaint
As I mentioned a few weeks ago, I am in the process of porting this board: http://www.technexion.com/products/embedded_boards/tim-8690-mt.html This board has a dual BIOS , choosable with a jumper - much like the BIOS savier from before - so it is a pleasure to work with as a linuxbios developer. It is still a work in progress, however , I already submit the patch. All on board devices and slots work as expected, only need some more stress testing with the RAM, acpi, etc.. Signed-off-by: Daniel Toussaint <daniel@dmhome.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4075 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-05cross compilation fix for motorola sandpoint based boardsStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4074 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-05two more totalimpact briq fixes. Gets us back to the romfs breakage on PPCStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04Makefile includes were mixed up.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04fix this warning:Stefan Reinauer
coreboot-v2-4067//src/stream/ide_stream.c: In function 'stream_ide_read': coreboot-v2-4067//src/stream/ide_stream.c:47: warning: declaration of 'offset' shadows a global declaration coreboot-v2-4067//src/stream/ide_stream.c:13: warning: shadowed declaration is here Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04fix this warning for the embedded planet ep405pcStefan Reinauer
/tmp/ccilLWBf.s: Assembler messages: /tmp/ccilLWBf.s:144: Warning: setting incorrect section attributes for .rodata.pci_driver Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04This fixes a race condition (revealed by my other check-in r4067) in theStefan Reinauer
romtool by changing the Makefiles to be no longer recursive (once again, recursive make is to be considered harmful). Tried to (quickly) unify most of the Makefile code, but medium-term this is going to be worked on for Kconfig support anyways. Also fix a sign cast error in rom-mkpayload in case people want to compile this with -W -Werror Patch relative to coreboot-v2/util/romtool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> and Acked-by: Stefan Reinauer <stepan@coresystems.de> in order to get the tree working decently asap git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04small workaround for romtool incompatibility with ppc portsStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04build romtool in mainboard target directory.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04fix cross compilation in abuild for certain scenarios Stefan Reinauer
(coreboot.org build system internal) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4066 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04fix variable shadowing in lzmadecode.c (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04fix some warnings by casting safely. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04use $(MAKE) instead of hardcoded "make".. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04fix configuration step of totalimpact briq and embeddedplanet ep405pc.Stefan Reinauer
(trivial). Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4062 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04Fix the concurrency issue of building romtool.Patrick Georgi
romtool is still built in util/romtool, as happens without this patch. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03These are some cleanups and changes. These are build and boot tested on qemu.Ronald G. Minnich
Some changes for option roms: - don't make users pick the name. Names for option roms are in the v3-defined format of pci%04x,%04x.rom with the vendor and device id filling in the %04x. - users pass in vendor and device id. - users pass in a dest. If the dest is 0, the address of the ROM image in FLASH is returned. If the address is non-zero, then the decmpressor is called, and it will make sure the ROM image is copied to the destination (even in the uncompressed case). And some type and print cleanup. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4060 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03Add u64 typedef to ppc (trivial)Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03Fix up the incomplete commit in r4055.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03drop unused variables in generic smm handler. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03drop another shadow variable (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03There are more than a dozen targets in the v2 tree which refer to ROMCCCarl-Daniel Hailfinger
in their Config.lb but never use it. There's no point in keeping dead code around. This patch removes ROMCC remainders from Config.lb and kills orphaned auto.c and failover.c in the affected mainboard directories. arima/hdama ibm/e325 ibm/e326 iwill/dk8s2 iwill/dk8x msi/ms9282 newisys/khepri sunw/ultra40 tyan/s2891 tyan/s2892 tyan/s2895 tyan/s4880 tyan/s4882 Abuild log is completely identical with and without the patch. With this patch, the last ROMCC remainders for K8 boards are gone. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03I thought that romfs infrastructure is done now, but there were somePatrick Georgi
issues (see buildbot). The romfs image was always built, and sometimes broke (because of the different image layouts) for buildrom images. After the patch, these issues are avoided by not adding payloads to the romfs image (they wouldn't be read anyway). Both workarounds (in buildrom code for romfs and vice-versa) aren't very pretty, but that's what our buildsystem requires. As I had to create a "communication channel" (via the romfs-support files), I took the chance to also use it for compression information, so if you configure lzma support, you'll get lzma compressed payloads in romfs. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03The attached patch tries new style compression first and runs oldPatrick Georgi
style compression if the command returned an error code (happens if you run an old lzma with the new arguments) Tested on new-style lzma only (as I lack a build environment with old lzma), but I tested that the old lzma returns with an error code. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03Print a pointer as pointer, it's really trivial.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03This patch implements --include=file.h for romcc.Stefan Reinauer
The compile_file calls seem to be in the wrong order, but romcc actually requires it that (probably some stack-like file processing) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03Next step. Kill auto.c and failover.c and clean up Config.lb forCarl-Daniel Hailfinger
tyan/s2735 tyan/s2850 tyan/s2875 tyan/s2880 tyan/s2881 tyan/s2882 tyan/s2885 tyan/s2891 tyan/s2892 tyan/s2895 Abuild log is completely identical with and without the patch. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03the attached patch is the last infrastructure change necessary forPatrick Georgi
romfs. Everything else to make a target romfs aware happens in the targets. What the patch does: 1. missing romfs.h include 2. special handling while creating coreboot.rom While the romfs code path in the makefile doesn't actually use the file, it's possible that the build of coreboot.rom fails in a romfs setup, because the individual buildrom image is too small to host both coreboot and payloads (as the payloads aren't supposed to be there). Thus, a special case to replace the payload with /dev/null in case of a romfs build. There would be cleaner ways, but they're not easily encoded in the Config.lb format. 3. config.g is changed to create rules for a romfs build Targets should still build (they do for me) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03There are more than a dozen targets in the v2 tree which refer to ROMCCCarl-Daniel Hailfinger
in their Config.lb but never use it. There's no point in keeping dead code around. Kill it. This patch removes ROMCC remainders from Config.lb for tyan/s2735 and tyan/s2850. Abuild build log with and without the patch is completely identical. More patches of the same type can be done, hopefully making ROMCC dependencies a bit more clear for v2. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-02Ronald Hoogenboom writes:Ronald Hoogenboom
I've attached a patch that removes the 3-mile-long compiler commandlines, which vim's quickfix doesn't like so much. Instead of putting all those -DXYZ='bla' on the compiler commandline, they are put in a file called settings.h (as #define XYZ bla) and only a --include=settings.h is put on the commandline. This file is created unconditionally at the same time as when the CPUFLAGS simply expanded make variable used to be created (not via a target rule and dependency), so it shouldn't change anything. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01Fix typo.Marc Jones
trivial. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4046 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01Updated microcode for for AMD Fam10 DR-B2 and B3.Zheng Bao
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4045 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01forgot this. Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4044 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01(trivial) add filo call back for those few mainboards that still (need to) Stefan Reinauer
use the built-in filo. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01Drop CONFIG_CHIP_NAME. Those config statements in Config.lb shouldStefan Reinauer
be used unconditionally, and the names don't hurt. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01Forgot CONFIG_ROMFS for supermicro/h8dme.Patrick Georgi
Trivial fix, just add the defaults as with all other boards. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4041 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01Add copyright notices to two files, src/boot/elfboot.cebiederm
and its derivative src/boot/selfboot.c. The mail in which Eric asserts authorship on elfboot.c is quoted below, selfboot.c was substantially edited by Ron. With that information in mind the change is trivial. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> From: ebiederm@xmission.com (Eric W. Biederman) Date: Wed, 01 Apr 2009 03:31:15 -0700 To: Patrick Georgi <patrick@georgi-clan.de> Patrick Georgi <patrick@georgi-clan.de> writes: > Hi, > > We found some file in the coreboot tree that we suspect is yours. > Unfortunately, > both copyright notice and license are missing. > Could you please take a look at it, and state whether it's yours, > and if so, > what license is to be attached? Yes. GPLv2 > The file in question is > http://tracker.coreboot.org/trac/coreboot/browser/trunk/coreboot-v2/src/boot/elfboot.c > and its history goes back to > http://tracker.coreboot.org/trac/coreboot/log/trunk/LinuxBIOSv2/src/boot/elfboot.c?rev=2890 Eric git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4040 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01This code adds support for coreboot images that use ROMFS. Ronald G. Minnich
It also removes the call to FILO from hardwaremain -- that has needed removal for a long time. abuild tested. Note that this code has been tested and works on both qemu and kontron. The changes to use it are coming next. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31fix typoStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31fix typoStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4037 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31fix shadow variable in compute_ip_checksum.cStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31Add the CONFIG_ROMS config variable. Ronald G. Minnich
Tested under abuild, causes no trouble. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31This fixes a shadowed declaration in multiboot.c.Robert Millan
Signed-off-by: Robert Millan <rmh@aybabtu.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4034 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31cosmetic fix for function definition.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31This patch adds Jordan's romtool support for v2. Ronald G. Minnich
There are a few changes. The 20K bootblock size restriction is gone. ROMFS has been tested and works on v2 with qemu and kontron. Once this patch is in, those patches will follow. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-30flashrom: Board enable support for HP DL145 G3.Mondrian Nuessle
This is a BCM5785 based machine, WP# and TLB# need to be deasserted using GPIO 2 and 5 from the PM registers of the southbridge. This is very similar to the x3455 implementation. Signed-off-by: Mondrian Nuessle <nuessle@uni-hd.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-26During the suspend/resume programming I came to an issue that first 4KB ofRudolf Marek
memory must be clear with 0s because otherwise the resources of K8 will be totally messed up. res = probe_resource(dev, 0x100 + (reg | link)); This is called with dev = NULL and this is no good for probe_resource at all. The attached patch fixes the potential problems and of course the problem itself. On one particular place was missing test if the device really exists. This was copied to fam10 and perhaps the same issue is in v3 (DID NOT check). The rest of the patch is just very paranoid and do all checkings. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Myles Watson <mylesgw@gmail.com> --This line, and those below, will be igno red-- M src/devices/pci_ops.c M src/northbridge/amd/amdk8/northbridge.c M src/northbridge/amd/amdfam10/northbridge.c git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25- List SMSC LPC47N227 runtime register block as supported.Uwe Hermann
- Add missing contributor in README. - Cosmetic fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25The latest ucode patches for Family 10h:Zeng Bao
9fh for RB/BL/DA Rev C; 96h for DR Rev B. Signed-off-by: Zeng Bao <zheng.bao@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4028 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-24Every object file with a struct pci_driver ... __pci_driver needs to be markedStefan Reinauer
as "driver" instead of "object" in order to get the init code actually executed. This patch fixes up all northbridges that did not do this before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4027 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-23msrtool: If an MSR name lookup fails in msraddrbyname(), return the ↵Peter Stuge
strtoul() conversion result. Thanks to Mart for finding and reporting the problem! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-21To make use of HAVE_HIGH_TABLES following patch is needed. Also, it movesRudolf Marek
coreboot to 1MB and tries to cache whole range for XIP. The UMA part colide a bit with the HAVE_HIGH_TABLES region. I solved that by relocation of the region. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4025 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-21To make use of HAVE_HIGH_TABLES following patch is needed. Also, it movesRudolf Marek
coreboot to 1MB and tries to cache whole range for XIP. The UMA part colide a bit with the HAVE_HIGH_TABLES region. I solved that by relocation of the region. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-20Kevin O'Connor said:Myles Watson
The bug is in src/arch/i386/boot/boot.c. The inline assembly in jmp_to_elf_entry uses the "g" flag to pass in parameters. However, "g" allows gcc to use stack relative addressing of parameters. Easiest fix would be to change "g" to "ri" - put the parameter either in a register or as an immediate value. That's what this patch does. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-20Add Supermicro h8dm3 mainboard. This is mostly a copy from the h8dmr.Marc Jones
The one issues is the SPD address switch for the second CPU. That means that the memory must be an exact match on each CPU. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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