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2010-01-16ectool: Support for dumping EC "index ram"Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16msrtool: Remove indent by using continue inside for() to avoid an if blockPeter Stuge
The only actual code change is from if (.. >= 1) { } to if (.. < 1) continue so this is pretty trivial. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Update reference toolchain toStefan Reinauer
gcc 4.4.2 binutils 2.20 gdb 7.0 and add mingw support. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Intel D945GCLF: Enable SMI and ACPI in Kconfig, too (it's enabled in newconfig)Stefan Reinauer
and guard SMI specific parts of the ACPI code. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16(trivial) cosmetics for i82801gx cmos failover.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16* drop reset files from 945 mainboards (and use southbridge specific reset)Stefan Reinauer
* drop debug.c files from 945 mainboards (and share it in the northbridge code) * adapt the mainboard and auto.c files for above changes. Rather trivial Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16nvramtool: Consider a string with non-printable characters a "bad value".Stefan Reinauer
Otherwise nvramtool -a with random cmos contents can mess up your terminal. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5015 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Make internal functions static in speedstep ACPI generation code.Stefan Reinauer
(trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Fix stack base for Atom CPUs, the resume mechanism (cbmem etc) expects this.Stefan Reinauer
This unifies the base with Core and Core 2 CPUs. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Micro-optimization: movl $0 --> xorl.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16new microcode for Intel Core 2(tm) CPUsStefan Reinauer
(taken from Intel's Linux microcode release) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16RTC: Don't drop the alpha specific code but get it in shape for our Kconfig ↵Stefan Reinauer
scheme. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-15(missing svn add)Nils Jacobs
Support for the AMD Geode GX2 Processors to Msrtool. It seems to work as it was tested on a Wyse Winterm S50. Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-15Support for the AMD Geode GX2 Nils Jacobs
Processors to Msrtool. It seems to work as it was tested on a Wyse Winterm S50. Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-13indent all of nvramtool to make it fit into coreboot'sStefan Reinauer
coding style Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-11Make qemu use the udelay function in src/pc80/udelay_io.cPatrick Georgi
instead of the equivalent copy in src/cpu/emulation/qemu-x86/northbridge.c. Also, delete the copy. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-08- Makefile.romccboard.inc supports tinybootblock romcc boards, too.Patrick Georgi
- via/epia-cn is a romcc board, not a CAR board. (Thanks Kevin, for the report) - Make emulation/qemu-x86, dell/s1850, via/epia-cn use Makefile.romccboard.inc - New flag: BIG_BOOTBLOCK, which is always the inverse of tinybootblock Suitable for Makefile.inc rules (foo-$(CONFIG_BIG_BOOTBLOCK) += ...) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-07Print (empty) instead of nothing at all for emptyMaciej Pijanka
filename entries (particularily "null" files) Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-06Move fam10 temp files from build/ to build/northbridge/amd/amdfam10/ Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5003 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-06Check for installed compilers (remove .xcompile) at make clean, not distclean.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-06Fix amdht on newer compilers.Patrick Georgi
We were lucky with friendly compilers. Now they're assuming too much. Identified-by: Myles Watson <mylesgw@gmail.com> Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5001 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-06Kconfig builds all boards now.Patrick Georgi
This patch also aligns the configuration of a couple of boards more closely to what newconfig does. Also, the romstrap inc/lds files are declared in the Makefiles of the southbridges they belong to, instead of some global file. AMD CPUs have their own timer functions, so disable UDELAY_IO for them and set HAVE_INIT_TIMER as appropriate, same for emulation/qemu-x86. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-05- Let AMD CAR code pick the right XIP areaRudolf Marek
for tinybootblock - move asus/m2v-mx_se to tinybootblock - Add romstrap for via southbridge to tinybootblock-bootblock Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-05* Explicitly add __PRE_RAM__ where it should be added.Stefan Reinauer
* Don't implicitly add __PRE_RAM__ in romcc. Fixes intel/xe7501devkit Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-04- Fix UDELAY options and HAVE_INIT_TIMER [kconfig]Patrick Georgi
(defaults to UDELAY_IO again, like newconfig) - Use UDELAY_TSC on Via C7 [kconfig] - Support Tinybootblock on Intel CPUs - set XIP location correctly for Tinybootblock on Intel - provide correct XIP location in Tinybootblock configuration - Make kontron/986lcd-m use Tinybootblock - Some kconfig fixes to kontron/986lcd-m [kconfig] Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-04- use LAPIC timer if selected (instead of TSC all the time) [kconfig]Patrick Georgi
- uncomment commented out intel socket [kconfig] - HAVE_MOVNTI is a property of the cpu [kconfig] Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-03improve debug output.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4995 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-31romcc:Patrick Georgi
- Set __PRE_RAM__ define per default - Properly handle ignored (#ifdef'd out) #include lines amd/serengeti_cheetah_fam10: - write ACPI files to $(obj) instead of the top dir (alias $(CURDIR)) tinybootblock: - provide a way to define code that should be added to the bootblock, to map the entire ROM for use by CBFS amd/model_fxx, amd/model_10xxx: - add CONFIG_SSE walkcbfs.S: - eliminate the use of two registers, to make space for romcc to wiggle amd/serengeti_cheetah_fam10: - use the enable_rom framework. not entirely functional yet Boot-tested on emulation/qemu-x86 Build-tested on amd/serengeti_cheetah_fam10 amd/serengeti_cheetah_fam10 fails in amdht/ somewhere, but builds Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-28trival. All the changes is about comment and spaces.Zheng Bao
In superio folder. 1. Delete trailing white spaces. 2. Change the // comment to /* */. 3. Add some copyright header. 4. reindent. 5. delete multi blank lines. I tried my best to find them. If anything left, please fix it or tell me. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23Fix technexion tim5690 build failure - REALMODE option required for x86.c ↵Marc Jones
mainboard function to be built. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23newconfig compilation failed withStefan Reinauer
(.text+0x4989): undefined reference to `vgabios_init' Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23Add mainboard x86emu interrupt function support. Add tim5690 VGA BIOS ↵Libra Li
functions: int15 getting LCD panel ID. Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23Tiny Bootblock, step 1/n.Patrick Georgi
Introduce the tiny bootblock infrastructure and use it on QEmu. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-21make strcmp happy by including string.h (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-21Allow user to specify the size of a newly created cbfs imagePatrick Georgi
to be stated in kilobytes or megabytes. Usage is cbfstool coreboot.rom create 1048576 coreboot.bootblock cbfstool coreboot.rom create 1024k coreboot.bootblock cbfstool coreboot.rom create 1m coreboot.bootblock to get an 1048576 bytes = 1024kb = 1mb image. Kconfig also uses this instead of calculating bytes from kilobytes itself. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-21Make coreboot load VSA from CBFS on amd/gx2.Patrick Georgi
You have to convert the VSA bios image to ELF using the following commands (assuming i386/32bit binutils, if in doubt, use crossgcc's i386-elf-* tools): objcopy --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 vsa.binary vsa.o ld -e 0x60020 --section-start .data=0x60000 vsa.o -o vsa.elf Then, after build, use cbfstool coreboot.rom add-stage vsa.elf vsa l to add it to the image. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-18Clean up amd/dbm690t and kontron/986lcd-m some more (notPatrick Georgi
fully). Also fix the kconfig build for HAVE_ACPI_RESUME. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-18CONFIG_K8_MEM_BANK_B_ONLY and CONFIG_PCIE_CONFIGSPACE_HOLE aren't used ↵Patrick Georgi
_anywhere_, so drop them from view (they could be dropped from newconfig, too - but why bother?) trivial Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-18Filter out some more K8/Fam10 specific options on unrelated boards.Patrick Georgi
Trivial. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-18- speed up board comparison by only building abuild configs, not the wholeStefan Reinauer
target. - use a template for mktemp (fixes OSX error) - convert all numbers to hex to make comparison easier. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-17Make "KBuild report" a bit happierStefan Reinauer
- drop some unused options from "newconfig" - filter some Kconfig only options from the report - drop targets directory of a non existent mainboard. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-17minor bug in the cbfs documentation (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-16Make sure that the h8dmr_fam10 has the proper version string.Ward Vandewege
This is a trivial patch. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-14The drivers for the k8t890 weren't being built. Increased heapsize.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-13crossgcc: Fix MPFR download locationPeter Stuge
We want to download a specific version so fetch it from the right directory. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-10Push VSA into CBFS for amd/lx systems. It's not hooked up toPatrick Georgi
the build system yet, so some additional steps are necessary. It's not that bad, given that the code didn't work before. You have to convert the VSA bios image to ELF using the following commands (assuming i386/32bit binutils, if in doubt, use crossgcc's i386-elf-* tools): objcopy --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 vsa.binary vsa.o ld -e 0x60020 --section-start .data=0x60000 vsa.o -o vsa.elf Then, after build, use cbfstool coreboot.rom add-stage vsa.elf vsa l to add it to the image. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4976 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-06cbfstool: Fill memory allocated in create_cbfs_file() with 0xffPeter Stuge
This should improve programming speed a bit. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-02Trivial fixes for kconfig. They fix all non-fam10 build failures.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-02Trivial fix for kconfig socket 441 (typo was 411) so that d945gclf builds.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-01Eliminate some noise in the output of compareboard on non-K8/Fam10h boardsPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4972 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-01Not all boards cope with automatically sized bootblocks, leading to 4GBPatrick Georgi
images due to the "helpful" 4GB rollover behaviour of ld(1). Back out r4961, something like this should go in eventually, but more completely tested and working. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-01Atom only supports 32bit MTRRs (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-01Trivial. SCH4304 and SCH4307 have the same device id.Zheng Bao
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-30Add support for the SMSC SCH4304 Super I/O.Zheng Bao
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-28Maciej Pijanka tried to get the Biostar M6TLD running, and created a patch forMaciej Pijanka
440lx using the 440bx code as a template. Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-28msrtool: Fix simple breakage in r4964Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4966 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-28msrtool: Add FreeBSD support using /dev/cpuctl ioctl interfaceAndriy Gapon
Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4965 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-28msrtool: Make configure more POSIX sh friendlyAndriy Gapon
Change a few bash-specific constructs to more portable syntax specified by POSIX. After the change the script keeps working with bash interpreter and can also be interpreted by FreeBSD /bin/sh. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-28msrtool: Actually do PREFIX substitution in MakefilePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4963 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-27Eliminate special case id.inc/id.lds in favor of a configuration variable ↵Patrick Georgi
ID_SECTION_OFFSET which is normally set to 0x10 (the current default) and set to 0x80 (the current alternative) where necessary (if romstraps get in the way). For Kconfig, the special case is set per southbridge (as these define the necessity for this workaround), for newconfig it's added to each single board. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-27Let ld(1) calculate the required size for code in the bootblockMaciej Pijanka
automatically. Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-27Really hook up s2850 and s2875. Trivial.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-27Make newconfig and kconfig agree on MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_IDPatrick Georgi
Usually, this means adding values to Kconfig, but in a few cases, adding values to newconfig, too (which doesn't hurt). Also really hook up tyan/s2850 and tyan/s2875 to kconfig, and have them still build. Trivial and stupid kconfig changes, just lots of them. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-26Remove commented out example MSR definitionsPeter Stuge
Now there are definitions for actual MSRs that can be referenced instead. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-26Add the following GeodeLX memory controller MSRsNathan Williams
0x20000018 MC_CF07_DATA 0x20000019 MC_CF8F_DATA 0x2000001a MC_CF1017_DATA 0x2000001b MC_CFPERF_CNT1 0x2000001c MC_PERFCNT2 0x2000001d MC_CFCLK_DBUG Signed-off-by: Nathan Williams <nathan@traverse.com.au> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Nathan Williams <nathan@traverse.com.au> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25Trivial style changes, replace a few C++ type comments, and some code reusePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25This patch is buzzer of TechNexion TIM-5690.Libra Li
I forgot to svn add the speaker.c and speaker.h. Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25This patch is buzzer of TechNexion TIM-5690.Libra Li
Change EARLY_STAGE into __PRE_RAM__. Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25msrtool: Fix Geode LX probe function, Family/Model were swappedPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-21Make the kconfig-style build work in mingw:Patrick Georgi
* use relative paths in ldscript.ld and crt0_includes.h * avoid use of dd(1) in xcompile * build libregex for kconfig, if necessary * work around missing utsname on win32 * unlink targets before rename on win32 * implement (crude) mkstemp for win32 * avoid open/read/close, use fopen/fread/fclose instead * don't free certain data structures in romcc on win32 to avoid crashes (likely use-after-free()) * handle "\CRLF" and win32 style absolute paths (X:/ or X:\) in romcc * make lzma (part of cbfstool) build on XP * implement ntohl/htonl on win32 * handle CRLF in awk script * set larger stack for romcc on win32 Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-21Add GLCP_SYS_RSTPLL MSR defines for GeodeLXPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Nathan Williams <nathan@traverse.com.au> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-19Trivial fix for tyan/s2912 to build. Remove overspecified options in Config.lb.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-18Update amdk8/util.c since __PRE_RAM__. Make node & link more unique.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-18This is a patch to control the DIP switch and digital I/O.Libra Li
Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-17Silence two warnings. Only use the Qemu hard-coded address for VGA devices.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-17Initialize memory before using it. put_bits wants it that way.Patrick Georgi
Trivial. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-16msrtool: Add comment with DirectIO URL to the code where it is used.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-14Fix manual (non-kconfig) build of the following boards, due toUwe Hermann
missing renames of CONFIG_HAVE_PIRQ_TABLE to CONFIG_GENERATE_PIRQ_TABLE: - iwill/dk8s2 - iwill/dk8x - emulation/qemu-x86 - iei/juki-511p - tyan/s1846 - msi/ms7135 - arima/hdama Build-tested for the QEMU target and IEI JUKI-511P. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4944 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-13Complete the Kconfig of socket_AM2r2.Zheng Bao
This patch is from socket_F_1207, even though the fam10 can not be "make menuconfig"ed currently. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-12Cosmetics (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-12Print size of file on cbfs_add_file failure. The size of the file afterMyles Watson
compression is nice to know. Trivial Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-12Adapt ROM_IMAGE_SIZE, too. ROMBASE should probably be definedPatrick Georgi
by ROM_IMAGE_SIZE (so ROM_IMAGE_SIZE + ROMBASE - 4GB == 0), but that's for another patch. Should fix the issues created by the bootblock cleanup patch. Build tested on kontron/986lcd-m, trivial change. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-12Add CONFIG_WARNINGS_ARE_ERRORS and set it for qemu.Myles Watson
Remove all remaining warnings from qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-12Trivial debug print format string fix for romcc.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4938 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-12Get rid of the ugly warning the right way.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4937 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-11Revert my too-hasty commit.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4936 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-11Silence an ugly-looking warning. Two casts were not enough, so just don't castMyles Watson
it. Trust the option_table generator to get the length correct. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-11Rework bootblock size handling:Patrick Georgi
- don't pretend to create a bootblock as large as the ROM in Kconfig (it's 64k at most) - don't pretend to accept a bootblocksize value in cbfstool create (it ignored it) - patch up the build systems to keep it working Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4934 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-11Help track down enable_rom issues in CBFS. If the magicPatrick Georgi
looks like unmapped memory, point to the wiki page with more information. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-10* Simplify acpi_add_tableStefan Reinauer
* fix some comments * Simplify ACPI wakeup code and make it work without a memory hole * Add resume entries to global GDT so we don't need our own for resume. * add ECDT description to acpi.h for anyone who might need it ;-) * remove rather stupid math to get the right number of MAX_ACPI_TABLES and just define a reasonable maximum for now. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-09Add detection and dump support for the Winbond WPCD376I.Sean Young
Signed-off-by: Sean Young <sean@mess.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-09Enable Multiboot table support (for GRUB2) by default.Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Robert Millan <rmh.grub@aybabtu.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-09Add a "locate" function cbfstool, which helps you findPatrick Georgi
out a suitable address to put a XIP stage to. Specifically, you pass it the file (to get its filesize), its filename (as the header has a variable length that depends on it), and the granularity requirement it has to fit in (for XIP). The granularity is MTRR-style: when you request 0x10000, cbfstool looks for a suitable place in a 64kb-aligned 64kb block. cbfstool simply prints out a hex value which is the start address of a suitably located free memory block. That value can then be used with cbfs add-stage to store the file in the ROM image. It's a two-step operation (instead of being merged into cbfs add-stage) because the image must be linked twice: First, with some bogus, but safe base address (eg. 0) to figure out the target address (based on file size). Then a second time at the target address. The work flow is: - link file - cbfstool locate - link file again - cbfstool add-stage. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-09These are post codes for TIM-5690 LED debug message.Libra Li
Signed-off-by: Libra Li <libra.li@technexion.com> Added object reference to Config.lb, too and Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Remove drivers/pci/onboard. The only purpose was for option ROMs, which areMyles Watson
now handled more generically using CBFS. Simplify the option ROM code in device/pci_rom.c, since there are only two ways to get a ROM address now (CBFS and the device) and add an exception for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Remove some white space and comment differences from devicetree.cb and Config.lbMyles Watson
files. These boards have non-trivial differences: gigabyte/m57sli kontron/986lcd-m dell/s1850 via/epia-m700 Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.Uwe Hermann
Since we have CBFS setting rom_address in board files is no longer necessary. Also, drop vga_rom_address from RS690 completely, it was never used in the code. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Revert the deletion of drivers/pci/onboard that snuck in ahead of its time. Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Split the two usages of __ROMCC__:Myles Watson
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them." __PRE_RAM__ means "Use simpler versions of functions, and no device tree." There are probably some places where both are tested, but only one is needed. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Remove hard coded bus numbers from arima/hdama mptable code and fix warnings.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 11:08:43 +0000