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2007-10-16Convert the existing it8716f_* functions to generic_spi_* functions byCarl-Daniel Hailfinger
applying abstraction and wrapping. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Add resource size and resource granularity reporting to device_util.c.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Fix the detection for the Winbond W83697SF. Unfortunately the revisionUwe Hermann
has a slightly different format than that of the W83697UF/UG so we have to hack around it a bit. This patch has been verified to work on real hardware by Idwer Vollering <idwer_v@hotmail.com> on IRC (thanks!). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Dump support for the Winbond W83977TF.Idwer Vollering
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Completely rip out / replace the ASUS P2B code (which wasn't really working),Uwe Hermann
replacing it with a minimal, but working, framework which will be expanded. Drop a bunch of useless and duplicated files, add missing license headers. I'm self-acking it this time, the diff is a huge unreadable mess and the old code is broken anyway... This code is tested to build fine, and can boot a Linux kernel up to a login-prompt via FILO (IDE). This is verified on actual hardware. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15(forgot to add spi.c)Carl-Daniel Hailfinger
Move SPI code out of board_enable.c where it started its life. The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15Move SPI code out of board_enable.c where it started its life. The SPICarl-Daniel Hailfinger
chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15This patch adds support for the Mobile Intel Celeron CPU (Micro-FC-BGA)Joseph Smith
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15Fix stupid thinko in the Winbond detection code which prevented someUwe Hermann
of the Winbond chips from being detected (trivial fix). This is verified on real hardware and works fine now. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-14Add dump support for the NSC PC8374L (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-14Fix the resource end in amdk8/northbridge.c.Rudolf Marek
Without this bugfix, the resource for the PCI/ISA video memory at 0xa0000 - 0xbffff is too big, i.e. it goes up to 0xcffff instead of just 0xbffff as it should. Here's the diff from two runs of the tool from http://www.linuxbios.org/pipermail/linuxbios/2007-June/022449.html on the MSI MS-7260 (K9N Neo), with and without the bugfix. After applying, the resource size is correct again. --- dumpres_lb_pci_vgacard_without_resfix.txt +++ dumpres_lb_pci_vgacard_with_resfix.txt @@ -11,7 +11,7 @@ MMIO map: #2 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0 MMIO map: #3 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0 MMIO map: #4 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0 -MMIO map: #5 0x00000a0000 - 0x00000cffff Access: R/W Dstnode:0 DstLink 0 +MMIO map: #5 0x00000a0000 - 0x00000bffff Access: R/W Dstnode:0 DstLink 0 MMIO map: #6 0x00fc000000 - 0x00fd1fffff Access: R/W Dstnode:0 DstLink 0 MMIO map: #7 0x00fd200000 - 0x00fd1fffff Access: R/W Dstnode:0 DstLink 0 MMIO map: #0 0x000000 - 0x003fff Access: R/W ISA VGA Dstnode:0 DstLink 0 Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2853 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-13Set the superiotool version number from svn at build time.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2852 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-13Dump support for the SMSC LPC47N227.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-12Changes to flashrom to support the K8N-NEO3, first tested at Google on GSOC ↵Ronald G. Minnich
day :-) Also minor changes to remove tab-space combinations where possible. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <david.hendricks@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> Index: jedec.c =================================================================== --- jedec.c (revision 2847) +++ jedec.c (working copy) @@ -281,7 +281,7 @@ // dumb check if erase was successful. for (i = 0; i < total_size; i++) { if (bios[i] != (uint8_t) 0xff) { - printf("ERASE FAILED\n"); + printf("ERASE FAILED @%d, val %02x\n", i, bios[i]); return -1; } } Index: board_enable.c =================================================================== --- board_enable.c (revision 2847) +++ board_enable.c (working copy) @@ -153,7 +153,8 @@ return 1; } /* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note: - We can't use writecnt directly, but have to use a strange encoding */ + * We can't use writecnt directly, but have to use a strange encoding + */ outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port); do { busy = inb(port) & 0x80; @@ -202,43 +203,39 @@ /* * Helper functions for many Winbond Super I/Os of the W836xx range. */ -#define W836_INDEX 0x2E -#define W836_DATA 0x2F - /* Enter extended functions */ -static void w836xx_ext_enter(void) +static void w836xx_ext_enter(uint16_t port) { - outb(0x87, W836_INDEX); - outb(0x87, W836_INDEX); + outb(0x87, port); + outb(0x87, port); } /* Leave extended functions */ -static void w836xx_ext_leave(void) +static void w836xx_ext_leave(uint16_t port) { - outb(0xAA, W836_INDEX); + outb(0xAA, port); } /* General functions for reading/writing Winbond Super I/Os. */ -static unsigned char wbsio_read(unsigned char index) +static unsigned char wbsio_read(uint16_t index, uint8_t reg) { - outb(index, W836_INDEX); - return inb(W836_DATA); + outb(reg, index); + return inb(index+1); } -static void wbsio_write(unsigned char index, unsigned char data) +static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data) { - outb(index, W836_INDEX); - outb(data, W836_DATA); + outb(reg, index); + outb(data, index+1); } -static void wbsio_mask(unsigned char index, unsigned char data, - unsigned char mask) +static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask) { - unsigned char tmp; + uint8_t tmp; - outb(index, W836_INDEX); - tmp = inb(W836_DATA) & ~mask; - outb(tmp | (data & mask), W836_DATA); + outb(reg, index); + tmp = inb(index+1) & ~mask; + outb(tmp | (data & mask), index+1); } /** @@ -248,37 +245,80 @@ * - Agami Aruma * - IWILL DK8-HTX */ -static int w83627hf_gpio24_raise(const char *name) +static int w83627hf_gpio24_raise(uint16_t index, const char *name) { - w836xx_ext_enter(); + w836xx_ext_enter(index); /* Is this the w83627hf? */ - if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */ + if (wbsio_read(index, 0x20) != 0x52) { /* Super I/O device ID register */ fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n", - name, wbsio_read(0x20)); - w836xx_ext_leave(); + name, wbsio_read(index, 0x20)); + w836xx_ext_leave(index); return -1; } /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */ - wbsio_mask(0x2B, 0x10, 0x10); + wbsio_mask(index, 0x2B, 0x10, 0x10); - wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2 */ + wbsio_write(index, 0x07, 0x08); /* Select logical device 8: GPIO port 2 */ - wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */ + wbsio_mask(index, 0x30, 0x01, 0x01); /* Activate logical device. */ - wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */ + wbsio_mask(index, 0xF0, 0x00, 0x10); /* GPIO24 -> output */ - wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ + wbsio_mask(index, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ - wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */ + wbsio_mask(index, 0xF1, 0x10, 0x10); /* Raise GPIO24 */ - w836xx_ext_leave(); + w836xx_ext_leave(index); return 0; } +static int w83627hf_gpio24_raise_2e(const char *name) +{ + return w83627hf_gpio24_raise(0x2d, name); +} + /** + * Winbond W83627THF: GPIO 4, bit 4 + * + * Suited for: + * - MSI K8N-NEO3 + */ +static int w83627thf_gpio4_4_raise(uint16_t index, const char *name) +{ + w836xx_ext_enter(index); + /* Is this the w83627thf? */ + if (wbsio_read(index, 0x20) != 0x82) { /* Super I/O device ID register */ + fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n", + name, wbsio_read(index, 0x20)); + w836xx_ext_leave(index); + return -1; + } + + /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */ + + wbsio_write(index, 0x07, 0x09); /* Select logical device 9: GPIO port 4 */ + + wbsio_mask(index, 0x30, 0x02, 0x02); /* Activate logical device. */ + + wbsio_mask(index, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */ + + wbsio_mask(index, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */ + + wbsio_mask(index, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */ + + w836xx_ext_leave(index); + + return 0; +} + +static int w83627thf_gpio4_4_raise_4e(const char *name) +{ + return w83627thf_gpio4_4_raise(0x4E, name); +} +/** * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs. * * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there. @@ -335,12 +375,12 @@ pci_write_byte(dev, 0x59, val); /* Raise ROM MEMW# line on Winbond w83697 SuperIO */ - w836xx_ext_enter(); + w836xx_ext_enter(0x2E); - if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */ - wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */ + if (!(wbsio_read(0x2E, 0x24) & 0x02)) /* flash rom enabled? */ + wbsio_mask(0x2E, 0x24, 0x08, 0x08); /* enable MEMW# */ - w836xx_ext_leave(); + w836xx_ext_leave(0x2E); return 0; } @@ -487,9 +527,11 @@ {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, "gigabyte", "m57sli", "GIGABYTE GA-M57SLI", it87xx_probe_serial_flash}, {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise}, + "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e}, + {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, {0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000, - "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise}, + "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, @@ -509,8 +551,8 @@ * Match boards on LinuxBIOS table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ -static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, - char *part) +static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, + char *part) { struct board_pciid_enable *board = board_pciid_enables; @@ -525,10 +567,11 @@ continue; if (board->second_vendor && - !pci_dev_find(board->second_vendor, board->second_device)) + !pci_dev_find(board->second_vendor, board->second_device)) continue; return board; } + printf("NOT FOUND %s:%s\n", vendor, part); return NULL; } @@ -545,20 +588,20 @@ continue; if (!pci_card_find(board->first_vendor, board->first_device, - board->first_card_vendor, - board->first_card_device)) + board->first_card_vendor, + board->first_card_device)) continue; if (board->second_vendor) { if (board->second_card_vendor) { if (!pci_card_find(board->second_vendor, - board->second_device, - board->second_card_vendor, - board->second_card_device)) + board->second_device, + board->second_card_vendor, + board->second_card_device)) continue; } else { if (!pci_dev_find(board->second_vendor, - board->second_device)) + board->second_device)) continue; } } @@ -582,7 +625,7 @@ if (board) { printf("Found board \"%s\": Enabling flash write... ", - board->name); + board->name); ret = board->enable(board->name); if (ret) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-11Superiotool manpage/documentation improvements (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-11Set the default video memory to 0 MB for all GX1 boards which don't yetUwe Hermann
use that feature in order to not waste RAM. Also, add missing CONFIG_VIDEO_MB for the eaglelion/5bcm, which should fix the build for that board. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-10Revert my last cleanup patch.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-10Cosmetic changes to make the flashrom output more consistent (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-10This patch adds the CONFIG_VIDEO_MB option to boards thatCorey Osgood
currently don't have it but need it to compile with the new Geode GX1 VGA support. This sets the size at 4MB, which was the size previously defined in the VGA code. Signed-off-by: Corey Osgood <corey.osgod@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-09Minor cosmetic changes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-09Add support for the BCOM WinNET100 (used in the IGEL-316 thin client).Juergen Beisert
See http://www.linuxbios.org/BCOM_WINNET100_Build_Tutorial for hardware description and build tutorials. Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08Fixup a register dump attached to the wrong Super I/O. Seems somethingUwe Hermann
went wrong in one of the recent commits. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08Add detection support for lots more SMSC Super I/Os (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Make the reserved video memory on Geode GX1 based systems configurable.Juergen Beisert
This makes sense on systems with small memories when the VGA feature is not used (CONFIG_VIDEO_MB = 0 in this case). On Geode GX1 based systems the following amount of memory should be reserved when VGA support is enabled: - 1MiB for VGA and SVGA resolutions - 2MiB for XGA resolution - 4MiB for SXGA resolution Signed-off-by: Juergen Beisert <juergen127@kreuzholzen.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2840 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Add missing '\n' to a printk_debug() and some other small fixesUwe Hermann
while I'm at it (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Some more ITE chips and small fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Detection support for a bunch of NSC Super I/Os (trivial).Uwe Hermann
Also, dump support for the NSC PC87351. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2837 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Fix some issues with spaces in the code and Doxygen style documentation.Juergen Beisert
Painting the splash graphic is now ifdef'ed. Signed-off-by: Juergen Beisert <juergen127@kreuzholzen.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2836 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Print a short message if no Super I/O chip could be detected (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Add a list of contributors to the README (trivial). Also, a small hintUwe Hermann
about where to send additional register dumps. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2834 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Add dump support for the Winbond W83627THF/THG.David Hendricks
Signed-off-by: David Hendricks <david.hendricks@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Add a manpage for superiotool (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2832 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Dump support for the SMSC FDC37B72x.Robinson P. Tryon
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Dump support for the SMSC FDC37B78x.Robinson P. Tryon
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Dump support for the SMSC FDC37M81x.Robinson P. Tryon
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05Add dump support for the Winbond W83627HF/F/HG/G.Rasmus Wiman
Signed-off-by: Rasmus Wiman <rasmus@wiman.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05This patch will add support for the Geode GX1/CS5530 VGA feature. It's ableJuergen Beisert
to set up one of five screen resolutions (sorry no autodetection at runtime, resolution is selected at buildtime) and displays a graphic in the right bottom corner (splash screen). Signed-off-by: Juergen Beisert <juergen127@kreuzholzen.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2827 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05Add dump support for the SMSC LPC47M10x (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2826 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05Add dump support for the ITE IT8661F. Note that this chip will not yetRobinson P. Tryon
be detected, as it needs a non-standard init sequence. Minor other fix: Drop incorrect 0x2b from LDN 5 of the ITE IT8705F. Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2825 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04Add some more Winbond chips (trivial).Uwe Hermann
Add notes which IDs were taken from sensors-detect (as where we lack datasheets, thus cannot verify them) and which we support but sensors-detect does not (yet). I'll post patches on the lm-sensors list to sync up the detected chips between superiotool and sensors-detect. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04Add detection support for the LPC47B387 (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04Add dump support for the ITE IT8705F/AF.Robinson P. Tryon
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 * Convert the NSC code to the common code structure all other Super I/Os use.Uwe Hermann
* Improve the --verbose output a bit more. Print the "Probing..." text for all Super I/Os and if a Super I/O is not known, show the data we were able to read from the chip (what data this is is very vendor/chip specific). * Thus the common no_superio_found() is dropped, it's not useful. The "read from 0x20" part was wrong for all Super I/Os other than the NSC ones anyway. * Winbond: For the 'olddevid' only use bits 3..0, mask away the others. * SMSC: Print which ID registers we try to read (in --verbose mode). * Minor cosmetic fixes. * Rename PC8374 to PC8374L (as per datasheet). * Rename probe_idregs_simple() to probe_idregs_nsc(). * Rename dump_readable_ns8374() to dump_readable_pc8374l(). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04[FLASHROM] Fix the help, and print a message when nothing happensJordan Crouse
The help implied that writes happen by default, which they don't. Fix the text, and say something when we dont specify any commands. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2820 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-03Add a copy of the GPL (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-02Print superiotool version when run with --verbose.Robinson P. Tryon
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-02This patch aims to restructure SPI flash support in a more reasonableCarl-Daniel Hailfinger
way. It introduces a generic SPI host driver for the IT8716F Super I/O which will enable easy SPI programming without having to care for the peculiarities of the SPI host. To activate probing for the IT8716F, you have to use the gigabyte:m57sli mainboard override. SPI support will then use the gathered SPI host data to access the SPI flash. This has been tested sucessfully by Ward Vandewege <ward@gnu.org> on the GA-M57SLI v2.0, which has a MX25L4005 SPI flash part. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2817 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-01Thee lines in i82801xx_pci.c need to be removed. They cause theJoseph Smith
i82801DB to reset. See this thread for more info: http://article.gmane.org/gmane.linux.bios/26791 Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2816 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-01De-uglify the --version output (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28Random minor fixes. Use svn revision as superiotool version number.Uwe Hermann
Make the -V output more informative. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2814 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28Add support for some more Fintek chips and an ALi chip.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28Fix up the SMSC detection code to probe _both_ old- and new-styleUwe Hermann
Super I/Os from SMSC. Otherwise not all of them are detected (and there could theoretically be _two_ of them in a system, so we should probe for both types anyway). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-27Add preliminary SPI flash identification support for SPI chips attachedCarl-Daniel Hailfinger
to ITE IT8716F Super I/O. Right now this is hardcoded to the Gigabyte M57SLI board. It works only with rev 2.0 of the board, but it will bail out on earlier versions, so no damage can occur. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2811 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-26Don't arbitrarily enable PERR# and SERR# for PCI devices. Marc Jones
It is platform specific. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-26Add detection support for lots more Winbond Super I/Os (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-26Dump support for the Fintek F71805 (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-25As per suggestion from Yinghai Lu <yinghailu@gmail.com> this patchUwe Hermann
fixes the problems with PCI add-on cards not being detected or initialized on MCP55-based systems (PCI bridge decoding change). I have tested this on the MSI MS-7260 (K9N Neo) with a PCI VGA card, which worked fine in any of the three PCI slots. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2807 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24Detection support for the Winbond W83627HF (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2806 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24Fix compilation warning.Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2805 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24Various cosmetic changes and coding style fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2804 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24Add detection support for quite a number of SMSC Super I/Os. Also, addUwe Hermann
dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-23Minor fixes/improvements in the Fintek code (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-22Fix another, similar typo as in r2800 (trivial).Uwe Hermann
Reported by Robert Millan. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2801 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-22Fix typo which causes build error if CK804_USE_NIC is set (trivial).Uwe Hermann
This is tested with abuild so shouldn't break anything. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-22Add SiS device IDs for further update.Morgan Tsai
Signed-off-by: Morgan Tsai <my_tsai@sis.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2799 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21Fix abuild for the MSI MS-7260 (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21Add support for the MSI MS-7260 (K9N Neo) mainboard.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21Add register dump capability for ITE IT8718F (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20Add -D / --dump-readable option which prints the Super I/O registerUwe Hermann
contents in human-readable form (e.g. "COM1 enabled" etc.) instead of the hex-table format from -d / --dump. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20Decouple the ITE code from fintek.c, it doesn't belong there.Uwe Hermann
Add common 'enter configuration mode' function for most Winbond/Fintek/ITE chips which use the 0x87 0x87 sequence for that reason. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20Fix up and generalize the ITE IT8708F code. It was only working out ofUwe Hermann
pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20The s2891 ships with a 1MB rom chip. The targets/tyan/s2891/Config.lb file ↵Ward Vandewege
assumes a 1MB rom chip. Hence the default position for the VGA bios should also assume a 1MB rom chip, instead of a 512KB chip. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20Superiotool: Add dump support to the Winbond W83697HF/F.Uwe Hermann
Minor coding style changes and code simplifications. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Implement usage for --help and put the same information into the README, too.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for the Winbond W83697HF/F and W83627EHF/EF/EHG/EG.Uwe Hermann
Various minor fixes and improvements (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Further code simplifications and improvements.Uwe Hermann
Add command line option handling code. The following options are defined at the moment: -d|--dump Dump Super I/O registers. -V|--verbose Verbose mode. -v|--version Show the superiotool version. -h|--help Show a short help text. Per default (no options) we just probe for a Super I/O and print its vendor, name, ID, version, and config port. Example: $ ./superiotool Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0 $ ./superiotool -d Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 $ ./superiotool -s ./superiotool: invalid option -- s $ ./superiotool -h Usage: superiotool [-d] [-V] [-v] [-h] $ ./superiotool -v superiotool 0.1 Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Sorry, I mixed up two patches. Reverting this change.Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon needUwe Hermann
them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Use uint16_t and friends where appropriate (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18Make the code a bit more generic (trivial). Different Super I/OsUwe Hermann
use different config ports. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2782 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18Superiotool: Add support for the SMSC FDC37N769.Uwe Hermann
Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18Add a README for superiotool (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2780 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16Split out a dump_superio() function from ite.c, and make it slightly moreUwe Hermann
generic, so that we can use it for other Super I/Os, too. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16Make 'struct superio_registers' globally available, pretty muchUwe Hermann
all Super I/Os can (and should!) use this (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16Split up superiotool.c into multiple source files, one per vendor.Uwe Hermann
As there will be lots more supported Super I/Os soon, the file is really getting way too big... Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-14More range for HT_CHAIN_UNITID_BASE and HT_CHAIN_END_UNITID_BASE.Yinghai Lu
For example: in C51/MCP55 or C51/MCP51 Will allow 1. C51 at 0x10 to 0x14, and MCP at 0 to 4 2. C51 at 1 to 4, and MCP at 7 to 0x0a The reason is c51/mcp51/mcp55 reported unitid is 0x0f (far beyond it needed), and will prevent us from putting them on bus 0. Typical values for c51/mcp55 or c51/mcp51: HT_CHAIN_UNITID_BASE = 0x10 # for C51 HT_CHAIN_END_UNITID_BASE = 0 # for mcp If only have mcp with c51, HT_CHAIN_UNITID_BASE = 0 # for MCP #HT_CHAIN_END_UNITID_BASE = 0 # default value 0x20 Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-14This is a full rewrite of all the CS5530/CS5530A code. The previous code wasUwe Hermann
mostly undocumented, had a broken coding style, contained lots of dead code and had several other problems, e.g. it enabled write access to the ROM (why?), it unconditionally enabled primary/secondary IDE (which should have a config option) and that even _twice_ (which is um... wrong). The new code - has 'ide0_enable' and 'ide1_enable' config options (which actually work) to enable/disable the primary/secondary IDE interface in Config.lb. - Does _not_ enable write access to the ROM (or is there some good reason to do that? If so, it should at least have a config option). - Contains a bit more documentation. - Uses readable (and documented) #defines instead of hardcoded magic values. - aaand... it actually compiles ;-) Yep, that's right. The previous code wouldn't even build, as it hadn't been fully ported from v1 (still used v1 functions which are simply not available in v2). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13I still don't understand a word, but I tried to improve the documentation. ↵Stefan Reinauer
(trivial) Please fix this if you can. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13Fix abuild run of the MSI MS-6178 (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13Add a common/global failover.c file which can be used by allUwe Hermann
(or at least most) mainboards. This should put and end to copy-paste'ing the same file again and again for every mainboard. Fix the build for the MSI MS-6178 target (wrong location of the common failover.c file). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-12Add initial support for the Intel 810 based board MSI MS-6178.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-11Change out/in combinations to pci_read/write_byte inAlex Beregszaszi
sis630 chipset enable. Signed-off-by: Alex Beregszaszi <alex@rtfs.hu> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2770 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Remove useless 'extern' keywords (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2769 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Add '(C)' where it's missing (for consistency reasons).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Add missing license header to udelay.c.Uwe Hermann
I'm self-ack'ing this, as the origin of the code in udelay.c (and thus the license and copyright owner) is pretty clear. The code which is now in udelay.c was split out from flash_rom.c in r1428, and flash_rom.c, in turn, has been around since the beginning and had a 'Copyright 2000 Silicon Integrated System Corporation' line as well as the usual GPLv2-or-later license header. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2767 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Partial changes and fixup.Ronald G. Minnich
Removed reset.c and added copyright headers. Remove debug.c. It is not used and should not be here. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2766 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-08Welcome to PC Engines and the ALIX 1C!Ronald G. Minnich
This is a geode LX board. There are timing settings that are not right yet, we are still trying to get our board to boot Linux :-) Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-08Add a copy of the GPL in the flashrom repository as it's an independentUwe Hermann
project (being packaged by distros, among other things). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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