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AgeCommit message (Expand)Author
2011-06-04Port persimmon r6584 and r6601 to e350m1: SPI prefetch earlyMarshall Buschman
2011-06-04Port persimmon r6583 to e350m1: pstate 0 earlyMarshall Buschman
2011-06-04Port persimmon r6582 to e350m1: 33 MHz SPI read earlyMarshall Buschman
2011-06-04Port persimmon r6578 and r6596 to e350m1: MMCONF basePeter Stuge
2011-06-04Port persimmon r6574 to e350m1: MMCONF sizeMarshall Buschman
2011-06-04Port persimmon r6573 to e350m1: VGA, PCI MMIO and SB800 legacyMarshall Buschman
2011-06-04Port persimmon r6572 to e350m1: I/O APIC IDMarshall Buschman
2011-06-04vt8237r: Simplify bootblock init to work around nested if() romcc problemPeter Stuge
2011-06-03This patch sets max freq defaults for ddr2 and ddr3for fam10.Marc Jones
2011-06-03Correct wrong PCI ID for VIA K8M890 Chrome.Alexandru Gagniuc
2011-06-03advansus/a785e-i mainboard enable warning as errorKerry She
2011-06-01Really fix iasl filename issues in our build systemPatrick Georgi
2011-06-01Report build result from abuild (did all requested boards build?)Patrick Georgi
2011-06-01trivial remove blanks at the end of lineKerry She
2011-06-01This patch fix a AMD sb800 wrapper compile warning:Kerry She
2011-05-23We don't have pausing versions of single-IO instructions.Stefan Reinauer
2011-05-23AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards.Stefan Reinauer
2011-05-23Correct implementation of r6608.Jonathan Kollasch
2011-05-23exclude src/vendorcode from GPLv2 license checks.Stefan Reinauer
2011-05-22Ensure ck804 romstrap is 16-byte aligned.Jonathan Kollasch
2011-05-21Add regression test for build directory handling to make lint targetPatrick Georgi
2011-05-20Handle absolute source file pathsPatrick Georgi
2011-05-20Handle both cases, obj being absolute and relativePatrick Georgi
2011-05-20Fix building with relative path to object directory outside the source treePatrick Georgi
2011-05-20iasl still can't cope with extra "." in file pathsPatrick Georgi
2011-05-20Fix ccache behaviour if more than one ccache in PATHPatrick Georgi
2011-05-20Correct amd persimmon romstage code for early SPI prefetch enable.Scott Duplichan
2011-05-20Move the ACPI FACP table to the front of the RSDT list. This is done to work ...Scott Duplichan
2011-05-16Move crossgcc rules to coreboot specific MakefilePatrick Georgi
2011-05-16Add crossgcc target to automatically build reference toolchainCristian Magherusan-Stanciu
2011-05-16cimx_wrapper/sb800: Fix indent in late.c:sb800_enable()Peter Stuge
2011-05-15Remove multiple mmconf settings and just use kconfig setting.Marc Jones
2011-05-15agesa_wrapper: Avoid repetitive Kconfig depends, trivialPeter Stuge
2011-05-15Cosmetic cleanup.Scott Duplichan
2011-05-151) Remove unused kconfig options.Scott Duplichan
2011-05-15Update gpp port configuration.Scott Duplichan
2011-05-15Enable rom cache early to reduce boot time.Scott Duplichan
2011-05-15Fix memory allocation problem in amdInitLate. Disabled until further debug.Scott Duplichan
2011-05-15Remove some non-essential agesa options to reduce boot time.Scott Duplichan
2011-05-15Declare legacy video frame buffer so that Windows generic VGA driver will work.Scott Duplichan
2011-05-15Declare RTC as not PIIX4 compatible to match AMD hardware.Scott Duplichan
2011-05-15Make fadt revision match its length. Solves Windows 7 checked build assert.Scott Duplichan
2011-05-15Enable SPI cacheline prefetch early to reduce boot time.Scott Duplichan
2011-05-15Enable SPI cacheline prefetch early to reduce boot time.Scott Duplichan
2011-05-15Switch processor cores to pstate 0 early to reduce boot time.Scott Duplichan
2011-05-15Enable 33 MHz fast mode SPI read early to reduce boot time.Scott Duplichan
2011-05-15Build device paths for AP cores so that coreboot will report them to the OS.Scott Duplichan
2011-05-15Program the I/O APIC ID.Scott Duplichan
2011-05-15Enable AHCI mode and hide IDE controller to reduce boot time.Scott Duplichan
2011-05-15Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.Scott Duplichan
2011-05-15Fix ACPI shutdown function by removing reliance on SMI.Scott Duplichan
2011-05-15Configure CIMx to use 33 MHz fast mode for SPD read.Scott Duplichan
2011-05-15Match DIMM SPD addressing to implemented slots.Scott Duplichan
2011-05-15Size mmconf according to CONFIG_MMCONF_BUS_NUMBER.Scott Duplichan
2011-05-151) Use D18F1xF4 VGA Enable to simplify legacy video I/O support.Scott Duplichan
2011-05-151) Set I/O APIC ID according to BKDG recommendationScott Duplichan
2011-05-15Correct the number of MCA error reporting banks cleared.Scott Duplichan
2011-05-151) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization.Scott Duplichan
2011-05-13siemens/sitemp_g1p1: Adapt read_option() to latest changesJosef Kellermann
2011-05-12Remove uart_init() in Siemens sitemp-g1p1Patrick Georgi
2011-05-11Add Siemens SITEMP-G1 boardJosef Kellermann
2011-05-11Work around unclean CMOS handling for nowPatrick Georgi
2011-05-10Change read_option() to a macro that wraps some API uglynessPatrick Georgi
2011-05-10This replaces the fixed shift values in the apic timer init with macros.Vikram Narayanan
2011-05-10Fix compilation error due to non-unix style line endings in cmos.layout file ...Patrick Georgi
2011-05-09Adds RS740 HT and internal graphics PCI ids.Ivaylo Valkov
2011-05-07ADVANSUS A785E-I Mainboard support, Family10h ASB2, RS880(RS785E) + SB820 pla...Kerry She
2011-05-07RS780 DDI Lanes configure support,Kerry She
2011-05-07SB800 CIMX code can share the AGESA V5 lib code,Kerry She
2011-05-071. move _mm_clflush_fs() to __SSE3__ block, because __builtin_ia32_sfence() i...Kerry She
2011-05-07put the amdlib and agesa constant to .rodata segment.Kerry She
2011-05-05Adds VOID to empty parameter lists to get rid of some build warnings.Frank Vibrans
2011-05-05Remove AMD Agesa requirement for standard include filesFrank Vibrans
2011-05-03Enable caching for ROM area in model_6ex/cache_as_ram.incSven Schnelle
2011-05-03i82801gx: enable SPI prefetchingSven Schnelle
2011-05-02Add option 'compress ramstage'Sven Schnelle
2011-04-30Sorry, my mistake.Scott Duplichan
2011-04-30git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6550 2b7e53f0-3cfb-0310-b3e...Scott Duplichan
2011-04-28Thinkpad: Enable Battery eventsSven Schnelle
2011-04-27X60: enable Ultrabay if device is plugged inSven Schnelle
2011-04-27T60: enable Ultrabay if device is plugged inSven Schnelle
2011-04-27Lenovo PMH7: add pmh7_ultrabay_power_enable()Sven Schnelle
2011-04-27Lenovo H8: add h8_ultrabay_device_present()Sven Schnelle
2011-04-26Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as anStefan Reinauer
2011-04-22Add (partly) support for Nuvoton NCT6776FStefan Reinauer
2011-04-22cosmetic changes to superiotool's nuvoton codeStefan Reinauer
2011-04-22Fix of fix copy and paste errors in ne2k.c (r6512 by stepan)Rudolf Marek
2011-04-22fix typo ttys0_index -> b_indexStefan Reinauer
2011-04-22Get rid of all but one (I/O mapped) UART init functions.Stefan Reinauer
2011-04-22The UART divider should be calculated based on the base frequencyStefan Reinauer
2011-04-21more ifdef -> if fixes.Stefan Reinauer
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-21some ifdef --> if fixesStefan Reinauer
2011-04-20drop dead code from sb800 bootblockStefan Reinauer
2011-04-20drop excessive newline in uart8250.cStefan Reinauer
2011-04-20Simplify coreboot's console/console.hStefan Reinauer
2011-04-20run uart_init() from console_init, just like the other console initialization...Stefan Reinauer
2011-04-20Add Lenovo ThinkPad T60Sven Schnelle
2011-04-20PC87384: remove unused init functionSven Schnelle
2011-04-20pci1x2x: remove latency/bridge control/cacheline size settingsSven Schnelle
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