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2009-08-11Don't pull in x86emu from a foreign directory anymore. ThisStefan Reinauer
produced numerous problems in the past, including the fact that x86emu doesn't work in v3 anymore even though it lives in the v3 repository. Since this is a cross-repository move, keeping the history in the v2 tree would make life hard for everone. So check the v3 repository for x86emu history since the merger. The his commit is based on an svn export of r1175 of the coreboot-v3 repository. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-11Enable CBFS everywhere. All boards compiled for me (abuild tested),Patrick Georgi
and we will fix issues as they appear. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-11cpu/amd/model_lx used its own routine for copying coreboot_ram. ThisPatrick Georgi
change makes it use the generic infrastructure. NOTE: If you're bisecting issues on geode-lx circa jumping to coreboot_ram, this change has a high probability to break that place - so look into it. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4530 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-11The code between #if and #endif is only about UMA mode. The CONFIG_GFXUMA ↵Zheng Bao
should be 1. We have another mode called side port mode. It is When the CONFIG_GFXUMA is 0. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4525 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-06fix for the case that CONFIG_TTYS0_DIV is defined in mainboard's Config.lbStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-05fix buggy comment in libpayload's strncat functionStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4499 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-05Add some more CONFIG_* prefixes that were missing.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4497 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-05Prepare for kconfig: Rename COREBOOT_V2 to CONFIG_COREBOOT_V2Patrick Georgi
and adapt its user (x86emu) to match. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-05Fix the generic code for copying and running coreboot_ram in casePatrick Georgi
certain configuration options are disabled. The strings were just at the wrong place. Two boards fix up some variables for romstream. This isn't necessary (or possible) when CBFS is active, as there is no romstream. It would be nicer to have them depend on CONFIG_ROM_PAYLOAD, but there isn't any invariant that forces that to be inactive if CBFS is active, and this patch is supposed to be small, esp. as the stream loaders are on the way out. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-31oops, these two were missed in the last cleanup.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4475 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-31Catch various cases in libpayload where malloc() or memalign() return NULLStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-31* drop duplicate prototype for lib_get_sysinfo()Stefan Reinauer
* fix delay handling in tiny curses keyboard driver * fix off by one error in video driver Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-28Fix erroneous comment in src/mainboard/h8dmr/Options.lbWard Vandewege
This is a trivial patch. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-26drop dead nested assignment (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4468 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-26trivial typo in a commentStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4467 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-23CBFS stuff:Stefan Reinauer
- update, add, and improve comments - whitespace here and there - remove unused or write-only variables - improve debug output - only build payload.{nrv2b,lzma} for non-cbfs - improved error checking in cbfstool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4466 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-23sb/via/k8t890: add vga textmode code for k8m890 chrome igp.Luc Verhaegen
Add initialisation for the VIA Chrome 9 IGP on the k8m890 through native code and through the general vga infrastructure i committed a month or two ago. Add videoram_size option for k8m890 and the Asus M2V-MX SE. Now the Asus M2V-MX SE will magically come up with a working standard VGA 80x25 textmode. Many thanks to the people who worked hard on the Asus M2V-MX SE, and all of its components; this vga bringup was a breeze thanks to your hard work for this excellently supported board. And separate thanks to Rudolf Marek for spurring me on and for providing a register dump. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4465 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-23We did together some patch which makes finally a MMCONFIG workable inRudolf Marek
linux out of the box. There were two problems. First was that the mmconfig ACPI structure was empty because of cut and paste (PCI ID of K8M890 is different). Second problem is now nicely solvable by add_region. Linux expects that the mmconfig region is found as reserved memory. Otherwise it does not trust it. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4464 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-22Don't put .o files in the source tree. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-22Fix a redundant declaration warning (trivial)Stefan Reinauer
src/include/device/pci.h:75: warning: redundant redeclaration of 'pci_dev_init' src/include/device/pci_rom.h:39: warning: previous declaration of 'pci_dev_init' was here Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4462 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-22Fix up the tree again...Stefan Reinauer
* acpi_add_table requires a pointer to the RSDP, not the RSDT anymore, in order to properly support XSDT generation. * fix compilation the DSDT on gigabyte/m57sli * drop a remaining, forgotten HPET_NAME for "HPET" Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21clean up acpi table strings, as discussed on the listStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Another include file slipped. This gets via/epia-m building again.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4459 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Kontron updates, get board up to date with i945 and ich7 updates.Stefan Reinauer
Move interrupt routing to mainboard specific code. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4458 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21this bug sneaked in during conversionStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4457 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Intel ICH7 updatesStefan Reinauer
- code restructuring (move ich7 out of i945) - ACPI fixes - major SMI handler updates - make sure SMBus lives where we expect it - try to get usb debug working Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4456 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21* drop ich7 includeStefan Reinauer
* detect more i945 variants * raminit fixes * ACPI + PCIe updates Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4455 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21add intel speedstep support and some PM fixes.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21This fixes a couple of issues with older Linux kernels (that expect an XSDT asStefan Reinauer
soon as there's an ACPI 2.0 or later table) * add XSDT support * add more table types This patch will break at least the kontron (and possibly some new boards I missed) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Rewrite interrupt handling in coreboot to be more comprehensible andStefan Reinauer
more flexible. Also some minore device allocator cleanups that sneaked in. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4452 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Add more warnings to CFLAGS, and also add some to HOSTCFLAGSStefan Reinauer
include ldoptions from ldscript.ld instead appending it. Not everyone was happy about the -Wmissing-prototypes in CFLAGS. I put it in there now anyways, so everyone can get an overview which parts of their code could use some cleanup. If it gets too ugly, we can still remove that flag again. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Example how simple it is to use printk instead of printk_something inStefan Reinauer
coreboot ram stage. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4450 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Rewrite keyboard driver to actually wait time in ms as specified in the specs,Stefan Reinauer
rather than doing inexact and slow idle loops. Also improve error reporting in case of problems. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4449 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21- Remove superfluous / from pathStefan Reinauer
- use make -C instead of workaround Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4448 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Some USB debug updates, mostly comments fixing, license header updatesStefan Reinauer
and refactoring Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21* rework tsc based timer code to use inb instead of outb for calibrationStefan Reinauer
* Add generic Local APIC based timer code. This timer does not need expensive calibration and thus reduces the boot time by up to more than a second. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21* cleanup ricoh rl5c476 code:Stefan Reinauer
- drop duplicate udelay function - simplify code flow - some cosmetics on comments Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Remove a comment that no longer applies. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4444 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-20Add legacy I/O region for vt8237r southbridge.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4443 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-20Rename some preprocessor symbols. I have no idea whyPatrick Georgi
those symbols were left alone before, after this, they're somewhat more in line with the rest of the tree. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-19The file string.h is also included in romcc code, which has no malloc().Stefan Reinauer
The patch adds proper preprocessor guards and drops the malloc() prototype because that's in stdlib.h Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4441 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-18coding style fixes for powernow (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4440 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-18drop unused variable (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-18This patch fixes payloads on certain Fedora versionsStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4438 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-18Fix off-by-one bug in libpayload UHCI driverStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-18strdup the input of dirname, as dirname is freePatrick Georgi
(according to the spec) to change the string in-situ, even if glibc doesn't do it. This avoids errors on Mac OS and Solaris. Kill nrv2b support in CBFS (we have lzma), slightly improve debug output in CBFS, properly declare all functions of CBFS in the header. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4436 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-17Bring S1g1 cpu names up to date with the officialWard Vandewege
Revision Guide for AMD NPT Family 0Fh Processors Rev. 3.42 March 2009, found at http://support.amd.com/us/Processor_TechDocs/33610_PUB_Rev3%2042v3.pdf This patch takes its data from Table 9. Build tested. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4434 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-17Bring Socket F cpu names up to date with the officialWard Vandewege
Revision Guide for AMD NPT Family 0Fh Processors Rev. 3.42 March 2009, found at http://support.amd.com/us/Processor_TechDocs/33610_PUB_Rev3%2042v3.pdf This patch takes its data from Table 7. Build tested. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4433 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-17Bring AM2 cpu names up to date with the officialWard Vandewege
Revision Guide for AMD NPT Family 0Fh Processors Rev. 3.42 March 2009, found at http://support.amd.com/us/Processor_TechDocs/33610_PUB_Rev3%2042v3.pdf This patch takes its data from Table 8. Build tested, and boot tested on a AMD Athlon(tm) Dual Core Processor 5050e. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4432 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-17This is an obvious bug which I overlooked when I worked on the AM2r2Zheng Bao
modules. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4430 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-16Separate cache_as_ram_auto.c and failover.c for Tyan s2895.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4427 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-15Fix VIA EPIA-M700 target enough for a first serial boot log.Uwe Hermann
Add the respective Super I/O config in Config.lb (Winbond W83697HG), enable COM1 on the board, fix irq_table.c, as well as the PCI devices listed in Config.lb (based on lspci output). This has been tested by Jakob Bornecrantz <wallbraker@gmail.com> on hardware, i.e. there is serial output. It does not yet boot to a Linux console successfully, more fixing will be needed. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jakob Bornecrantz <wallbraker@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-14trivial fixes to function declarations (and build system test)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4425 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-12Superiotool: Add IT8703F support.Luc Verhaegen
Kudos to ITE for providing the necessary information that quickly. Signed-off-by: Luc Verhaegen <libv@skynet.be> Tested-by: Glenn Mueller <mechwarrior5@hotmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4424 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-11Fix MS-6178 boot by setting unused device (CIR) to 'off' (trivial).Uwe Hermann
Tested on hardware, works fine. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4423 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-10Apparently I'm not the only one who forgets which way the outb andEd Swierk
outl arguments go. Signed-off-by: Ed Swierk <eswierk@aristanetworks.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-10This seems to be a more official, common, simple way to check if the CPU is ↵Zheng Bao
dual core or single core. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4415 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-10msrtool: CS5536: The most important interrupt MSRs and some DIVIL MSRs.Peter Stuge
Thanks to Tom for reviewing as well! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4414 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-07Add CONFIG_ARCH_X86=0 to sandpointx3_altimus_mpc7410.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4407 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-07Add pci_rawops.h from the mailing list and fix the via/epia-m700 build.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4406 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-07ChangeLog:Harald Gutmann
Change the parallel port from polling to interrupt-driven. This was tested by Andreas Mundt with a parallel port printer. Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Andreas B. Mundt <andi.mundt@web.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4405 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-07Add initial support for a CBFS module for coreinfo.Uwe Hermann
Currently it prints a list of components in CBFS and their size/type. There's a bunch of additional output that could be printed, but that's for another patch. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-07Add the IORESOURCE_BRIDGE flag to the fam10 resources for the benefit of the ↵Myles Watson
resource allocator. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4403 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-06Enable onboard-VGA on the Mitac 6513WU board.Michael Gold
Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4402 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-05Add support for the Mitac 6513WU mainboard, a Compaq OEM board using theMichael Gold
i810 chipset. Not all hardware has been tested, but my test PC boots Linux (via FILO) without any problems. Also: Add support for the SMSC LPC47U33X to the generic 'smscsuperio' driver. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4401 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-05Fix build for i810 boards that don't enable onboard VGA, yet.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4400 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-05Enable onboard VGA on the MS-6178 (i810 chipset) board (trivial).Uwe Hermann
Tested on hardware with the patch from r4398 and works fine as soon as Linux boots (no VGA in FILO for some reason, will investigate). In order to make the 'i810.vga' VGA blob from the vendor BIOS work you have to make the check for PCI device ID mismatches non-fatal (for now) in the src/devices/pci_rom.c file like this: Index: src/devices/pci_rom.c =================================================================== --- src/devices/pci_rom.c (Revision 4393) +++ src/devices/pci_rom.c (Arbeitskopie) @@ -87,7 +87,7 @@ if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) { printk_err("Device or Vendor ID mismatch Vendor %04x, Device %04x\n", rom_data->vendor, rom_data->device); - return NULL; + // return NULL; } printk_spew("PCI ROM Image, Class Code %04x%02x, Code Type %02x\n", The reason is that the VGA blob thinks the proper VGA device ID is 0x7123 whereas it really is 0x7121 on hardware. There are multiple ways to work around this (there have been many discussions in the past), we'll see which method will be used in future... Note: This has been tested against r4393 only for now to make sure there are no problems because of the recent resource allocator changes, see http://www.coreboot.org/pipermail/coreboot/2009-July/050486.html. Tests with trunk will follow. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-05Various Intel 82810/82810E changes which allow onboard VGA to work.Elia Yehuda
At the same time also make the 82810 code handle 82810E. - Set SMRAM register according to CONFIG_VIDEO_MB value: - 512 means 512 KB - 1 means 1 MB - Every other value for CONFIG_VIDEO_MB (e.g. 0) disables VGA. This is not very clean, changing CONFIG_VIDEO_MB to CONFIG_VIDEO_KB in a future patch may be nicer. - Set MISSC2 register bits as required per datasheet to make VGA work. The code handles both 82810 and 82810E. - northbridge.c: Add __pci_driver entry for the Intel 82810E. Also: - Rename PAM register #define to PAMR as per datasheet. - Drop unused/commented code for now. - Don't explicitly set GMCHCFG for now, the default works ok. We'll have to figure out the proper/ideal settings later. The code is based on a patch from Elia Yehuda <z4ziggy@gmail.com> but has been modified quite a bit for correctness and minimalism. Tested on hardware with a slightly modified MS-6178 target, patches to enable onboard-VGA for MS-6178 will follow. Signed-off-by: Elia Yehuda <z4ziggy@gmail.com> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-02Fix many things for via/epia-m700 to build.Myles Watson
Unfortunately it still doesn't. I think it's close, though. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-02ChangeLog:Harald Gutmann
Turn on Parallel Port and Floppy in Config.lb Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Andreas B. Mundt <andi.mundt@web.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-02Update the k8 code for the v3 resource allocator.Myles Watson
The major change is that the K8 registers don't get touched until the end of resource allocation. Fam10 code could be updated the same way. Move VGA code before resource allocation but after device enumeration. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4395 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-02Move the v3 resource allocator to v2.Myles Watson
Major changes: 1. Separate resource allocation into: A. Read Resources B. Avoid fixed resources (constrain limits) C. Allocate resources D. Set resources Usage notes: Resources which have IORESOURCE_FIXED set in the flags constrain the placement of other resources. All fixed resources will end up outside (above or below) the allocated resources. Domains usually start with base = 0 and limit = 2^address_bits - 1. I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is still there for resources. Some platforms may want to change that, but I didn't want to break anyone's board. Resources are allocated in a single block for memory and another for I/O. Currently the resource allocator doesn't support holes. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-02Convert Supermicro H8DMR to CBFS. Also clean up some whitespace inWard Vandewege
targets/supermicro/h8dmr/Config.lb and Config-abuild.lb. Importantly, this also sets default CONFIG_AP_CODE_IN_CAR=0 in src/mainboard/supermicro/h8dmr/Options.lb which is required to make this box boot since the changes that went in in r4315. At Myles' suggestion, this patch also sets default CONFIG_USE_FAILOVER_IMAGE=0 default CONFIG_USE_FALLBACK_IMAGE=0 default CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE in src/mainboard/supermicro/h8dmr/Options.lb to simplify targets/supermicro/h8dmr/Config.lb a bit further. Build tested with abuild, boot tested on physical hardware. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4393 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01Add support for the Intel Eagle Heights development board.Thomas Jourdan
Signed-off-by: Thomas Jourdan <thomas.jourdan@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01Fix typo and only output post code if the work was done.Myles Watson
Thanks to Thomas Jourdan <thomas.jourdan@gmail.com> for reporting it. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4391 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01Fix abuild for via/epia-n. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01I missed three files. Jon Harrison
Signed-off-by: Jon Harrison <bothlyn@blueyonder.co.uk> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01let abuild autodetect the coreboot path a bit better. So in the top level ofStefan Reinauer
coreboot you can now do: $ util/abuild/abuild -t foo/bar instead of $ util/abuild/abuild -t foo/bar $PWD Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01the file was not really different, so use the default file (trivial, since itStefan Reinauer
didn't build before, and it still doesn't) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01Ron,Jon Harrison
Attached is the third revision of the CN400/EPIA-N(L) patch for CB V2. Patch should work against r4381 (or later ?) This version now boots all of the way through to attempting to launch a payload (I'm trying FILO right now), where it falls over with exception 6 (invalid opcode) The coreboot_table issue seems to have been automagically resolved by the latest core files. It may still be that the reason for the payload not starting is down to some issue with the tables initialising, I'll look closer at that. Signed-off-by: Jon Harrison <bothlyn@blueyonder.co.uk> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01Add AMD family 10 AM2r2 support.Zheng Bao
Coreboot used to take SYSTEM_TYPE as a lable to tell what the socket is. This patch replaces (some of, not all) CONFIG_SYSTEM_TYPE with CONFIG_SOCKET_TYPE. It also fix some compiling error in src/northbridge/amd/amdmct/mct/mctardk4.c Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30the tool chain settings should not be in renamed (as they will never live inStefan Reinauer
Kconfig) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30whoops. missed those two..Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30commit svn:externals for last commit (what a pain) (1/2)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4382 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30add new supported chipsetWarren Turkal
Add identification for X58 and ICH10R. Signed-off-by: Warren Turkal <wt@penguintechs.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-28This copy of flashrom is old and unmaintained. Delete it to avoidPatrick Georgi
confusion, after we had a grace period to get people to move over to the new repository. History stays available for the archaeologists and for ancient checkouts (potentially with local changes). Use "svn diff" to get local changes, and apply it to a newer tree (if you manage to apply it, that is). The new repository is available at: svn://coreboot.org/flashrom/trunk Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4379 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-28flashrom is a separate project now. Thus we don't enforce it on our users.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4378 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-28Impact: fix vmlinux from 2.6.30Yinghai Lu
from 2.6.30 (?) the new vmlinux with per_cpu and brk support will have more sections. Elf file type is EXEC (Executable file) Entry point 0x200000 There are 7 program headers, starting at offset 64 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align LOAD 0x0000000000200000 0xffffffff80200000 0x0000000000200000 0x0000000000e46000 0x0000000000e46000 R E 200000 LOAD 0x0000000001046000 0xffffffff81046000 0x0000000001046000 0x00000000001406e0 0x00000000001406e0 RWE 200000 LOAD 0x0000000001200000 0xffffffffff600000 0x0000000001187000 0x0000000000000888 0x0000000000000888 RWE 200000 LOAD 0x0000000001388000 0xffffffff81188000 0x0000000001188000 0x000000000008a086 0x000000000008a086 RWE 200000 LOAD 0x0000000001600000 0x0000000000000000 0x0000000001213000 0x0000000000015e20 0x0000000000015e20 RWE 200000 LOAD 0x0000000001629000 0xffffffff81229000 0x0000000001229000 0x0000000000000000 0x0000000000208000 RWE 200000 NOTE 0x0000000000b3c7e8 0xffffffff80b3c7e8 0x0000000000b3c7e8 0x0000000000000024 0x0000000000000024 4 Section to Segment mapping: Segment Sections... 00 .text .notes __ex_table .rodata __bug_table .pci_fixup .builtin_fw __ksymtab __ksymtab_gpl __ksymtab_strings __init_rodata __param 01 .data .init.rodata .data.cacheline_aligned .data.read_mostly 02 .vsyscall_0 .vsyscall_fn .vsyscall_gtod_data .vsyscall_1 .vsyscall_2 .vgetcpu_mode .jiffies 03 .data.init_task .smp_locks .init.text .init.data .init.setup .initcall.init .con_initcall.init .x86_cpu_dev.init .altinstructions .altinstr_replacement .exit.text .init.ramfs 04 .data.percpu 05 .bss .brk 06 .notes So need to increase NR_SECTIONS. also fix one typo about phys address mask. Peter says: A similar fix was also implemented by Maciej Pijanka, so let's commit this now, eh. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4377 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-27Add a target/ directory for the VIA EPIA-M700 board, so we can build it.Uwe Hermann
Note that this board is nowhere near usable, further patches will follow and hopefully get this into buildable and usable shape. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4376 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-27Add dump support for SMSC LPC47N252.François-Regis Vuillemin
Signed-off-by: François-Regis Vuillemin <coreboot@miradou.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26Don't dump 0x07 registers, they're useless as they change every timeUwe Hermann
some software wants to do an LDN access (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4374 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26This adds register definitions for all logical devices on the SMSCMichael Gold
LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26Add dump information for F71862FG and F71863FG.Arjan Koers
Signed-off-by: Arjan Koers <0h3q2rmn2bdb@list.nospam.xutrox.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-25Remove the object files for cbfs from target directories and add aMyles Watson
cbfstool-clean target to the Makefile. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-25The problem is that the check to see if we're at the end is never reached. IMyles Watson
didn't look into it enough to know why fssize is 32 bytes larger than the offset. There may be another bug here. Maybe something with the CBFS header not being included or excluded from the calculation? Anyway, this patch fixes it for all cases size > 32. I also changed the error message so that it doesn't look like the ROM is full just because it can't find room for a file. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-24Add support for the Soyo SY-6BA+ III board.Uwe Hermann
Tested on hardware by Andrew Morgan <ziltro@ziltro.com>, boots Linux fine. Detailed status at: http://www.coreboot.org/Soyo_SY-6BA_Plus_III Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Andrew Morgan <ziltro@ziltro.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4369 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-21This patch adds a proper namestring generation to our ACPIgen generator.Rudolf Marek
Its used for Name and Scope and Processor now. As bonus, it allows to create a multi name paths too. Like Scope(\ALL.YOUR.BASE). Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4368 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19Undo my ugly commit that added uses clauses in lots of places instead of one.Myles Watson
Fix configuration of all boards. (Abuild tested) Hopefully fix compilation of PPC boards (they've never compiled for me.) Apologize profusely. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19work around initobject breakage in pc80/Config.lbStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4366 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1