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2020-08-28Update vboot submodule to upstream masterKangheui Won
Updating from commit id 3932b1c: 2020-08-19 02:09:04 +0000 - inclusive: change usage of blacklist/whitelist to commit id fefcaa6: 2020-08-24 04:32:03 +0000 - vboot: adjust VB2_SECDATA_KERNEL_FLAGS in non-recovery path This brings in 2 new commits. Change-Id: Ia3ff764537b91f76ba6fa3ba2646638964800510 Signed-off-by: Kangheui Won <khwon@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44732 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2020-08-203rdparty/vboot: Update to latest masterPatrick Georgi
This also includes https://chromium-review.googlesource.com/2318026 which fixes an issue with duplicate symbols. Change-Id: Icf450616b3bcd8b7c01261c913cd172625dbd6ba Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-08-133rdparty/amd_blobs: Move the pointer for picasso updateMarshall Dawson
Update PSP to 0.8.6.7B. BUG=b:163857965 TEST=none Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I634dadccc51b36f9ac25c3238a794564ce580d5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/44427 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-083rdparty/intel-microcode: Update submodule to 20200616 releaseAngel Pons
Change-Id: Ia250765e2cb81d6a39ad00ebbab20e7b87fa42d1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43758 Reviewed-by: Michael Niewöhner Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-303rdparty/amd_blobs: Move pointer to 0.8.5.7BMarshall Dawson
BUG=b:162057232 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: Ifd4ac0655f7ada5ec10a266fdb2b930861959215 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44040 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-273rdparty/vboot: Update submodule pointer to upstream masterPaul Menzel
Building depthcharge master currently fails as depthcharge commit 74ca8ae5 (depthcharge: Hide dev mode timeout description) changed the function signature according to vboot commit 59fd331b (vboot/ui: pass timer_disabled to vb2ex_display_ui()), which is not yet present in the vboot checkout: $ make […] CC drivers/ec/vboot_auxfw.depthcharge.o src/drivers/ec/vboot_auxfw.c: In function 'display_firmware_sync_screen': src/drivers/ec/vboot_auxfw.c:117:5: error: too many arguments to function 'vb2ex_display_ui' vb2ex_display_ui(VB2_SCREEN_FIRMWARE_SYNC, ^~~~~~~~~~~~~~~~ In file included from /dev/shm/coreboot-1/3rdparty/vboot/firmware/include/vb2_api.h:18, from src/drivers/ec/vboot_auxfw.c:17: /dev/shm/coreboot-1/3rdparty/vboot/firmware/include/../2lib/include/2api.h:1262:13: note: declared here vb2_error_t vb2ex_display_ui(enum vb2_screen screen, ^~~~~~~~~~~~~~~~ So update the submodule pointer from commit 68de90c7 (Allow building for non-CrOS environments) to commit ed23c084 (Reset EC when transitioning to dev mode). This brings in 7 new commits. Change-Id: Icd5408fb824fc5da470774b7f493b916dff17832 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43517 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Joel Kitching <kitching@google.com>
2020-07-203rdparty/libgfxinit: Update submodule pointerAngel Pons
This brings in 4 new commits: * c0db994 common/Makefile.inc: Factor out generation TLAs * 3f86b0b Move `PSR_Off` out of `Power_And_Clocks_Haswell` * 450c24c haswell: Make VGA on FDI work * 3318bf2 Drop generation suffix from `Power_And_Clocks` Change-Id: I023b0c2bb403b3a9c9fe575a78cd2cf2f20b112a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43559 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-07-203rdparty/libhwbase: Update submodule pointerAngel Pons
This brings in 5 new commits: * 69e9086 mutime: Make Sinfo an imported constant * 9f87a10 time: Add T_First constant * 4e22910 Makefile: Adapt $(space) definition * d822df5 Makefile: Delay expansion of `$(ADAFLAGS)` * a3edc6e Makefile: Add `-gnatw_R` to suppress spurious warning Change-Id: I907e66fcf85da256a112a7069a3c551a6d8caaf0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43558 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-03Update vboot submodule to upstream masterPatrick Georgi
Updating from commit id c531000f: 2020-05-18 20:55:55 +0000 - (vboot: Add recovery reason code for CSE Lite SKU errors) to commit id 68de90c7: 2020-07-02 11:31:05 +0000 - (Allow building for non-CrOS environments) This brings in 59 new commits. Change-Id: I7f3c30511ff4acc60e3581bdab89d685dc7beaa5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43008 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-013rdparty/amd_blobs: Update Picasso PSP filesMarshall Dawson
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I752804919227c1522374b93e08abee13396b2679 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42893 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-06-30Add qc_blobs repositoryJulius Werner
This patch adds a separate blobs repository for Qualcomm blobs, analogous to the existing AMD blobs. Qualcomm's binary licenses allow files to be redistributed and used by anyone, but they explicitly require the user to agree to the license terms when just *downloading* the binary (even if they're not using them to build any firmware). Some community members do not like to have to agree to licenses for files they're not actually using, so we are keeping these files separate from the main blobs repository and adding an extra Kconfig to make sure the user is aware of and must explicitly agree to this before downloading these files. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I247746c1b633343064c9f32ef1556000475d6c4a Reviewed-on: https://review.coreboot.org/c/coreboot/+/42548 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-06-193rdparty/blobs: advance submodule pointerFelix Held
Changes in 3rdparty/blobs: * Update of the OCP Tiogapass Flash descriptor binary * Move binary policy as README.md * Markdownify README.md * Add APCB binary for AMD Mandolin Change-Id: I0c45969626f30dca42bba1f137e85ec0999fc671 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-06-153rdparty/amd_blobs: advance submodule pointerFelix Held
This pulls in a newer version of the PSP-related blobs. Change-Id: I6ff39260e9697512f78eb68435bd17ea83af35d5 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42346 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-05-273rdparty/amd_blobs: Update to include APCB_magic.binRaul E Rangel
BUG=b:157140753 TEST=Built zork/trembyle and boot to OS. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I30a27a149ee7f368f45fdf5d4a081127f15e7629 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-05-26submodules: Add new submodule 3rdparty/cmockaJan Dabros
Cmocka unit testing framework is used for writing and building coreboot unit tests. This repo will be checked-in only when building some test targets. Signed-off-by: Jan Dabros <jsd@semihalf.com> Change-Id: I3cdfd32f5bba795d5834ebeae1afff0f7006a0d1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41652 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-05-26Update vboot submodule to upstream master (commit hash c531000)Furquan Shaikh
This change updates vboot submodule from commit hash 3aab301: vboot: Convert reboot-related errors to vboot2-style to commit hash c531000: vboot: Add recovery reason code for CSE Lite SKU errors Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Ifbf5a09e6602c3f6833e6e8fbbd3cee3f60f1b47 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41536 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-05-223rdparty/amd_blobs: update submodule pointerFelix Held
Change-Id: I468f0d3ab018ee0044e8de7df829c64940c7df2b Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-05-203rdparty/libgfxinit: Update submodule pointerMatt DeVillier
Update libgfxinit submodule pointer to pull in handling for presence straps bypass and some minor cleanup. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Change-Id: Id4a903383f32f352aa3595bd72bc5f6f0777171c Reviewed-on: https://review.coreboot.org/c/coreboot/+/41515 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-05-183rdparty/libgfxinit: Update submodule pointer, againBill XIE
6b95507ec5b087658178a325bdc68570bc48bb20 has mistakenly reverted the submodule pointer of 3rdparty/libgfxinit to cdbfce27, canceling c844d14ca5081b2cb2f1036bdf0c2112405342d1. This commit sets it back, recovering c844d14c. Change-Id: Ib594e40a39ea83dd2238becb287f2516e7c54046 Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41400 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-173rdparty/amd_blobs: Update with Picasso imagesMarshall Dawson
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: Ie886815ed354762ea52fd6a76169cf25576f8852 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2020-05-13mainboard/lenovo/x230: Add ThinkPad x230s as a variantBill XIE
The code is based on autoport and that for X230. Major differences are: - Only one DDR3 slot - HM77 PCH - M.2 socket instead of mini pci-e - no docking - no tpm Tested: - CPU i5-3337U - Slotted DIMM 8GiB - Camera - pci-e and usb2 on M.2 slot with A key for wlan - sata and usb2 (no superspeed components) on M.2 slot with B key for wwan - On board SDHCI connected to pci-e - USB3 ports - libgfxinit-based graphic init - NVRAM options for North and South bridges - Sound - Thinkpad EC - S3 - Linux 4.9 within Debian GNU/Linux stable, loaded from Seabios. Untested: - Touch screen, which is said to work under ubuntu but not debian. Change-Id: Ie537645d5ffaee799e79af2f821f80c3ebd2dfec Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41168 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-05-113rdparty/libgfxinit: Update submodule pointerMatt DeVillier
Update libgfxinit submodule pointer to pull in workaround for VT-d. Change-Id: I09f811bdb917365f4e97b7ab385781337d4c9cf7 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41181 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-01Update vboot submodule to upstream masterYu-Ping Wu
Updating from commit id 55154620: vboot: Add screens for recovery using disk to commit id 3aab3014: vboot: Convert reboot-related errors to vboot2-style This brings in 3 new commits. Change-Id: I75be535e0b0f8080366b98e5ae2007452ad51738 Signed-off-by: Yu-Ping Wu <yupingso@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40845 Reviewed-by: Joel Kitching <kitching@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-283rdparty/intel-microcode: Update submodule pointer to 20191115 releaseFelix Singer
Update submodule pointer to 20191115 release to include the microcode update for CML-U62, and others. Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: I4765a70be0b1182acd340a3c31a5d71fd0ab500f Reviewed-on: https://review.coreboot.org/c/coreboot/+/40597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-23Update vboot submodule to upstream masterDaisuke Nojiri
Updating from commit id 46ff62c3: vboot: stop reading from ACPI for wpsw_boot to commit id 55154620: vboot: Add screens for recovery using disk This brings in 37 new commits. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ie184cbe6cc18cea540966d5801472ae821ea3e86 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40503 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-14Update vboot submodule pointerDuncan Laurie
Update the pointer for vboot_reference so it can be used to compile depthcharge payload on the master branch. Change-Id: I5fc6e05896d7221a1e48ca86c6b15081488302b5 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39840 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2020-03-093rdparty/libgfxinit: Update submodule pointerNico Huber
Changes allow to use the integrated panel logic (power sequen- cing and backlight control) for more connectors. The Kconfigs GFX_GMA_PANEL_1_PORT and GFX_GMA_PANEL_2_PORT can now be set to any port, e.g. config GFX_GMA_PANEL_1_PORT default "DP3" Now that the panel logic is not tied to the `Internal` port choice anymore, we can properly split it into `LVDS` and `eDP`. This also adds Comet Lake PCI IDs which should still work the same as Kaby and Coffee Lake. Change-Id: I78b1b458ca00714dcbe7753a7beb4fb05d69986b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38921 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-07Update vboot submodule to upstream masterdnojiri
Updating from commit id 8b9732f5: 2020-01-28 02:32:08 +0000 - (2lib: Fix struct vb2_hash the way it was meant to be) to commit id 5059062d: 2020-03-05 02:40:39 (EFS: Implement EFS2 and NO_BOOT mode) This brings in 19 new commits. Change-Id: Ic33500921e2c1a6109c24ad36713b41ab6e43de9 Signed-off-by: dnojiri <dnojiri@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39324 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Joel Kitching <kitching@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-02-19Update vboot submodule to upstream masterJoel Kitching
Updating from commit id 0e97e25e: 2020-01-28 02:32:08 +0000 - (2lib: Fix struct vb2_hash the way it was meant to be) to commit id 8b9732f5: 2020-02-18 05:55:01 +0000 - (vboot: do not call vb2_commit_data at end of VBSLK) This brings in 36 new commits. Change-Id: Icb0ab2c82c3264185171a32357944949afd2edce Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-02-053rdparty/blobs: Update to include STM binaryPatrick Georgi
Change-Id: I5f053c1270bab71aeab3bb785c60417419736b44 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38717 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ron minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2020-02-03Update vboot submodule to upstream masterJulius Werner
Updating from commit id 6ef33b99: 2019-11-22 Hung-Te Lin futility: updater: refactor: unify getting temp files for firmware images to commit id 0e97e25e: 2020-01-23 Julius Werner 2lib: Fix struct vb2_hash the way it was meant to be Change-Id: I539aba2f283804f67ff3ff4f98324b3d10b2bb54 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38604 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com>
2020-01-22Update vboot submodule to upstream masterJulius Werner
Updating from commit id 2843aa62: 2019-12-12 Julius Werner 2lib: Move firmware body size reporting to separate function to commit id f5367d59: 2020-01-20 Joel Kitching vboot: translate recovery reason info from vboot 2->1 This brings in 27 new commits. Change-Id: I7d33337881fa2d36d6e562b0a390b56227cfad55 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com>
2020-01-05Populate 3rdparty/amd_blobs/Nico Huber
Kconfig default paths already point into `3rdparty/amd_blobs/`. Change-Id: Ibb6f12183c48c7c07f76e794b4971c8b75116333 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38042 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2019-12-163rdparty/fsp: Update to current master againNico Huber
We had to role the `fsp` submodule back for a minute due to a regression with the Coffee Lake binary. Intel silently mixed FSP 2.1 features into the Coffee Lake FSP which is supposed to be FSP 2.0. With the stack and heap usage partitioned for FSP using coreboot's stack (config FSP_USES_ CB_STACK), it works again. To make this even messier: We already selected this Kconfig option for Whiskey Lake, which is supposed to use the very same FSP binary. So with either submodule pointer, something was always broken :-/ Change-Id: Id2aa17aaa2c843dcc7e0fb28779d1e5948da83c9 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jeremy Soller <jeremy@system76.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Mimoja <coreboot@mimoja.de>
2019-12-13security/vboot: Ensure firmware body size is respected againJulius Werner
CB:36845 simplified how coreboot finds the RW CBFS after vboot has and eliminated a layer of caching. Unfortunately, we missed the fact that the former cached value didn't exactly match the FMAP section... it was in fact truncated to the data actually used by vboot. That patch unintentionally broke this truncation which leads to performance regressions on certain CBFS accesses. This patch makes use of a new API function added to vboot (CL:1965920) which we can use to retrieve the real firmware body length as before. (Also stop making all the vb2_context pointers const. vboot generally never marks context pointers as const in its API functions, even when the function doesn't modify the context. Therefore constifying it inside coreboot just makes things weird because it prevents you from calling random API functions for no reason. If we really want const context pointers, that's a refactoring that would have to start inside vboot first.) This patch brings in upstream vboot commit 4b0408d2: 2019-12-12 Julius Werner 2lib: Move firmware body size reporting to separate function Change-Id: I167cd40cb435dbae7f09d6069c9f1ffc1d99fe13 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37680 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mathew King <mathewk@chromium.org>
2019-12-13Update vboot submodule to upstream masterJulius Werner
Updating from commit id 695c56dc: 2019-12-04 Julius Werner Makefile: Make loop unrolling fully controllable by the caller to commit id b10e5e32: 2019-12-09 Yu-Ping Wu vboot: Make 2nvstorage.h private to vboot_reference This brings in 19 new commits. Change-Id: I9cdccd25422aee26620d48d31f83bcf32a7b4809 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37717 Reviewed-by: Mathew King <mathewk@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-133rdparty/fsp: Set back commit to working version of the FSPChristian Walter
With CB:37564 (3rdparts/fsp: Update fsp submodule) a regression has been introduced to CFL platforms, such that the FSP-M fails/is broken. This commit sets the commit to checkout in the submodule FSP back to a working version. Change-Id: I8eac551211559962fc60e7edd46ff118d7bde830 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37669 Reviewed-by: Mimoja <coreboot@mimoja.de> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-093rdparts/fsp: Update fsp submoduleJohanna Schander
The name for the CoffeeLake FSP.fd was changed to Fsp.fd. Therefore the CoffeLake / WhiskeyLake default path was changed. Change-Id: I0f51e378fcaacb25392d8940a342fc968c730157 Signed-off-by: Johanna Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37564 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-06vboot: update VbExNvStorageWrite functionJoel Kitching
Going forwards, vb2ex_commit_data will be used to flush both nvdata and secdata. The patch that is circularly dependent on this lies between a patch that makes vboot no longer build and the patch that fixes that, so we have to pull the whole thing in at once to sort out the mess. Updating from commit id 1c4dbaa0: 2019-11-18 Julius Werner Makefile: Fix typo for MOCK_TPM to commit id 695c56dc: 2019-12-04 Julius Werner Makefile: Make loop unrolling fully controllable by the caller BUG=b:124141368, chromium:1006689 TEST=make clean && make test-abuild BRANCH=none Change-Id: Ia2612da0df101cd3c46151dbce728633a39fada1 Signed-off-by: Joel Kitching <kitching@google.com> Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37315 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-11-20Update vboot submodule to upstream masterTim Wawrzynczak
Updating from commit id ecdca931: 2019-11-13 06:14:05 +0000 - (vboot: move vb2_context inside vb2_shared_data (persistent context)) to commit id 1c4dbaa0: 2019-11-19 06:31:23 +0000 - (Makefile: Fix typo for MOCK_TPM) This brings in 17 new commits. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I1952d7a26725e2c008b5009705b2e78ac0bb82df Reviewed-on: https://review.coreboot.org/c/coreboot/+/36936 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-16Update opensbi submodule to upstream masterPatrick Georgi
Updating from commit id e561c63: 2019-10-02 17:03:58 +0530 - (lib: Fix coldboot race condition observed on emulators/simulators) to commit id 215421c: 2019-11-11 16:40:34 -0800 - (lib: Remove date and time from init message) This brings in 13 new commits and allows reproducible builds with opensbi. Change-Id: I0fb9e0921b017822defa8b56df5a0f3e014d7f33 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36866 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-11-153rdparty/blobs: Add Facebook FBG1701 descriptor and Intel MEFrans Hendriks
Upgrade to blobs version with descriptor and Intel ME binary BUG=N/A TEST=booting Facebook FBG1701 Change-Id: I2143b94a81eebfb22d99833aaf1f3743983dd80c Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34442 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-15vboot: use vboot persistent contextJoel Kitching
vb2_context object is now stored on the workbuf as part of vb2_shared_data. Use vboot's new API functions vb2api_init and vb2api_relocate to create and move the workbuf. BUG=b:124141368, chromium:994060 TEST=Build locally BRANCH=none Change-Id: I051be1e47bf79b15a1689d49a5d4c031e9363dfa Signed-off-by: Joel Kitching <kitching@google.com> Also-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1902339 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36300 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
2019-11-14Update vboot submodule to upstream masterJoel Kitching
Updating from commit id b2c8984d: 2019-10-01 06:01:59 +0000 - (vboot: fix compile error with MOCK_TPM) to commit id 87276ffe: 2019-11-07 17:46:09 +0800 - (futility: updater: Clean up hard-coded section names to preserve) This brings in 48 new commits. Change-Id: Iabaadc63227b856d0a2b7f3b23fe8c41b28d8eae Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36813 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-10-31submodules: Add 3rdparty/amd_blobsMarshall Dawson
This is currently an empty repo. The intention for amd_blobs may be found in Documentation/soc/amd/amdblobs_license.md. A subsequent patch will make the repo's init and checkout optional based on a Kconfig symbol. Change-Id: Ia93fb2711beaea4cb1c8e5d71dc3a9e0facc5485 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36441 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-10-293rdparty/libgfxinit: Update submodule pointerNico Huber
This includes a huge set of refactorings to support Core Display Clock (CDClk) frequency switching based on the current mode requirements. The CDClk is configurable since Haswell and runtime switching is suppor- ted since Broadwell. Always using the lowest possible frequency setting should allow some power-savings. While, on the upper end, we can support higher resolution panels now, without having to change the static confi- guration. There have also been some smaller changes and fixes, including: o Parsing of eDP 1.4+ DPCD link rates, enables panels that don't advertise a maximum link rate but only individual ones. o DP support for Ibex Peak. o Corrected limit for HDMI on G45 to 165MHz. o Reworked GMBUS reset handling and timeouts, should help with stalled GMBUS controllers when unimplemented ports were probed by accident. Tested on various boards from GM45 to KBL-R. Change-Id: I0a90bd4afe2091699a46a5a1323af9723ff43018 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35898 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-03Update arm-trusted-firmware submodule to upstream masterPatrick Georgi
Updating from commit id 42cdeb93: 2019-09-13 12:09:21 +0000 - (Merge "stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driver" into integration) to commit id ace23683: 2019-09-27 09:54:27 +0000 - (Merge changes from topic "ld/stm32-authentication" into integration) This brings in 83 new commits. Change-Id: I273b5014db76d307d8735d78a8fdd5db3d07146c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35625 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-10-03Update chromeec submodule to upstream masterPatrick Georgi
Updating from commit id 860fe2962: 2018-12-29 05:45:29 -0800 - (mt_scp/ipi: Support host command.) to commit id a1afae4e0: 2019-10-02 11:47:45 +0000 - (juniper: initial setup) This brings in 1723 new commits. Change-Id: Ieb4f00b21a4354bb634c3427c73260123b54ac2a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35624 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-10-03Update opensbi submodule to upstream masterPatrick Georgi
Updating from commit id ce228ee: 2019-07-02 11:11:08 +0530 - (include: Bump-up version to 0.4) to commit id e561c63: 2019-10-02 17:03:58 +0530 - (lib: Fix coldboot race condition observed on emulators/simulators) This brings in 44 new commits. Change-Id: Ide6e3c2bb98e79750b40a9b8ca9f2f1d2c123628 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35314 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-10-03Update vboot submodule to upstream masterPatrick Georgi
Updating from commit id e6700f4c: 2019-08-13 04:36:52 +0000 - (vboot: update vboot2 functions to use new vb2_error_t) to commit id b2c8984d: 2019-10-01 06:01:59 +0000 - (vboot: fix compile error with MOCK_TPM) This brings in 71 new commits. Change-Id: Id7cefa3ad5b30c955d18e469494fec32f6f58a48 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35315 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-09-163rdparty/chromeec: Update to latest masterElyes HAOUAS
It's been some time and there are 1420 new commits. Including one that allows reproducible builds \o/ and one that breaks building with empty $(CC) :-/ Change-Id: I5e81d5a2f1018481b9103fc5a1f4b8c72fb9deec Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30679 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-14arm64: Uprev Arm TF and adjust to BL31 parameter changesJulius Werner
This patch uprevs the Arm Trusted Firmware submodule to the new upstream master (commit 42cdeb930). Arm Trusted Firmware unified a bunch of stuff related to BL31 handoff parameters across platforms which involved changing a few names around. This patch syncs coreboot back up with that. They also made header changes that now allow us to directly include all the headers we need (in a safer and cleaner way than before), so we can get rid of some structure definitions that were duplicated. Since the version of entry point info parameters we have been using has been deprecated in Trusted Firmware, this patch switches to the new version 2 parameter format. NOTE: This may or may not stop Cavium from booting with the current pinned Trusted Firmware blob. Cavium maintainers are still evaluating whether to fix that later or drop the platform entirely. Tested on GOOGLE_KEVIN (rk3399). Change-Id: I0ed32bce5585ce191736f0ff2e5a94a9d2b2cc28 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34676 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-08-253rdparty/ffs: add open-power ffs utilsMarty E. Plummer
These tools are used to manipulate open-power specific partitioning and ecc algorithms. Change-Id: I0657f76aab75190244d0e81c2b1a525e50af484d Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35007 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-21vboot: update vboot2 functions to use new vb2_error_tJoel Kitching
To make explicit when vboot2 error codes should be returned, use the new vb2_error_t type on all functions which return VB2_ERROR_* constants. Additionally, add required vboot submodule commit id e6700f4c: 2019-07-31 14:12:30 +0800 - (vboot: update vboot2 functions to use new vb2_error_t) NOTE: This patch was merged separately on the Chromium tree: https://chromium-review.googlesource.com/c/1728499 BUG=b:124141368, chromium:988410 TEST=make clean && make test-abuild BRANCH=none Change-Id: I804c2b407e496d0c8eb9833be629b7c40118415c Signed-off-by: Joel Kitching <kitching@google.com> Cq-Depend: chromium:1728292 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34860 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-21Update vboot submodule to upstream masterJoel Kitching
Updating from commit id 9c906110: 2019-08-06 06:07:01 +0000 - (vboot/tpm: fix return type inconsistencies) to commit id a5afd01f: 2019-08-08 11:02:44 -0700 - (Minor fixes for clang) This brings in 6 new commits. Change-Id: Ic334ce8a5f24a0119fa2aaf000ce76c4c9e4932a Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34859 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-083rdparty/blobs: Update submodule for MT8183Dawei Chien
Update the 3rdparty/blobs submodule to the newest HEAD, which contains the SPM binary for MT8183 platforms ( https://review.coreboot.org/c/blobs/+/34543 ). Change-Id: I505ec9fffd9ddd62fffbe9514cbba50625825693 Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34734 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-08Update vboot submodule to upstream masterJoel Kitching
Updating from commit id dac763c7: 2019-05-10 10:43:55 -0700 - (Make vboot -Wtype-limits compliant) to commit id 9c906110: 2019-08-06 06:07:01 +0000 - (vboot/tpm: fix return type inconsistencies) This brings in 68 new commits. Change-Id: Ia96347d8ed94db6f0ec5f5108cb98ab0c4087bd4 Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33858 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-053rdparty/libgfxinit: Update submodule pointerNico Huber
Update libgfxinit: o Add support for ULX (CPU Y series) variants o Add support for Kaby/Coffee/Whiskey/Amber Lakes o Publish Read_EDID() procedure o Fix certain GMBUS error conditions o Fix DP training when clock recovery needed voltage-swing increase o Fix scaling on eDP for BDW+ Change-Id: Ib252303708d2bb0524ecc47f498df45902ba774f Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2019-07-283rdparty/opensbi: Bump versionPatrick Rudolph
Use latest OpenSBI that include support for dynamic firmware loader. That allows us to use OpenSBI similar to BL31 on aarch64: * coreboot loads the payload * coreboot loads OpenSBI ELF right before payload handoff * OpenSBI does platform lockdown and provides runtime services * OpenSBI hands control to already loaded payload The uncompressed compiled OpenSBI code is about 41KiB. Required to boot GNU/Linux on qemu-riscv as some instructions needs to be emulated by SBI. Change-Id: If7ed706bc54a75fb583a8aa46fdd61ae7d18c546 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34139 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-07-233rdparty/blobs: Update submoduleJulius Werner
Uprev the 3rdparty/blobs submodule to the newest HEAD, which contains the SSPM binary for MT8183 platforms ( https://review.coreboot.org/c/blobs/+/32698 ). Change-Id: I8a4dfa7eaace1ea473f5970596c3201342e48927 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34494 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-023rdparty/fsp: Update submodule pointerBora Guvendik
Update fsp submodule pointer to Coffee Lake FSP 7.0.64.40 github commit: https://github.com/IntelFsp/FSP/commit/59964173e18950debcc6b8856c5c928935ce0b4f Change-Id: I864404a03be63aa60e81db21af16d69cda2d4e12 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33642 Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-18Add intel-microcode submodule repositoryzaolin
Change-Id: Icc5ac0a8033e371ecf2b4b28ba45dab961e86b3f Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33550 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
2019-06-173rdparty/blobs: Update submodule, SNB improvementsArthur Heymans
The sandybridge systemagent-r6 blob is modified: - To be more flexible about the location of the stack w.r.t. the heap - Place the MRC pool right below the MRC_VAR region - to work with the same DCACHE_RAM_BASE from the native raminit (could make the CAR linker symbols easily compatible if desired) This allows CAR setup compatibility between mrc.bin and native bootpath and also allows for BIOS/memory mappeds region larger than 8MB. This changes the semantics of CONFIG_DACHE_RAM_MRC_VAR_SIZE to also include the pool on top of MRC_VAR region. TESTED on T520 (boots and resumes from S3 with mrc.bin). Change-Id: I17d240656575b69a24718d90e4f2d2b7339d05a7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33228 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-133rdparty: Uprev vboot submodule to upstream masterJulius Werner
This patch uprevs the vboot submodule to the new upstream HEAD commit dac763c782 Make vboot -Wtype-limits compliant Change-Id: I363e218e019b25483bc4c06315ca4e0e34599daf Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32748 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-05-123rdparty/libgfxinit: Update for runtime CPU detectionNico Huber
Beside one tiny fix for framebuffer scaling, this contains a major refactoring of libgfxinit's configuration infrastructure. With this, we are finally able to detect CPUs at runtime and only have to confi- gure a CPU/GPU generation. Change-Id: Iccf4557453878536f527e4a1902439a1961ab701 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32736 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-123rdparty/libhwbase: Update to current masterNico Huber
Beside some refactorings that don't affect coreboot, this contains bd0ed91 (Makefile: Revise support for generated sources) that fixes an issue with upcoming libgfxinit configuration changes. Change-Id: Ib47aeff8f6426ae27ddbc235a954e3bd60029072 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32735 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-07Update vboot submodule to upstream masterJoel Kitching
Updating from commit id 304aa429: 2019-03-12 10:38:56 -0700 - (futility: updater: Unit test for preserving sections using FMAP flags) to commit id e7edff66: 2019-05-03 07:02:32 -0700 - (vboot: implement DISPLAY_INIT context and SD flag) This brings in 45 new commits. Change-Id: I7493e43bddc553f9724de46130ccb4cb44e18573 Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32612 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-04-253rdparty/fsp: Update submodule pointer to upstream masterMatt DeVillier
Update submodule pointer to pull in newly-updated Braswell FSP. Adjust FSP_FD_PATH for soc/cannonlake due to filename case change. Change-Id: I02ee0d32fd4c04cd4971eff20fc5a7de3f9b07ec Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32420 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-04-243rdparty/opensbi: Add submodulezaolin
* Add opensbi for RISC-v Change-Id: I1a6baa6b6c05095ff5545492aabf7408a23af181 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32418 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-14Update vboot submodule to upstream masterJoel Kitching
Updating from commit id 1e177741: 2019-02-14 05:27:16 -0800 - (vboot: rename VB2_DISABLE_DEVELOPER_MODE) to commit id 304aa429: 2019-03-12 10:38:56 -0700 - (futility: updater: Unit test for preserving sections using FMAP flags) This brings in 18 new commits. Change-Id: Ie2889ed0217c38734eb2c496ca20f95b6a12b102 Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31872 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-073rdparty/blobs: Update submodule pointerNico Huber
* Update SMU firmware for amd/stoneyridge * Remove stale Sandy Bridge MRC binaries Change-Id: Ifd1a9f02d96bc7cf5d23706a09634c0353dfae61 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31786 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-02-22Update vboot submodule to upstream masterJoel Kitching
Updating from commit id a32c930e: 2018-12-28 16:14:08 -0800 - (futility: updater: quirks: Support special released SNOW RO) to commit id 1e177741: 2019-02-14 05:27:16 -0800 - (vboot: rename VB2_DISABLE_DEVELOPER_MODE) This brings in 11 new commits. Change-Id: I59d83de49006a6d081b206716002697d39099aa4 Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/c/31542 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-16Update vboot submodule to upstream masterPatrick Georgi
Updating from commit id 392211f0: 2018-04-23 13:07:25 -0700 - (Update Android signing to support signature scheme v2) to commit id a32c930e: 2018-12-28 16:14:08 -0800 - (futility: updater: quirks: Support special released SNOW RO) This brings in 159 new commits. Change-Id: I7fea9ff1e4109d4dbc979289172191f677438933 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/30914 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-01-103rdparty/blobs: Update for current Intel microcodeNico Huber
The microcode included for `model_6xx` was for a 660, that path has changed. Change-Id: I09a41a8269cfdf8953bac10c9630922192851e73 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/30081 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-12-213rdparty/libgfxinit: Update submodule pointerArthur Heymans
Updates to current master. This includes: - A fix for textmode scaling on G45 - Refactor things to rely less on inline proving - Increased width of modeline fields to 32 bits Change-Id: Iab2915b747f6e4fa4e78eb28fea29bb3a9b3b687 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/30311 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-073rdparty/blobs: Update video BIOS to customize release binaryRichard Spiegel
A liara specific VBIOS was released and merged to blobs. Now coreboot need to point to the updated blob, so it can use liara specific VBIOS. Liara Chromebook Stoney VBIOS BRT39865 BRT39865.001 12/05/18,01:13:54 CL#1716128 @ 15.49.0.18 ATOMBuild#436504 Major Changes included: 1. First Stoney VBIOS released to Liara update eDP power up sequence. BUG=b:120534087 TEST=none Change-Id: I3b060b1ccfb311584afd0fb66258eb7cc942408d Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/c/30089 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2018-11-283rdparty/blobs: Add new blobRichard Spiegel
New VBIOS code has been added to blobs/mainboard/google/kahlee. It has been merged, so now coreboot needs to use latest blob. BUG=b:112618193 TEST=none Change-Id: If430ee06f03e0f20806bf8fd2b649814251ffcf5 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/c/29869 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-123rdparty/blobs: Update to include QuarkFspPatrick Georgi
Change-Id: I0032e86755750755e7ae6e2a53863e1600f96a5b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-053rdparty/fsp: update to current masterPatrick Georgi
This includes the SplitFspBin.py script. Change-Id: I6323a7a1a2bd9b5e11c0b21e5ea991a3fbd3daac Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/28775 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-09-02submodules: add FSP mirror as non-default submodulePatrick Georgi
Like the 3rdparty/blobs repo this isn't checked out by default. Right now you can manually check it out using $ git submodule init --checkout A follow up commit will add some automagic if USE_BLOBS and MAINBOARD_USES_FSP2_0 are enabled. Change-Id: Ie612495abc2a2d5947225e6ab54872aa72d4bec6 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/28303 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-273rdparty/blobs: Update submodule pointer to pull in latest changesPatrick Rudolph
* Include Cavium's CN81xx BL31.elf * mainboard/google: Add folder kahlee for video binary * Stoney Ridge: PSP bootloader update * cpu/intel: remove microcode header files for model_306ax Change-Id: Ie8f3b2e8db0692e95caee245733054e4e20f61ea Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/27647 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-07-023rdparty/blobs: Update submodule pointer to include latest AMD ucodePaul Menzel
The two commits below are added to the BLOBs repository. * fe7c6a3 pcengines/apu2: Disable ECC Exclusion range * 3854ad2 cpu/amd/family_15h: Add latest AMD ucode file The latest AMD microcode patches include Spectre mitigations. Change-Id: I4729cc054fe8267549d7369cea4d26aa51861e1c Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/27297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-083rdparty/libgfxinit: Update submodule pointerArthur Heymans
Update to current master. This includes: - G45 support - fixes scaling on eDP (needed for working textmode on eDP) - gfx_test drawing and moving cursors - Adding support for Tiling on <= Haswell - Allow changes to the framebuffer configurarion without resetting the pipe. Change-Id: I4ff3c17ec7308115de7bf2f2bb9276c2fad41253 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/26823 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-233rdparty/libgfxinit: Update submodule pointerNico Huber
Update to current master. Beside a minor workaround for GCC 8 compatibility, this includes only refactorings and preparations for G4x support. Change-Id: I6b2aa6bd9d41b852dacd8e1dfe89d92c8a548121 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26420 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-233rdparty/chromeec: Update to latest masterPatrick Georgi
Includes the necessary changes to build with gcc 8.1 Change-Id: Ie8c3dede4d702ab7838162dbff09f94df34b7c91 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/26453 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-223rdparty/libhwbase: Update submodule pointerNico Huber
Pull a minor update for GCC 8 compatibility. Change-Id: I0a4af47d56f3ca0b8ed82533e84c44041661ca35 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26306 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-153rdparty/blobs: Update submodule marker for Intel microcode updatesMartin Kepplinger
This adds the following changes to the blobs repository: 78a02a7 cpu/intel: microcode: add license agreement 1d37962 cpu/intel: add microcode updates 20180312 for new CPU models 8b8bbce cpu/intel: apply microcode updates 20180312 to currently tracked models In short: Bump Intel microcode updates. They include spectre/meltdown mitigations. Change-Id: I141f4446bc4e3bff5641bc39b70b299dc09ac8a7 Signed-off-by: Martin Kepplinger <martink@posteo.de> Reviewed-on: https://review.coreboot.org/26270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-12Revert "3rdparty/blobs: Update submodule marker for Intel microcode updates"Nico Huber
This reverts commit 0ff9daac45d604fa4864394616e335e20af26c3e. It points to a stale commit under review; i.e. not to a commit on blob.git's master branch like it's supposed to. Change-Id: I19cb8a32b3971c3104e381673ca08ae4d3979128 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26241 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-05-113rdparty/blobs: Update submodule marker for Intel microcode updatesMartin Kepplinger
This moves the blobs submodule marker forward to include the following: b45abbd cpu/intel: microcode: add license agreement 1d37962 cpu/intel: add microcode updates 20180312 for new CPU models 8b8bbce cpu/intel: apply microcode updates 20180312 to currently tracked models in short: bump Intel's microcode updates to the latest version. This includes Spectre/Meltdown mitigations. Change-Id: I4ab74ae0bdcf2a109b0697ad233fbb812b5c4544 Signed-off-by: Martin Kepplinger <martink@posteo.de> Reviewed-on: https://review.coreboot.org/25505 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-26Update vboot submodule to upstream masterDuncan Laurie
Updating from commit id e0b38418: - image_signing: Add sha1sum of keys in keyset to VERSION.signer. To commit id 392211f0: - Update Android signing to support signature scheme v2 This fixes bulding with depthcharge master. Change-Id: I07b570f54b26a937a5a7c53ade464e0c7a550312 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/25837 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-04-133rdparty/libgfxinit: Update submodule pointerNico Huber
Update libgfxinit to current master. Changes include: * a fix to decode the size stolen memory correctly on pre-SandyBridge hardware, * a PCI id based generation check, obsoleting the old check based on PCH audio ids, * some minor improvements around rarely used DDI ports (D and E), and * added support for tiled and rotated framebuffers on Skylake+ hardware (less interesting for coreboot, I guess?). TEST=Booted kontron/ktqm77 (Ivy Bridge) and pending kontron/bsl6 (Skylake) both with text and linear framebuffers and observed FILO's prompt showing up. Change-Id: I9a3c35c60b9edf8775f3a489df7577092910e127 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/25453 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-03-16stoneyridge: Update AGESA binary and AGESA.hRichard Spiegel
AGESA.bin was updated in the binary repo, so update the submodule pointer. Among other changes, this added a callback "AGESA_HALT_THIS_AP", which requires updated header files. BUG=b:70338633 TEST=build kahlee. Change-Id: I5a07f1c539d00aed34cfe45d6d7ef60c1dc56566 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/25183 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-02-22Update chromeec submodule to upstream masterMartin Roth
Updating from commit id 9fb10386a: 2017-06-21 04:19:06 -0700 (Poppy: Configure camera PMIC to low power mode.) to commit id 927b64a0b: 2018-02-15 00:10:45 -0800 (meowth: zoombini: enable CONFIG_CMD_PD_CONTROL) This brings in 1205 new commits. Change-Id: I3f7a1ceb1ea8c70d57a8f067023358b93df2670b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/23480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-02-05Update blobs submodule to upstream masterMarc Jones
Updating from commit id a5efee5: 2018-01-04 16:24:19 -0700 - (Kahlee/Grunt: Move remaining stoneyridge blobs) to commit id 19dea8d: 2018-02-01 08:51:06 -0700 - (soc/amd/Stoneyridge: Update PSP binaries to AGESA 1.3.0.9) This brings in 2 new commits. Change-Id: I7858ad8be13d9992949effb0216723d2480fa74d Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/23562 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2018-02-02Update arm-trusted-firmware submodule to current upstream masterJulius Werner
This patch updates the arm-trusted-firmware submodule from: commit 9fd4a36c408a254d887106e6e3960d496456be2c (Merge pull request #1211 from Leo-Yan/remove_ca73_cpu_nap_state) to commit 693e278e308441d716f7f5116c43aa150955da31 (Merge pull request #1245 from antonio-nino-diaz-arm/an/checkpatch) This brings in 79 new commits. Change-Id: Ieceb07760178f8ddbb5cafebabeb78f8def4072d Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/23555 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-01-25src/soc/amd/stoneyridge/Kconfig: Use vbios new locationRichard Spiegel
3rdparty/blobs was updated to move northbridge/amd/00670F00 contents into soc/amd/stoneyridge. Now soc/amd/stoneyridge/Kconfig needs to be updated to use VBIOS.bin new location. BUG=b:70785272 TEST=Update 3rdparty/blobs master branch, try to build kahlee. It should fail. Update soc/amd/stoneyridge/Kconfig, try to build kahlee again, it should work (need to rebuild .config first). CQ-DEPEND=CL:881709 Change-Id: I8cb9874eedc4a5d41d42b3f727c6d3cb9b920b5a Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/23398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-23Update vboot submodule to upstream masterMartin Roth
Updating from commit id f6780a36: 2017-12-01 14:54:40 -0800 - (firmware: header tweaks for depthcharge) to commit id e0b38418: 2018-01-16 04:08:26 -0800 - (image_signing: Add sha1sum of keys in keyset to VERSION.signer.) This brings in 25 new commits. Change-Id: If60f19decd91eaafec1d555c1e7d3ca0249d8068 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/23332 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23Update arm-trusted-firmware submodule to upstream masterMartin Roth
Updating from commit id b1187232: 2017-06-20 15:34:54 +0100 - (Merge pull request #992 from davidcunado-arm/dc/fix-signed-comparisons) to commit id 9fd4a36c: 2018-01-17 17:34:29 +0000 - (Merge pull request #1211 from Leo-Yan/remove_ca73_cpu_nap_state) This brings in 596 new commits. Change-Id: Icbe7ede1583f715f3e30bf013df6ba164319e3a1 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/23331 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-01-073rdparty/blobs/soc/amd/stoneyridge: Use new location of stoneyridge blobRichard Spiegel
Stoneyridge related contents of 3rdparty/blobs/southbridge/amd/kern were moved to 3rdparty/blobs/southbridge/amd/stoneyridge. Commit the new blob to coreboot, and modify src/soc/amd/stoneyridge/Kconfig to use it. BUG=b:69613465 TEST=Build and run kahlee. Change-Id: I1784824dc7767c620e2fcbad7c6e5674934832ff Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/23125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-12-12drivers/intel/gma: Power up legacy VGA block earlyNico Huber
This is required at least on Skylake to be able to configure text mode. 3rdparty/libgfxinit is also updated by the single commit: 42fb2d065d gma: Add procedure to power up legacy VGA block Change-Id: I2fe144765e2b2acd9f6b76db375cae5b8feb5489 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/21386 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>