aboutsummaryrefslogtreecommitdiff
path: root/3rdparty/intel-microcode
AgeCommit message (Collapse)Author
2022-02-10Update intel-microcode submodule to upstream masterMartin Roth
Updating from commit id 3f97690: 2021-06-08 09:44:38 -0700 - (microcode-20210608 Release) to commit id 115c3e4: 2022-02-07 18:23:52 -0800 - (microcode-20220207 Release) This brings in 1 new commits: 115c3e4 microcode-20220207 Release Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Idb2dcd3e3ef9692e21109ac0e8bdfa9f61740f14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61769 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2021-08-133rdparty/intel-microcode: Update submodule to 20210608 releaseTim Crawford
Update submodule pointer to include microcode for TGL and others. Tested the following still boot: - galp3-c (WHL-U): sig=0x806eb pf=0x80 revision=0xe9 - oryp5 (CFL-H): sig=0x906ea pf=0x20 revision=0xe9 - gaze15 (CML-H): sig=0xa0652 pf=0x20 revision=0xe9 coreboot reports the revision as -1 from what it actually is. i.e., these should report revision=0xea (and that is what Linux reports). However, this behavior is not new. Change-Id: I084ba67e8eaf7383f1c05fa5589b63c92ff900b1 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56861 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-233rdparty/intel-microcode: Update submodule to 20201118 releaseTim Crawford
Update submodule pointer to include microcode for CML-H and others. Change-Id: Ide211b0b163f824a3cfa6500a73aea1e2176c652 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47914 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-083rdparty/intel-microcode: Update submodule to 20200616 releaseAngel Pons
Change-Id: Ia250765e2cb81d6a39ad00ebbab20e7b87fa42d1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43758 Reviewed-by: Michael Niewöhner Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-283rdparty/intel-microcode: Update submodule pointer to 20191115 releaseFelix Singer
Update submodule pointer to 20191115 release to include the microcode update for CML-U62, and others. Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: I4765a70be0b1182acd340a3c31a5d71fd0ab500f Reviewed-on: https://review.coreboot.org/c/coreboot/+/40597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-06-18Add intel-microcode submodule repositoryzaolin
Change-Id: Icc5ac0a8033e371ecf2b4b28ba45dab961e86b3f Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33550 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>