diff options
Diffstat (limited to 'util/superiotool/smsc.c')
| -rw-r--r-- | util/superiotool/smsc.c | 103 |
1 files changed, 85 insertions, 18 deletions
diff --git a/util/superiotool/smsc.c b/util/superiotool/smsc.c index 8c14b35d8e..3538d1db0d 100644 --- a/util/superiotool/smsc.c +++ b/util/superiotool/smsc.c @@ -27,20 +27,14 @@ #define DEVICE_REV_REG 0x21 const static struct superio_registers reg_table[] = { - {0x28, "FDC37N769", { - {NOLDN, NULL, - {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, - 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, - 0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d, - 0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27, - 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, - {0x28,0x9c,0x88,0x70,0x00,0x00,0xff,0x00,0x00,0x00, - 0x00,0x00,0x02,0x28,NANA,0x00,0x00,0x80,RSVD,RSVD, - NANA,NANA,NANA,0x03,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD, - 0x80,0x00,0x3c,RSVD,RSVD,0x00,0x00,0x00,0x00,0x00, - 0x00,0x00,RSVD,0x00,0x00,0x03,0x00,0x00,EOT}}, + /* The following Super I/Os use the 0x20/0x21 ID registers. */ + {0x0e, "LPC47N252", { /* From sensors-detect */ + {EOT}}}, + {0x14, "LPC47M172", { {EOT}}}, - {0x42, "FDC37B80x", { + {0x40, "FDC37C672/FDC37C67x", { /* Chiprev: 0x01 */ + {EOT}}}, + {0x42, "FDC37B80x/FDC37M707", { {EOT}}}, {0x44, "FDC37B78x", { {NOLDN, NULL, @@ -85,6 +79,8 @@ const static struct superio_registers reg_table[] = { {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, {EOT}}}, + {0x47, "FDC37M60x", { /* TODO: Not yet in sensors-detect */ + {EOT}}}, {0x4c, "FDC37B72x", { {NOLDN, NULL, {0x03,0x07,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28, @@ -155,11 +151,9 @@ const static struct superio_registers reg_table[] = { NANA,NANA,NANA,NANA,0x00,0x00,0x00,0x00,RSVD,RSVD, RSVD,RSVD,RSVD,RSVD,EOT}}, {EOT}}}, - {0x47, "FDC37M60x", { - {EOT}}}, {0x51, "LPC47B27x", { {EOT}}}, - {0x59, "LPC47M10x", { + {0x52, "LPC47B37x", { {NOLDN, NULL, {0x03,0x07,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28, 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -194,17 +188,35 @@ const static struct superio_registers reg_table[] = { {0x30,0x60,0x61,0x70,EOT}, {0x00,0x03,0x30,0x05,EOT}}, {EOT}}}, - {0x60, "LPC47M15x", { + {0x54, "LPC47U33x", { + {EOT}}}, + {0x56, "LPC47B34x", { + {EOT}}}, + {0x57, "LPC47S42x", { + {EOT}}}, + {0x59, "LPC47M10x/112/13x", { + {EOT}}}, + {0x5d, "LPC47B357", { /* From sensors-detect (no datasheet) */ + {EOT}}}, + {0x5f, "LPC47M14x", { + {EOT}}}, + {0x60, "LPC47M15x/192/997", { {EOT}}}, {0x62, "LPC47S45x", { {EOT}}}, - {0x6e, "LPC47B387", { + {0x6b, "LPC47M292", { /* From sensors-detect */ + {EOT}}}, + {0x6e, "LPC47B387", { /* TODO: Not yet in sensors-detect */ /* Found in the HP Compaq Business Desktop d530 Series */ /* http://thread.gmane.org/gmane.linux.bios/26648 */ /* We cannot find a public datasheet for this Super I/O. */ {EOT}}}, {0x6f, "LPC47B397", { {EOT}}}, + {0x74, "LPC47M182", { + {EOT}}}, + {0x76, "LPC47M584", { /* From sensors-detect (no datasheet) */ + {EOT}}}, {0x77, "A8000", { /* ASUS A8000, a rebranded DME1737(?) */ {NOLDN, NULL, {0x03,0x07,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28, @@ -259,13 +271,68 @@ const static struct superio_registers reg_table[] = { {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}}, {EOT}}}, + {0x79, "SCH5504", { /* From sensors-detect (no datasheet) */ + {EOT}}}, +#if 0 + {0x7a, "Unknown", { /* Found in Toshiba Satellite A80-117. */ + {EOT}}}, +#endif + {0x7c, "SCH3112", { + {EOT}}}, + {0x7d, "SCH3114", { + {EOT}}}, + {0x7f, "SCH3116", { + {EOT}}}, {0x81, "SCH5307", { {EOT}}}, + {0x85, "SCH5317", { /* From sensors-detect */ + {EOT}}}, + {0x90, "SCH4307", { /* From sensors-detect */ + {EOT}}}, + + /* The following Super I/Os use the 0x0d/0x0e ID registers. */ + {0x03, "FDC37C669", { + /* Init: 0x55, 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */ + /* Chiprev: 0x02. */ + {EOT}}}, + {0x04, "FDC37C669FR", { /* TODO: Not yet in sensors-detect. */ + /* Init: 0x55, 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */ + {EOT}}}, + {0x28, "FDC37N769", { + /* Init: 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */ + {NOLDN, NULL, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, + 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, + 0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d, + 0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27, + 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, + {0x28,0x9c,0x88,0x70,0x00,0x00,0xff,0x00,0x00,0x00, + 0x00,0x00,0x02,0x28,NANA,0x00,0x00,0x80,RSVD,RSVD, + NANA,NANA,NANA,0x03,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD, + 0x80,0x00,0x3c,RSVD,RSVD,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,RSVD,0x00,0x00,0x03,0x00,0x00,EOT}}, + {EOT}}}, + {0x5a, "LPC47N227", { + /* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */ + {EOT}}}, + {0x65, "FDC37C665GT/IR", { + /* Init: 0x55, 0x55. Exit: 0xaa. Port: 0x3f0. */ + /* Chiprev: 0x02 = FDC37C665GT, 0x82 = FDC37C665IR */ + {EOT}}}, + {0x66, "FDC37C666GT", { + /* Init: 0x55, 0x55. Exit: 0xaa. Port: 0x3f0. Chiprev: 0x02. */ + {EOT}}}, {EOT} }; static void enter_conf_mode_smsc(uint16_t port) { + /* Some of the SMSC Super I/Os have an 0x55,0x55 init, some only + * require one 0x55. We do 0x55,0x55 for all of them at the moment, + * in the assumption that the extra 0x55 won't hurt the other + * Super I/Os. This is verified to be true on (at least) the FDC37N769. + */ + outb(0x55, port); outb(0x55, port); } |