summaryrefslogtreecommitdiff
path: root/util/romcc
diff options
context:
space:
mode:
Diffstat (limited to 'util/romcc')
-rw-r--r--util/romcc/tests/hello_world.c40
-rw-r--r--util/romcc/tests/hello_world1.c40
-rw-r--r--util/romcc/tests/hello_world2.c40
-rw-r--r--util/romcc/tests/raminit_test.c36
-rw-r--r--util/romcc/tests/raminit_test1.c36
-rw-r--r--util/romcc/tests/raminit_test2.c36
-rw-r--r--util/romcc/tests/simple_test.c24
-rw-r--r--util/romcc/tests/simple_test1.c24
-rw-r--r--util/romcc/tests/simple_test20.c36
-rw-r--r--util/romcc/tests/simple_test27.c40
-rw-r--r--util/romcc/tests/simple_test4.c36
11 files changed, 194 insertions, 194 deletions
diff --git a/util/romcc/tests/hello_world.c b/util/romcc/tests/hello_world.c
index 6dd80d89b8..b5ce540dc9 100644
--- a/util/romcc/tests/hello_world.c
+++ b/util/romcc/tests/hello_world.c
@@ -9,31 +9,31 @@ unsigned char inb(unsigned short port)
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#if TTYS0_BAUD == 115200
-#define TTYS0_DIV (1)
+#if CONFIG_TTYS0_BAUD == 115200
+#define CONFIG_TTYS0_DIV (1)
#else
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
#endif
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -55,7 +55,7 @@ unsigned char inb(unsigned short port)
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -66,14 +66,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
static void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -82,14 +82,14 @@ static void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
diff --git a/util/romcc/tests/hello_world1.c b/util/romcc/tests/hello_world1.c
index 6dd80d89b8..b5ce540dc9 100644
--- a/util/romcc/tests/hello_world1.c
+++ b/util/romcc/tests/hello_world1.c
@@ -9,31 +9,31 @@ unsigned char inb(unsigned short port)
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#if TTYS0_BAUD == 115200
-#define TTYS0_DIV (1)
+#if CONFIG_TTYS0_BAUD == 115200
+#define CONFIG_TTYS0_DIV (1)
#else
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
#endif
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -55,7 +55,7 @@ unsigned char inb(unsigned short port)
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -66,14 +66,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
static void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -82,14 +82,14 @@ static void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
diff --git a/util/romcc/tests/hello_world2.c b/util/romcc/tests/hello_world2.c
index 7990dcb518..18380d37e8 100644
--- a/util/romcc/tests/hello_world2.c
+++ b/util/romcc/tests/hello_world2.c
@@ -9,31 +9,31 @@ unsigned char inb(unsigned short port)
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#if TTYS0_BAUD == 115200
-#define TTYS0_DIV (1)
+#if CONFIG_TTYS0_BAUD == 115200
+#define CONFIG_TTYS0_DIV (1)
#else
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
#endif
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -55,7 +55,7 @@ unsigned char inb(unsigned short port)
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -66,14 +66,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
static void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -82,14 +82,14 @@ static void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
diff --git a/util/romcc/tests/raminit_test.c b/util/romcc/tests/raminit_test.c
index 9b6cf5d31c..2c6fa8c750 100644
--- a/util/romcc/tests/raminit_test.c
+++ b/util/romcc/tests/raminit_test.c
@@ -83,27 +83,27 @@ static void pcibios_write_config_dword(
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -125,7 +125,7 @@ static void pcibios_write_config_dword(
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -136,14 +136,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -151,14 +151,14 @@ void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
void __console_tx_char(unsigned char byte)
diff --git a/util/romcc/tests/raminit_test1.c b/util/romcc/tests/raminit_test1.c
index 9b6cf5d31c..2c6fa8c750 100644
--- a/util/romcc/tests/raminit_test1.c
+++ b/util/romcc/tests/raminit_test1.c
@@ -83,27 +83,27 @@ static void pcibios_write_config_dword(
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -125,7 +125,7 @@ static void pcibios_write_config_dword(
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -136,14 +136,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -151,14 +151,14 @@ void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
void __console_tx_char(unsigned char byte)
diff --git a/util/romcc/tests/raminit_test2.c b/util/romcc/tests/raminit_test2.c
index 68747a7a91..2294b34e78 100644
--- a/util/romcc/tests/raminit_test2.c
+++ b/util/romcc/tests/raminit_test2.c
@@ -83,27 +83,27 @@ static void pcibios_write_config_dword(
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -125,7 +125,7 @@ static void pcibios_write_config_dword(
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -136,14 +136,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -151,14 +151,14 @@ void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
void __console_tx_char(unsigned char byte)
diff --git a/util/romcc/tests/simple_test.c b/util/romcc/tests/simple_test.c
index feacbfdc38..4065c51a2f 100644
--- a/util/romcc/tests/simple_test.c
+++ b/util/romcc/tests/simple_test.c
@@ -25,27 +25,27 @@ static unsigned int config_cmd2(unsigned char bus, unsigned devfn, unsigned wher
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -67,7 +67,7 @@ static unsigned int config_cmd2(unsigned char bus, unsigned devfn, unsigned wher
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -78,14 +78,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
diff --git a/util/romcc/tests/simple_test1.c b/util/romcc/tests/simple_test1.c
index feacbfdc38..4065c51a2f 100644
--- a/util/romcc/tests/simple_test1.c
+++ b/util/romcc/tests/simple_test1.c
@@ -25,27 +25,27 @@ static unsigned int config_cmd2(unsigned char bus, unsigned devfn, unsigned wher
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -67,7 +67,7 @@ static unsigned int config_cmd2(unsigned char bus, unsigned devfn, unsigned wher
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -78,14 +78,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
diff --git a/util/romcc/tests/simple_test20.c b/util/romcc/tests/simple_test20.c
index 71af19cf2f..1998853af1 100644
--- a/util/romcc/tests/simple_test20.c
+++ b/util/romcc/tests/simple_test20.c
@@ -33,27 +33,27 @@ static unsigned int pcibios_read_config_dword(
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -75,7 +75,7 @@ static unsigned int pcibios_read_config_dword(
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -86,14 +86,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -101,14 +101,14 @@ void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
void __console_tx_char(unsigned char byte)
diff --git a/util/romcc/tests/simple_test27.c b/util/romcc/tests/simple_test27.c
index d40e43f1c4..f278f62e8a 100644
--- a/util/romcc/tests/simple_test27.c
+++ b/util/romcc/tests/simple_test27.c
@@ -9,31 +9,31 @@ unsigned char inb(unsigned short port)
}
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#if TTYS0_BAUD == 115200
-#define TTYS0_DIV (1)
+#if CONFIG_TTYS0_BAUD == 115200
+#define CONFIG_TTYS0_DIV (1)
#else
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
#endif
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -55,7 +55,7 @@ unsigned char inb(unsigned short port)
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -66,14 +66,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
static void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -82,14 +82,14 @@ static void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
diff --git a/util/romcc/tests/simple_test4.c b/util/romcc/tests/simple_test4.c
index 57af2af390..4f72dcad67 100644
--- a/util/romcc/tests/simple_test4.c
+++ b/util/romcc/tests/simple_test4.c
@@ -96,27 +96,27 @@ int log2(int value)
/* Base Address */
-#ifndef TTYS0_BASE
-#define TTYS0_BASE 0x3f8
+#ifndef CONFIG_TTYS0_BASE
+#define CONFIG_TTYS0_BASE 0x3f8
#endif
-#ifndef TTYS0_BAUD
-#define TTYS0_BAUD 115200
+#ifndef CONFIG_TTYS0_BAUD
+#define CONFIG_TTYS0_BAUD 115200
#endif
-#if ((115200%TTYS0_BAUD) != 0)
+#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
-#define TTYS0_DIV (115200/TTYS0_BAUD)
+#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
/* Line Control Settings */
-#ifndef TTYS0_LCS
+#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
-#define TTYS0_LCS 0x3
+#define CONFIG_TTYS0_LCS 0x3
#endif
-#define UART_LCS TTYS0_LCS
+#define UART_LCS CONFIG_TTYS0_LCS
/* Data */
#define UART_RBR 0x00
@@ -138,7 +138,7 @@ int log2(int value)
int uart_can_tx_byte(void)
{
- return inb(TTYS0_BASE + UART_LSR) & 0x20;
+ return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
void uart_wait_to_tx_byte(void)
@@ -149,14 +149,14 @@ void uart_wait_to_tx_byte(void)
void uart_wait_until_sent(void)
{
- while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
- outb(data, TTYS0_BASE + UART_TBR);
+ outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -164,14 +164,14 @@ void uart_tx_byte(unsigned char data)
void uart_init(void)
{
/* disable interrupts */
- outb(0x0, TTYS0_BASE + UART_IER);
+ outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
- outb(0x01, TTYS0_BASE + UART_FCR);
+ outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
- outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
- outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
- outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
- outb(UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
+ outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
+ outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
void __console_tx_char(unsigned char byte)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 05:28:59 +0000