diff options
Diffstat (limited to 'util/flashrom')
40 files changed, 0 insertions, 11967 deletions
diff --git a/util/flashrom/82802ab.c b/util/flashrom/82802ab.c deleted file mode 100644 index 0d071d4101..0000000000 --- a/util/flashrom/82802ab.c +++ /dev/null @@ -1,206 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Datasheet: - * - Name: Intel 82802AB/82802AC Firmware Hub (FWH) - * - URL: http://www.intel.com/design/chipsets/datashts/290658.htm - * - PDF: http://download.intel.com/design/chipsets/datashts/29065804.pdf - * - Order number: 290658-004 - */ - -#include <stdio.h> -#include <string.h> -#include <stdint.h> -#include "flash.h" - -// I need that Berkeley bit-map printer -void print_82802ab_status(uint8_t status) -{ - printf("%s", status & 0x80 ? "Ready:" : "Busy:"); - printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:"); - printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:"); - printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:"); - printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:"); - printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:"); - printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:"); -} - -int probe_82802ab(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - -#if 0 - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x90, bios + 0x5555); -#endif - - chip_writeb(0xff, bios); - myusec_delay(10); - chip_writeb(0x90, bios); - myusec_delay(10); - - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - /* Leave ID mode */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); - - myusec_delay(10); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - - if (id1 != flash->manufacture_id || id2 != flash->model_id) - return 0; - - map_flash_registers(flash); - - return 1; -} - -uint8_t wait_82802ab(volatile uint8_t *bios) -{ - uint8_t status; - uint8_t id1, id2; - - chip_writeb(0x70, bios); - if ((chip_readb(bios) & 0x80) == 0) { // it's busy - while ((chip_readb(bios) & 0x80) == 0) ; - } - - status = chip_readb(bios); - - // put another command to get out of status register mode - - chip_writeb(0x90, bios); - myusec_delay(10); - - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - // this is needed to jam it out of "read id" mode - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); - - return status; -} - -int erase_82802ab_block(struct flashchip *flash, int offset) -{ - volatile uint8_t *bios = flash->virtual_memory + offset; - volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2; - int j; - uint8_t status; - - // clear status register - chip_writeb(0x50, bios); - //printf("Erase at %p\n", bios); - // clear write protect - //printf("write protect is at %p\n", (wrprotect)); - //printf("write protect is 0x%x\n", *(wrprotect)); - chip_writeb(0, wrprotect); - //printf("write protect is 0x%x\n", *(wrprotect)); - - // now start it - chip_writeb(0x20, bios); - chip_writeb(0xd0, bios); - myusec_delay(10); - // now let's see what the register is - status = wait_82802ab(flash->virtual_memory); - //print_82802ab_status(status); - for (j = 0; j < flash->page_size; j++) { - if (chip_readb(bios + j) != 0xFF) { - printf("BLOCK ERASE failed at 0x%x\n", offset); - return -1; - } - } - printf("DONE BLOCK 0x%x\n", offset); - - return 0; -} - -int erase_82802ab(struct flashchip *flash) -{ - int i; - unsigned int total_size = flash->total_size * 1024; - - printf("total_size is %d; flash->page_size is %d\n", - total_size, flash->page_size); - for (i = 0; i < total_size; i += flash->page_size) - erase_82802ab_block(flash, i); - printf("DONE ERASE\n"); - - return 0; -} - -void write_page_82802ab(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, int page_size) -{ - int i; - - for (i = 0; i < page_size; i++) { - /* transfer data from source to destination */ - chip_writeb(0x40, dst); - chip_writeb(*src++, dst++); - wait_82802ab(bios); - } -} - -int write_82802ab(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - printf("Programming page: \n"); - for (i = 0; i < total_size / page_size; i++) { - printf - ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - printf("%04d at address: 0x%08x", i, i * page_size); - - /* Auto Skip Blocks, which already contain the desired data - * Faster, because we only write, what has changed - * More secure, because blocks, which are excluded - * (with the exclude or layout feature) - * or not erased and rewritten; their data is retained also in - * sudden power off situations - */ - if (!memcmp((void *)(buf + i * page_size), - (void *)(bios + i * page_size), page_size)) { - printf("SKIPPED\n"); - continue; - } - - /* erase block by block and write block by block; this is the most secure way */ - erase_82802ab_block(flash, i * page_size); - write_page_82802ab(bios, buf + i * page_size, - bios + i * page_size, page_size); - } - printf("\n"); - protect_jedec(bios); - - return 0; -} diff --git a/util/flashrom/COPYING b/util/flashrom/COPYING deleted file mode 100644 index d511905c16..0000000000 --- a/util/flashrom/COPYING +++ /dev/null @@ -1,339 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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" - @$(shell ( echo "#include <pci/pci.h>"; \ - echo "struct pci_access *pacc;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) - @$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) >/dev/null 2>&1 && \ - echo "found." || ( echo "not found."; echo; \ - echo "Please install pciutils-devel and zlib-devel."; \ - echo "See README for more information."; echo; \ - rm -f .test.c .test; exit 1) - @rm -f .test.c .test - -install: $(PROGRAM) - $(INSTALL) $(PROGRAM) $(PREFIX)/sbin - mkdir -p $(PREFIX)/share/man/man8 - $(INSTALL) $(PROGRAM).8 $(PREFIX)/share/man/man8 - -.PHONY: all clean distclean dep pciutils - --include .dependencies diff --git a/util/flashrom/README b/util/flashrom/README deleted file mode 100644 index a272080479..0000000000 --- a/util/flashrom/README +++ /dev/null @@ -1,89 +0,0 @@ -------------------------------------------------------------------------------- -flashrom README -------------------------------------------------------------------------------- - -flashrom is a utility for reading, writing, and erasing flash ROM chips. -It's often used to flash BIOS/coreboot/firmware images. - -It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and -TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, -or SPI. - -(see http://coreboot.org for details on coreboot) - - -Build Requirements ------------------- - -To build the flashrom utility you need to install the following packages: - -* pciutils -* pciutils-devel / pciutils-dev / libpci-dev -* zlib-devel / zlib1g-dev - - -Usage / Options ---------------- - -Please see the flashrom(8) manpage. - - -Exit status ------------ - -flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem -(/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails. - - -coreboot Table and Mainboard Identification --------------------------------------------- - -flashrom reads the coreboot table to determine the current mainboard. If no -coreboot table could be read or if you want to override these values, you can -specify -m, e.g.: - - $ flashrom -w --mainboard AGAMI:ARUMA agami_aruma.rom - -See the 'Supported mainboards' section in the output of 'flashrom -L' for -a list of boards which require the specification of the board name, if no -coreboot table is found. - - -ROM Layout Support ------------------- - -flashrom supports ROM layouts. This allows you to flash certain parts of -the flash chip only. A ROM layout file looks like follows: - - 00000000:00008fff gfxrom - 00009000:0003ffff normal - 00040000:0007ffff fallback - - i.e.: - startaddr:endaddr name - - All addresses are offsets within the file, not absolute addresses! - -If you only want to update the normal image in a ROM you can say: - - flashrom -w --layout rom.layout --image normal agami_aruma.rom - -To update normal and fallback but leave the VGA BIOS alone, say: - - flashrom -w -l rom.layout -i normal -i fallback agami_aruma.rom - -Currently overlapping sections are not supported. - -ROM layouts should replace the -s and -e option since they are more -flexible and they should lead to a ROM update file format with the -ROM layout and the ROM image in one file (cpio, zip or something?). - - -Supported Flash Chips / Chipsets / Mainboards ---------------------------------------------- - -Please check the output of 'flashrom -L' for the list of supported -flash chips, chipsets/southbridges, and mainboards. - -See also http://coreboot.org/Flashrom for more details. - diff --git a/util/flashrom/REPOSITORY_MOVED.txt b/util/flashrom/REPOSITORY_MOVED.txt deleted file mode 100644 index 5b430d5a66..0000000000 --- a/util/flashrom/REPOSITORY_MOVED.txt +++ /dev/null @@ -1,5 +0,0 @@ -The repository can now be found at -svn://svn.coreboot.org/flashrom - -The main line of development is at -svn://svn.coreboot.org/flashrom/trunk diff --git a/util/flashrom/am29f040b.c b/util/flashrom/am29f040b.c deleted file mode 100644 index 87e9c708b9..0000000000 --- a/util/flashrom/am29f040b.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <stdint.h> -#include "flash.h" - -static __inline__ int erase_sector_29f040b(volatile uint8_t *bios, - unsigned long address) -{ - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0x80, bios + 0x555); - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0x30, bios + address); - - sleep(2); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios + address); - - return 0; -} - -static __inline__ int write_sector_29f040b(volatile uint8_t *bios, - uint8_t *src, - volatile uint8_t *dst, - unsigned int page_size) -{ - int i; - - for (i = 0; i < page_size; i++) { - if ((i & 0xfff) == 0xfff) - printf("0x%08lx", (unsigned long)dst - - (unsigned long)bios); - - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0xA0, bios + 0x555); - chip_writeb(*src++, dst++); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); - - if ((i & 0xfff) == 0xfff) - printf("\b\b\b\b\b\b\b\b\b\b"); - } - - return 0; -} - -int probe_29f040b(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0x90, bios + 0x555); - - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - chip_writeb(0xF0, bios); - - myusec_delay(10); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) - return 1; - - return 0; -} - -int erase_29f040b(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0x80, bios + 0x555); - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0x10, bios + 0x555); - - myusec_delay(10); - toggle_ready_jedec(bios); - - return 0; -} - -int write_29f040b(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - printf("Programming page "); - for (i = 0; i < total_size / page_size; i++) { - /* erase the page before programming */ - erase_sector_29f040b(bios, i * page_size); - - /* write to the sector */ - printf("%04d at address: ", i); - write_sector_29f040b(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - - return 0; -} diff --git a/util/flashrom/board_enable.c b/util/flashrom/board_enable.c deleted file mode 100644 index 6fd2a84c51..0000000000 --- a/util/flashrom/board_enable.c +++ /dev/null @@ -1,820 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de> - * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de> - * Copyright (C) 2007-2008 Luc Verhaegen <libv@skynet.be> - * Copyright (C) 2007 Carl-Daniel Hailfinger - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Contains the board specific flash enables. - */ - -#include <stdio.h> -#include <pci/pci.h> -#include <stdint.h> -#include <string.h> -#include <fcntl.h> -#include "flash.h" - -/* - * Helper functions for many Winbond Super I/Os of the W836xx range. - */ -/* Enter extended functions */ -void w836xx_ext_enter(uint16_t port) -{ - OUTB(0x87, port); - OUTB(0x87, port); -} - -/* Leave extended functions */ -void w836xx_ext_leave(uint16_t port) -{ - OUTB(0xAA, port); -} - -/* General functions for reading/writing Winbond Super I/Os. */ -unsigned char wbsio_read(uint16_t index, uint8_t reg) -{ - OUTB(reg, index); - return INB(index + 1); -} - -void wbsio_write(uint16_t index, uint8_t reg, uint8_t data) -{ - OUTB(reg, index); - OUTB(data, index + 1); -} - -void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask) -{ - uint8_t tmp; - - OUTB(reg, index); - tmp = INB(index + 1) & ~mask; - OUTB(tmp | (data & mask), index + 1); -} - -/** - * Winbond W83627HF: Raise GPIO24. - * - * Suited for: - * - Agami Aruma - * - IWILL DK8-HTX - */ -static int w83627hf_gpio24_raise(uint16_t index, const char *name) -{ - w836xx_ext_enter(index); - - /* Is this the W83627HF? */ - if (wbsio_read(index, 0x20) != 0x52) { /* Super I/O device ID reg. */ - fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n", - name, wbsio_read(index, 0x20)); - w836xx_ext_leave(index); - return -1; - } - - /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */ - wbsio_mask(index, 0x2B, 0x10, 0x10); - - /* Select logical device 8: GPIO port 2 */ - wbsio_write(index, 0x07, 0x08); - - wbsio_mask(index, 0x30, 0x01, 0x01); /* Activate logical device. */ - wbsio_mask(index, 0xF0, 0x00, 0x10); /* GPIO24 -> output */ - wbsio_mask(index, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ - wbsio_mask(index, 0xF1, 0x10, 0x10); /* Raise GPIO24 */ - - w836xx_ext_leave(index); - - return 0; -} - -static int w83627hf_gpio24_raise_2e(const char *name) -{ - return w83627hf_gpio24_raise(0x2e, name); -} - -/** - * Winbond W83627THF: GPIO 4, bit 4 - * - * Suited for: - * - MSI K8T Neo2-F - * - MSI K8N-NEO3 - */ -static int w83627thf_gpio4_4_raise(uint16_t index, const char *name) -{ - w836xx_ext_enter(index); - - /* Is this the W83627THF? */ - if (wbsio_read(index, 0x20) != 0x82) { /* Super I/O device ID reg. */ - fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n", - name, wbsio_read(index, 0x20)); - w836xx_ext_leave(index); - return -1; - } - - /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */ - - wbsio_write(index, 0x07, 0x09); /* Select LDN 9: GPIO port 4 */ - wbsio_mask(index, 0x30, 0x02, 0x02); /* Activate logical device. */ - wbsio_mask(index, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */ - wbsio_mask(index, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */ - wbsio_mask(index, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */ - - w836xx_ext_leave(index); - - return 0; -} - -static int w83627thf_gpio4_4_raise_2e(const char *name) -{ - return w83627thf_gpio4_4_raise(0x2e, name); -} - -static int w83627thf_gpio4_4_raise_4e(const char *name) -{ - return w83627thf_gpio4_4_raise(0x4e, name); -} - -/** - * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs. - * - * We don't need to do this when using coreboot, GPIO15 is never lowered there. - */ -static int board_via_epia_m(const char *name) -{ - struct pci_dev *dev; - uint16_t base; - uint8_t val; - - dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */ - if (!dev) { - fprintf(stderr, "\nERROR: VT8235 ISA bridge not found.\n"); - return -1; - } - - /* GPIO12-15 -> output */ - val = pci_read_byte(dev, 0xE4); - val |= 0x10; - pci_write_byte(dev, 0xE4, val); - - /* Get Power Management IO address. */ - base = pci_read_word(dev, 0x88) & 0xFF80; - - /* Enable GPIO15 which is connected to write protect. */ - val = INB(base + 0x4D); - val |= 0x80; - OUTB(val, base + 0x4D); - - return 0; -} - -/** - * Suited for: - * - ASUS A7V8X-MX SE and A7V400-MX: AMD K7 + VIA KM400A + VT8235 - * - Tyan Tomcat K7M: AMD Geode NX + VIA KM400 + VT8237. - */ -static int board_asus_a7v8x_mx(const char *name) -{ - struct pci_dev *dev; - uint8_t val; - - dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */ - if (!dev) - dev = pci_dev_find(0x1106, 0x3227); /* VT8237 ISA bridge */ - if (!dev) { - fprintf(stderr, "\nERROR: VT823x ISA bridge not found.\n"); - return -1; - } - - /* This bit is marked reserved actually. */ - val = pci_read_byte(dev, 0x59); - val &= 0x7F; - pci_write_byte(dev, 0x59, val); - - /* Raise ROM MEMW# line on Winbond W83697 Super I/O. */ - w836xx_ext_enter(0x2E); - - if (!(wbsio_read(0x2E, 0x24) & 0x02)) /* Flash ROM enabled? */ - wbsio_mask(0x2E, 0x24, 0x08, 0x08); /* Enable MEMW#. */ - - w836xx_ext_leave(0x2E); - - return 0; -} - -/** - * Suited for VIAs EPIA SP. - */ -static int board_via_epia_sp(const char *name) -{ - struct pci_dev *dev; - uint8_t val; - - dev = pci_dev_find(0x1106, 0x3227); /* VT8237R ISA bridge */ - if (!dev) { - fprintf(stderr, "\nERROR: VT8237R ISA bridge not found.\n"); - return -1; - } - - /* All memory cycles, not just ROM ones, go to LPC */ - val = pci_read_byte(dev, 0x59); - val &= ~0x80; - pci_write_byte(dev, 0x59, val); - - return 0; -} - -/** - * Suited for ASUS P5A. - * - * This is rather nasty code, but there's no way to do this cleanly. - * We're basically talking to some unknown device on SMBus, my guess - * is that it is the Winbond W83781D that lives near the DIP BIOS. - */ -static int board_asus_p5a(const char *name) -{ - uint8_t tmp; - int i; - -#define ASUSP5A_LOOP 5000 - - OUTB(0x00, 0xE807); - OUTB(0xEF, 0xE803); - - OUTB(0xFF, 0xE800); - - for (i = 0; i < ASUSP5A_LOOP; i++) { - OUTB(0xE1, 0xFF); - if (INB(0xE800) & 0x04) - break; - } - - if (i == ASUSP5A_LOOP) { - printf("%s: Unable to contact device.\n", name); - return -1; - } - - OUTB(0x20, 0xE801); - OUTB(0x20, 0xE1); - - OUTB(0xFF, 0xE802); - - for (i = 0; i < ASUSP5A_LOOP; i++) { - tmp = INB(0xE800); - if (tmp & 0x70) - break; - } - - if ((i == ASUSP5A_LOOP) || !(tmp & 0x10)) { - printf("%s: failed to read device.\n", name); - return -1; - } - - tmp = INB(0xE804); - tmp &= ~0x02; - - OUTB(0x00, 0xE807); - OUTB(0xEE, 0xE803); - - OUTB(tmp, 0xE804); - - OUTB(0xFF, 0xE800); - OUTB(0xE1, 0xFF); - - OUTB(0x20, 0xE801); - OUTB(0x20, 0xE1); - - OUTB(0xFF, 0xE802); - - for (i = 0; i < ASUSP5A_LOOP; i++) { - tmp = INB(0xE800); - if (tmp & 0x70) - break; - } - - if ((i == ASUSP5A_LOOP) || !(tmp & 0x10)) { - printf("%s: failed to write to device.\n", name); - return -1; - } - - return 0; -} - -static int board_ibm_x3455(const char *name) -{ - uint8_t byte; - - /* Set GPIO lines in the Broadcom HT-1000 southbridge. */ - OUTB(0x45, 0xcd6); - byte = INB(0xcd7); - OUTB(byte | 0x20, 0xcd7); - - return 0; -} - -static int board_hp_dl145_g3_enable(const char *name) -{ - uint8_t byte; - - /* Set GPIO lines in the Broadcom HT-1000 southbridge. */ - OUTB(0x44, 0xcd6); /* GPIO 0 reg from PM regs */ - byte = INB(0xcd7); - /* Set GPIO 2 and 5 high, connected to flash WP# and TBL# pins. */ - OUTB(byte | 0x24, 0xcd7); - - return 0; -} - -/** - * Suited for EPoX EP-BX3, and maybe some other Intel 440BX based boards. - */ -static int board_epox_ep_bx3(const char *name) -{ - uint8_t tmp; - - /* Raise GPIO22. */ - tmp = INB(0x4036); - OUTB(tmp, 0xEB); - - tmp |= 0x40; - - OUTB(tmp, 0x4036); - OUTB(tmp, 0xEB); - - return 0; -} - -/** - * Suited for Acorp 6A815EPD. - */ -static int board_acorp_6a815epd(const char *name) -{ - struct pci_dev *dev; - uint16_t port; - uint8_t val; - - dev = pci_dev_find(0x8086, 0x2440); /* Intel ICH2 LPC */ - if (!dev) { - fprintf(stderr, "\nERROR: ICH2 LPC bridge not found.\n"); - return -1; - } - - /* Use GPIOBASE register to find where the GPIO is mapped. */ - port = (pci_read_word(dev, 0x58) & 0xFFC0) + 0xE; - - val = INB(port); - val |= 0x80; /* Top Block Lock -- pin 8 of PLCC32 */ - val |= 0x40; /* Lower Blocks Lock -- pin 7 of PLCC32 */ - OUTB(val, port); - - return 0; -} - -/** - * Suited for Artec Group DBE61 and DBE62. - */ -static int board_artecgroup_dbe6x(const char *name) -{ -#define DBE6x_MSR_DIVIL_BALL_OPTS 0x51400015 -#define DBE6x_PRI_BOOT_LOC_SHIFT (2) -#define DBE6x_BOOT_OP_LATCHED_SHIFT (8) -#define DBE6x_SEC_BOOT_LOC_SHIFT (10) -#define DBE6x_PRI_BOOT_LOC (3 << DBE6x_PRI_BOOT_LOC_SHIFT) -#define DBE6x_BOOT_OP_LATCHED (3 << DBE6x_BOOT_OP_LATCHED_SHIFT) -#define DBE6x_SEC_BOOT_LOC (3 << DBE6x_SEC_BOOT_LOC_SHIFT) -#define DBE6x_BOOT_LOC_FLASH (2) -#define DBE6x_BOOT_LOC_FWHUB (3) - - unsigned long msr[2]; - int msr_fd; - unsigned long boot_loc; - - msr_fd = open("/dev/cpu/0/msr", O_RDWR); - if (msr_fd == -1) { - perror("open /dev/cpu/0/msr"); - return -1; - } - - if (lseek(msr_fd, DBE6x_MSR_DIVIL_BALL_OPTS, SEEK_SET) == -1) { - perror("lseek"); - close(msr_fd); - return -1; - } - - if (read(msr_fd, (void *)msr, 8) != 8) { - perror("read"); - close(msr_fd); - return -1; - } - - if ((msr[0] & (DBE6x_BOOT_OP_LATCHED)) == - (DBE6x_BOOT_LOC_FWHUB << DBE6x_BOOT_OP_LATCHED_SHIFT)) - boot_loc = DBE6x_BOOT_LOC_FWHUB; - else - boot_loc = DBE6x_BOOT_LOC_FLASH; - - msr[0] &= ~(DBE6x_PRI_BOOT_LOC | DBE6x_SEC_BOOT_LOC); - msr[0] |= ((boot_loc << DBE6x_PRI_BOOT_LOC_SHIFT) | - (boot_loc << DBE6x_SEC_BOOT_LOC_SHIFT)); - - if (lseek(msr_fd, DBE6x_MSR_DIVIL_BALL_OPTS, SEEK_SET) == -1) { - perror("lseek"); - close(msr_fd); - return -1; - } - - if (write(msr_fd, (void *)msr, 8) != 8) { - perror("write"); - close(msr_fd); - return -1; - } - - close(msr_fd); - return 0; -} - -/** - * Set the specified GPIO on the specified ICHx southbridge to high. - * - * @param name The name of this board. - * @param ich_vendor PCI vendor ID of the specified ICHx southbridge. - * @param ich_device PCI device ID of the specified ICHx southbridge. - * @param gpiobase_reg GPIOBASE register offset in the LPC bridge. - * @param gp_lvl Offset of GP_LVL register in I/O space, relative to GPIOBASE. - * @param gp_lvl_bitmask GP_LVL bitmask (set GPIO bits to 1, all others to 0). - * @param gpio_bit The bit (GPIO) which shall be set to high. - * @return If the write-enable was successful return 0, otherwise return -1. - */ -static int ich_gpio_raise(const char *name, uint16_t ich_vendor, - uint16_t ich_device, uint8_t gpiobase_reg, - uint8_t gp_lvl, uint32_t gp_lvl_bitmask, - unsigned int gpio_bit) -{ - struct pci_dev *dev; - uint16_t gpiobar; - uint32_t reg32; - - dev = pci_dev_find(ich_vendor, ich_device); /* Intel ICHx LPC */ - if (!dev) { - fprintf(stderr, "\nERROR: ICHx LPC dev %4x:%4x not found.\n", - ich_vendor, ich_device); - return -1; - } - - /* Use GPIOBASE register to find the I/O space for GPIO. */ - gpiobar = pci_read_word(dev, gpiobase_reg) & gp_lvl_bitmask; - - /* Set specified GPIO to high. */ - reg32 = INL(gpiobar + gp_lvl); - reg32 |= (1 << gpio_bit); - OUTL(reg32, gpiobar + gp_lvl); - - return 0; -} - -/** - * Suited for ASUS P4B266. - */ -static int ich2_gpio22_raise(const char *name) -{ - return ich_gpio_raise(name, 0x8086, 0x2440, 0x58, 0x0c, 0xffc0, 22); -} - -/** - * Suited for MSI MS-7046. - */ -static int ich6_gpio19_raise(const char *name) -{ - return ich_gpio_raise(name, 0x8086, 0x2640, 0x48, 0x0c, 0xffc0, 19); -} - -static int board_kontron_986lcd_m(const char *name) -{ - struct pci_dev *dev; - uint16_t gpiobar; - uint32_t val; - -#define ICH7_GPIO_LVL2 0x38 - - dev = pci_dev_find(0x8086, 0x27b8); /* Intel ICH7 LPC */ - if (!dev) { - // This will never happen on this board - fprintf(stderr, "\nERROR: ICH7 LPC bridge not found.\n"); - return -1; - } - - /* Use GPIOBASE register to find where the GPIO is mapped. */ - gpiobar = pci_read_word(dev, 0x48) & 0xfffc; - - val = INL(gpiobar + ICH7_GPIO_LVL2); /* GP_LVL2 */ - printf_debug("\nGPIOBAR=0x%04x GP_LVL: 0x%08x\n", gpiobar, val); - - /* bit 2 (0x04) = 0 #TBL --> bootblock locking = 1 - * bit 2 (0x04) = 1 #TBL --> bootblock locking = 0 - * bit 3 (0x08) = 0 #WP --> block locking = 1 - * bit 3 (0x08) = 1 #WP --> block locking = 0 - * - * To enable full block locking, you would do: - * val &= ~ ((1 << 2) | (1 << 3)); - */ - val |= (1 << 2) | (1 << 3); - - OUTL(val, gpiobar + ICH7_GPIO_LVL2); - - return 0; -} - -/** - * Suited for: - * - BioStar P4M80-M4: Intel P4 + VIA P4M800 + VT8237 - * - GIGABYTE GA-7VT600: AMD K7 + VIA KT600 + VT8237 - */ -static int board_biostar_p4m80_m4(const char *name) -{ - /* enter IT87xx conf mode */ - OUTB(0x87, 0x2e); - OUTB(0x01, 0x2e); - OUTB(0x55, 0x2e); - OUTB(0x55, 0x2e); - - /* select right flash chip */ - wbsio_mask(0x2e, 0x22, 0x80, 0x80); - - /* bit 3: flash chip write enable - * bit 7: map flash chip at 1MB-128K (why though? ignoring this.) - */ - wbsio_mask(0x2e, 0x24, 0x04, 0x04); - - /* exit IT87xx conf mode */ - wbsio_write(0x2, 0x2e, 0x2); - - return 0; -} - -/** - * Winbond W83697HF Super I/O + VIA VT8235 southbridge - * - * Suited for: - * - MSI KT4V and KT4V-L: AMD K7 + VIA KT400 + VT8235 - * - MSI KT3 Ultra2: AMD K7 + VIA KT333 + VT8235 - */ -static int board_msi_kt4v(const char *name) -{ - struct pci_dev *dev; - uint8_t val; - uint32_t val2; - uint16_t port; - - dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */ - if (!dev) { - fprintf(stderr, "\nERROR: VT823x ISA bridge not found.\n"); - return -1; - } - - val = pci_read_byte(dev, 0x59); - val &= 0x0c; - pci_write_byte(dev, 0x59, val); - - /* We need the I/O Base Address for this board's flash enable. */ - port = pci_read_word(dev, 0x88) & 0xff80; - - /* Starting at 'I/O Base + 0x4c' is the GPO Port Output Value. - * We must assert GPO12 for our enable, which is in 0x4d. - */ - val2 = INB(port + 0x4d); - val2 |= 0x10; - OUTB(val2, port + 0x4d); - - /* Raise ROM MEMW# line on Winbond W83697 Super I/O. */ - w836xx_ext_enter(0x2e); - if (!(wbsio_read(0x2e, 0x24) & 0x02)) { /* Flash ROM enabled? */ - /* Enable MEMW# and set ROM size select to max. (4M). */ - wbsio_mask(0x2e, 0x24, 0x28, 0x28); - } - w836xx_ext_leave(0x2e); - - return 0; -} - -/** - * We use 2 sets of IDs here, you're free to choose which is which. This - * is to provide a very high degree of certainty when matching a board on - * the basis of subsystem/card IDs. As not every vendor handles - * subsystem/card IDs in a sane manner. - * - * Keep the second set NULLed if it should be ignored. Keep the subsystem IDs - * NULLed if they don't identify the board fully. But please take care to - * provide an as complete set of pci ids as possible; autodetection is the - * preferred behaviour and we would like to make sure that matches are unique. - * - * The coreboot ids are used two fold. When running with a coreboot firmware, - * the ids uniquely matches the coreboot board identification string. When a - * legacy bios is installed and when autodetection is not possible, these ids - * can be used to identify the board through the -m command line argument. - * - * When a board is identified through its coreboot ids (in both cases), the - * main pci ids are still required to match, as a safeguard. - */ -struct board_pciid_enable { - /* Any device, but make it sensible, like the ISA bridge. */ - uint16_t first_vendor; - uint16_t first_device; - uint16_t first_card_vendor; - uint16_t first_card_device; - - /* Any device, but make it sensible, like - * the host bridge. May be NULL. - */ - uint16_t second_vendor; - uint16_t second_device; - uint16_t second_card_vendor; - uint16_t second_card_device; - - /* The vendor / part name from the coreboot table. */ - const char *lb_vendor; - const char *lb_part; - - const char *name; - int (*enable) (const char *name); -}; - -struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], coreboot id [2], boardname, flash enable */ - {0x1106, 0x0571, 0x1462, 0x7120, 0, 0, 0, 0, "msi", "kt4v", "MSI KT4V", board_msi_kt4v}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS P4B266", ich2_gpio22_raise}, - {0x10de, 0x0360, 0, 0, 0, 0, 0, 0, "gigabyte", "m57sli", "GIGABYTE GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0, 0, 0, 0, "gigabyte", "m61p", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4385, 0x1458, 0x4385, NULL, NULL, "GIGABYTE GA-MA78G-DS3H", it87xx_probe_spi_flash}, - /* SB600 LPC, RD790 North. Neither are specific to the GA-MA790FX-DQ6. The coreboot ID is here to be able to trigger the board enable more easily. */ - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, "gigabyte", "ma790fx-dq6", "GIGABYTE GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1039, 0x0761, 0, 0, 0, 0, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x10de, 0x005e, 0, 0, 0, 0, 0, 0, "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, - {0x1022, 0x746B, 0x1022, 0x36C0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx}, - {0x1106, 0x3227, 0x1106, 0xAA01, 0x1106, 0x0259, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA SP", board_via_epia_sp}, - {0x1106, 0x0314, 0x1106, 0xaa08, 0x1106, 0x3227, 0x1106, 0xAA08, NULL, NULL, "VIA EPIA-CN", board_via_epia_sp}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan Tomcat K7M", board_asus_a7v8x_mx}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS P5A", board_asus_p5a}, - {0x1166, 0x0205, 0x1014, 0x0347, 0, 0, 0, 0, "ibm", "x3455", "IBM x3455", board_ibm_x3455}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX EP-BX3", board_epox_ep_bx3}, - {0x8086, 0x1130, 0, 0, 0x105a, 0x0d30, 0x105a, 0x4d33, "acorp", "6a815epd", "Acorp 6A815EPD", board_acorp_6a815epd}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group DBE62", board_artecgroup_dbe6x}, - /* Note: There are >= 2 version of the Kontron 986LCD-M/mITX! */ - {0x8086, 0x27b8, 0, 0, 0, 0, 0, 0, "kontron", "986lcd-m", "Kontron 986LCD-M", board_kontron_986lcd_m}, - {0x10ec, 0x8168, 0x10ec, 0x8168, 0x104c, 0x8023, 0x104c, 0x8019, "kontron", "986lcd-m", "Kontron 986LCD-M", board_kontron_986lcd_m}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "BioStar P4M80-M4", board_biostar_p4m80_m4}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE GA-7VT600", board_biostar_p4m80_m4}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI K8T Neo2", w83627thf_gpio4_4_raise_2e}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel D201GLY", wbsio_check_for_spi}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI MS-7046", ich6_gpio19_raise}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP DL145 G3", board_hp_dl145_g3_enable}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, "via", "pc3500g", "VIA PC3500G", it87xx_probe_spi_flash}, - { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL}, /* end marker */ -}; - -void print_supported_boards(void) -{ - int i; - - printf("\nSupported mainboards (this list is not exhaustive!):\n\n"); - - for (i = 0; board_pciid_enables[i].name != NULL; i++) { - if (board_pciid_enables[i].lb_vendor != NULL) { - printf("%s (-m %s:%s)\n", board_pciid_enables[i].name, - board_pciid_enables[i].lb_vendor, - board_pciid_enables[i].lb_part); - } else { - printf("%s (autodetected)\n", - board_pciid_enables[i].name); - } - } - - printf("\nSee also: http://coreboot.org/Flashrom\n"); -} - -/** - * Match boards on coreboot table gathered vendor and part name. - * Require main PCI IDs to match too as extra safety. - */ -static struct board_pciid_enable *board_match_coreboot_name(const char *vendor, - const char *part) -{ - struct board_pciid_enable *board = board_pciid_enables; - struct board_pciid_enable *partmatch = NULL; - - for (; board->name; board++) { - if (vendor && (!board->lb_vendor - || strcasecmp(board->lb_vendor, vendor))) - continue; - - if (!board->lb_part || strcasecmp(board->lb_part, part)) - continue; - - if (!pci_dev_find(board->first_vendor, board->first_device)) - continue; - - if (board->second_vendor && - !pci_dev_find(board->second_vendor, board->second_device)) - continue; - - if (vendor) - return board; - - if (partmatch) { - /* a second entry has a matching part name */ - printf("AMBIGUOUS BOARD NAME: %s\n", part); - printf("At least vendors '%s' and '%s' match.\n", - partmatch->lb_vendor, board->lb_vendor); - printf("Please use the full -m vendor:part syntax.\n"); - return NULL; - } - partmatch = board; - } - - if (partmatch) - return partmatch; - - printf("\nUnknown vendor:board from coreboot table or -m option: %s:%s\n\n", vendor, part); - return NULL; -} - -/** - * Match boards on PCI IDs and subsystem IDs. - * Second set of IDs can be main only or missing completely. - */ -static struct board_pciid_enable *board_match_pci_card_ids(void) -{ - struct board_pciid_enable *board = board_pciid_enables; - - for (; board->name; board++) { - if (!board->first_card_vendor || !board->first_card_device) - continue; - - if (!pci_card_find(board->first_vendor, board->first_device, - board->first_card_vendor, - board->first_card_device)) - continue; - - if (board->second_vendor) { - if (board->second_card_vendor) { - if (!pci_card_find(board->second_vendor, - board->second_device, - board->second_card_vendor, - board->second_card_device)) - continue; - } else { - if (!pci_dev_find(board->second_vendor, - board->second_device)) - continue; - } - } - - return board; - } - - return NULL; -} - -int board_flash_enable(const char *vendor, const char *part) -{ - struct board_pciid_enable *board = NULL; - int ret = 0; - - if (part) - board = board_match_coreboot_name(vendor, part); - - if (!board) - board = board_match_pci_card_ids(); - - if (board) { - printf("Found board \"%s\", enabling flash write... ", - board->name); - - ret = board->enable(board->name); - if (ret) - printf("FAILED!\n"); - else - printf("OK.\n"); - } - - return ret; -} diff --git a/util/flashrom/cbtable.c b/util/flashrom/cbtable.c deleted file mode 100644 index 96b5d96da9..0000000000 --- a/util/flashrom/cbtable.c +++ /dev/null @@ -1,234 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2002 Steven James <pyro@linuxlabs.com> - * Copyright (C) 2002 Linux Networx - * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) - * Copyright (C) 2006-2009 coresystems GmbH - * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <stdint.h> -#include <stdlib.h> -#include <fcntl.h> -#include <unistd.h> -#include <sys/types.h> -#include <string.h> -#include <errno.h> -#include <sys/mman.h> -#include "flash.h" -#include "coreboot_tables.h" - -char *lb_part = NULL, *lb_vendor = NULL; - -static unsigned long compute_checksum(void *addr, unsigned long length) -{ - uint8_t *ptr; - volatile union { - uint8_t byte[2]; - uint16_t word; - } value; - unsigned long sum; - unsigned long i; - - /* In the most straight forward way possible, - * compute an ip style checksum. - */ - sum = 0; - ptr = addr; - for (i = 0; i < length; i++) { - unsigned long value; - value = ptr[i]; - if (i & 1) { - value <<= 8; - } - /* Add the new value */ - sum += value; - /* Wrap around the carry */ - if (sum > 0xFFFF) { - sum = (sum + (sum >> 16)) & 0xFFFF; - } - } - value.byte[0] = sum & 0xff; - value.byte[1] = (sum >> 8) & 0xff; - - return (~value.word) & 0xFFFF; -} - -#define for_each_lbrec(head, rec) \ - for(rec = (struct lb_record *)(((char *)head) + sizeof(*head)); \ - (((char *)rec) < (((char *)head) + sizeof(*head) + head->table_bytes)) && \ - (rec->size >= 1) && \ - ((((char *)rec) + rec->size) <= (((char *)head) + sizeof(*head) + head->table_bytes)); \ - rec = (struct lb_record *)(((char *)rec) + rec->size)) - -static int count_lb_records(struct lb_header *head) -{ - struct lb_record *rec; - int count; - - count = 0; - for_each_lbrec(head, rec) { - count++; - } - - return count; -} - -static struct lb_header *find_lb_table(void *base, unsigned long start, - unsigned long end) -{ - unsigned long addr; - - /* For now be stupid.... */ - for (addr = start; addr < end; addr += 16) { - struct lb_header *head = - (struct lb_header *)(((char *)base) + addr); - struct lb_record *recs = - (struct lb_record *)(((char *)base) + addr + sizeof(*head)); - if (memcmp(head->signature, "LBIO", 4) != 0) - continue; - printf_debug("Found canidate at: %08lx-%08lx\n", - addr, addr + head->table_bytes); - if (head->header_bytes != sizeof(*head)) { - fprintf(stderr, "Header bytes of %d are incorrect.\n", - head->header_bytes); - continue; - } - if (count_lb_records(head) != head->table_entries) { - fprintf(stderr, "Bad record count: %d.\n", - head->table_entries); - continue; - } - if (compute_checksum((uint8_t *) head, sizeof(*head)) != 0) { - fprintf(stderr, "Bad header checksum.\n"); - continue; - } - if (compute_checksum(recs, head->table_bytes) - != head->table_checksum) { - fprintf(stderr, "Bad table checksum: %04x.\n", - head->table_checksum); - continue; - } - printf_debug("Found coreboot table at 0x%08lx.\n", addr); - return head; - - }; - - return 0; -} - -static void find_mainboard(struct lb_record *ptr, unsigned long addr) -{ - struct lb_mainboard *rec; - int max_size; - char vendor[256], part[256]; - - rec = (struct lb_mainboard *)ptr; - max_size = rec->size - sizeof(*rec); - printf("Vendor ID: %.*s, part ID: %.*s\n", - max_size - rec->vendor_idx, - rec->strings + rec->vendor_idx, - max_size - rec->part_number_idx, - rec->strings + rec->part_number_idx); - snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, - rec->strings + rec->vendor_idx); - snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, - rec->strings + rec->part_number_idx); - - if (lb_part) { - printf("Overwritten by command line, vendor ID: %s, part ID: %s.\n", lb_vendor, lb_part); - } else { - lb_part = strdup(part); - lb_vendor = strdup(vendor); - } -} - -static struct lb_record *next_record(struct lb_record *rec) -{ - return (struct lb_record *)(((char *)rec) + rec->size); -} - -static void search_lb_records(struct lb_record *rec, struct lb_record *last, - unsigned long addr) -{ - struct lb_record *next; - int count; - count = 0; - - for (next = next_record(rec); (rec < last) && (next <= last); - rec = next, addr += rec->size) { - next = next_record(rec); - count++; - if (rec->tag == LB_TAG_MAINBOARD) { - find_mainboard(rec, addr); - break; - } - } -} - -#define BYTES_TO_MAP (1024*1024) -int coreboot_init(void) -{ - uint8_t *table_area; - unsigned long addr, start; - struct lb_header *lb_table; - struct lb_record *rec, *last; - -#ifdef __DARWIN__ - /* This is a hack. DirectIO fails to map physical address 0x00000000. - * Why? - */ - start = 0x400; -#else - start = 0x0; -#endif - table_area = physmap("low megabyte", start, BYTES_TO_MAP); - - lb_table = find_lb_table(table_area, 0x00000, 0x1000); - if (!lb_table) - lb_table = find_lb_table(table_area, 0xf0000, BYTES_TO_MAP); - if (lb_table) { - struct lb_forward *forward = (struct lb_forward *) - (((char *)lb_table) + lb_table->header_bytes); - if (forward->tag == LB_TAG_FORWARD) { - start = forward->forward; - start &= ~(getpagesize() - 1); - physunmap(table_area, BYTES_TO_MAP); - table_area = physmap("high tables", start, BYTES_TO_MAP); - lb_table = find_lb_table(table_area, 0x00000, 0x1000); - } - } - - if (!lb_table) { - printf("No coreboot table found.\n"); - return -1; - } - - addr = ((char *)lb_table) - ((char *)table_area) + start; - fprintf(stdout, "coreboot table found at 0x%lx.\n", - (unsigned long)lb_table - (unsigned long)table_area + start); - rec = (struct lb_record *)(((char *)lb_table) + lb_table->header_bytes); - last = (struct lb_record *)(((char *)rec) + lb_table->table_bytes); - printf_debug("coreboot header(%d) checksum: %04x table(%d) checksum: %04x entries: %d\n", - lb_table->header_bytes, lb_table->header_checksum, - lb_table->table_bytes, lb_table->table_checksum, - lb_table->table_entries); - search_lb_records(rec, last, addr + lb_table->header_bytes); - - return 0; -} diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c deleted file mode 100644 index 21864af430..0000000000 --- a/util/flashrom/chipset_enable.c +++ /dev/null @@ -1,974 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de> - * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Contains the chipset specific flash enables. - */ - -#define _LARGEFILE64_SOURCE - -#include <stdio.h> -#include <pci/pci.h> -#include <stdlib.h> -#include <sys/types.h> -#include <sys/stat.h> -#include <sys/mman.h> -#include <fcntl.h> -#include <unistd.h> -#include "flash.h" - -unsigned long flashbase = 0; - -/** - * flashrom defaults to LPC flash devices. If a known SPI controller is found - * and the SPI strappings are set, this will be overwritten by the probing code. - * - * Eventually, this will become an array when multiple flash support works. - */ - -flashbus_t flashbus = BUS_TYPE_LPC; -void *spibar = NULL; - -extern int ichspi_lock; - -static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name) -{ - uint8_t tmp; - - /* - * ROM Write enable, 0xFFFC0000-0xFFFDFFFF and - * 0xFFFE0000-0xFFFFFFFF ROM select enable. - */ - tmp = pci_read_byte(dev, 0x47); - tmp |= 0x46; - pci_write_byte(dev, 0x47, tmp); - - return 0; -} - -static int enable_flash_sis630(struct pci_dev *dev, const char *name) -{ - uint8_t b; - - /* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ - b = pci_read_byte(dev, 0x40); - pci_write_byte(dev, 0x40, b | 0xb); - - /* Flash write enable on SiS 540/630. */ - b = pci_read_byte(dev, 0x45); - pci_write_byte(dev, 0x45, b | 0x40); - - /* The same thing on SiS 950 Super I/O side... */ - - /* First probe for Super I/O on config port 0x2e. */ - OUTB(0x87, 0x2e); - OUTB(0x01, 0x2e); - OUTB(0x55, 0x2e); - OUTB(0x55, 0x2e); - - if (INB(0x2f) != 0x87) { - /* If that failed, try config port 0x4e. */ - OUTB(0x87, 0x4e); - OUTB(0x01, 0x4e); - OUTB(0x55, 0x4e); - OUTB(0xaa, 0x4e); - if (INB(0x4f) != 0x87) { - printf("Can not access SiS 950\n"); - return -1; - } - OUTB(0x24, 0x4e); - b = INB(0x4f) | 0xfc; - OUTB(0x24, 0x4e); - OUTB(b, 0x4f); - OUTB(0x02, 0x4e); - OUTB(0x02, 0x4f); - } - - OUTB(0x24, 0x2e); - printf("2f is %#x\n", INB(0x2f)); - b = INB(0x2f) | 0xfc; - OUTB(0x24, 0x2e); - OUTB(b, 0x2f); - - OUTB(0x02, 0x2e); - OUTB(0x02, 0x2f); - - return 0; -} - -/* Datasheet: - * - Name: 82371AB PCI-TO-ISA / IDE XCELERATOR (PIIX4) - * - URL: http://www.intel.com/design/intarch/datashts/290562.htm - * - PDF: http://www.intel.com/design/intarch/datashts/29056201.pdf - * - Order Number: 290562-001 - */ -static int enable_flash_piix4(struct pci_dev *dev, const char *name) -{ - uint16_t old, new; - uint16_t xbcs = 0x4e; /* X-Bus Chip Select register. */ - - old = pci_read_word(dev, xbcs); - - /* Set bit 9: 1-Meg Extended BIOS Enable (PCI master accesses to - * FFF00000-FFF7FFFF are forwarded to ISA). - * Note: This bit is reserved on PIIX/PIIX3/MPIIX. - * Set bit 7: Extended BIOS Enable (PCI master accesses to - * FFF80000-FFFDFFFF are forwarded to ISA). - * Set bit 6: Lower BIOS Enable (PCI master, or ISA master accesses to - * the lower 64-Kbyte BIOS block (E0000-EFFFF) at the top - * of 1 Mbyte, or the aliases at the top of 4 Gbyte - * (FFFE0000-FFFEFFFF) result in the generation of BIOSCS#. - * Note: Accesses to FFFF0000-FFFFFFFF are always forwarded to ISA. - * Set bit 2: BIOSCS# Write Enable (1=enable, 0=disable). - */ - if (dev->device_id == 0x122e || dev->device_id == 0x7000 - || dev->device_id == 0x1234) - new = old | 0x00c4; /* PIIX/PIIX3/MPIIX: Bit 9 is reserved. */ - else - new = old | 0x02c4; - - if (new == old) - return 0; - - pci_write_word(dev, xbcs, new); - - if (pci_read_word(dev, xbcs) != new) { - printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", xbcs, new, name); - return -1; - } - - return 0; -} - -/* - * See ie. page 375 of "Intel I/O Controller Hub 7 (ICH7) Family Datasheet" - * http://download.intel.com/design/chipsets/datashts/30701303.pdf - */ -static int enable_flash_ich(struct pci_dev *dev, const char *name, - int bios_cntl) -{ - uint8_t old, new; - - /* - * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, but - * just treating it as 8 bit wide seems to work fine in practice. - */ - old = pci_read_byte(dev, bios_cntl); - - printf_debug("\nBIOS Lock Enable: %sabled, ", - (old & (1 << 1)) ? "en" : "dis"); - printf_debug("BIOS Write Enable: %sabled, ", - (old & (1 << 0)) ? "en" : "dis"); - printf_debug("BIOS_CNTL is 0x%x\n", old); - - new = old | 1; - - if (new == old) - return 0; - - pci_write_byte(dev, bios_cntl, new); - - if (pci_read_byte(dev, bios_cntl) != new) { - printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", bios_cntl, new, name); - return -1; - } - - return 0; -} - -static int enable_flash_ich_4e(struct pci_dev *dev, const char *name) -{ - return enable_flash_ich(dev, name, 0x4e); -} - -static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) -{ - return enable_flash_ich(dev, name, 0xdc); -} - -#define ICH_STRAP_RSVD 0x00 -#define ICH_STRAP_SPI 0x01 -#define ICH_STRAP_PCI 0x02 -#define ICH_STRAP_LPC 0x03 - -static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) -{ - uint32_t mmio_base; - - mmio_base = (pci_read_long(dev, 0xbc)) << 8; - printf_debug("MMIO base at = 0x%x\n", mmio_base); - spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70); - - printf_debug("0x6c: 0x%04x (CLOCK/DEBUG)\n", - *(uint16_t *) (spibar + 0x6c)); - - flashbus = BUS_TYPE_VIA_SPI; - ich_init_opcodes(); - - return 0; -} - -static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, - int ich_generation) -{ - int ret, i; - uint8_t old, new, bbs, buc; - uint16_t spibar_offset, tmp2; - uint32_t tmp, gcs; - void *rcrb; - //TODO: These names are incorrect for EP80579. For that, the solution would look like the commented line - //static const char *straps_names[] = {"SPI", "reserved", "reserved", "LPC" }; - static const char *straps_names[] = { "reserved", "SPI", "PCI", "LPC" }; - - /* Enable Flash Writes */ - ret = enable_flash_ich_dc(dev, name); - - /* Get physical address of Root Complex Register Block */ - tmp = pci_read_long(dev, 0xf0) & 0xffffc000; - printf_debug("\nRoot Complex Register Block address = 0x%x\n", tmp); - - /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); - - gcs = *(volatile uint32_t *)(rcrb + 0x3410); - printf_debug("GCS = 0x%x: ", gcs); - printf_debug("BIOS Interface Lock-Down: %sabled, ", - (gcs & 0x1) ? "en" : "dis"); - bbs = (gcs >> 10) & 0x3; - printf_debug("BOOT BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); - - buc = *(volatile uint8_t *)(rcrb + 0x3414); - printf_debug("Top Swap : %s\n", - (buc & 1) ? "enabled (A16 inverted)" : "not enabled"); - - /* It seems the ICH7 does not support SPI and LPC chips at the same - * time. At least not with our current code. So we prevent searching - * on ICH7 when the southbridge is strapped to LPC - */ - - if (ich_generation == 7 && bbs == ICH_STRAP_LPC) { - /* No further SPI initialization required */ - return ret; - } - - switch (ich_generation) { - case 7: - flashbus = BUS_TYPE_ICH7_SPI; - spibar_offset = 0x3020; - break; - case 8: - flashbus = BUS_TYPE_ICH9_SPI; - spibar_offset = 0x3020; - break; - case 9: - case 10: - default: /* Future version might behave the same */ - flashbus = BUS_TYPE_ICH9_SPI; - spibar_offset = 0x3800; - break; - } - - /* SPIBAR is at RCRB+0x3020 for ICH[78] and RCRB+0x3800 for ICH9. */ - printf_debug("SPIBAR = 0x%x + 0x%04x\n", tmp, spibar_offset); - - /* Assign Virtual Address */ - spibar = rcrb + spibar_offset; - - switch (flashbus) { - case BUS_TYPE_ICH7_SPI: - printf_debug("0x00: 0x%04x (SPIS)\n", - *(uint16_t *) (spibar + 0)); - printf_debug("0x02: 0x%04x (SPIC)\n", - *(uint16_t *) (spibar + 2)); - printf_debug("0x04: 0x%08x (SPIA)\n", - *(uint32_t *) (spibar + 4)); - for (i = 0; i < 8; i++) { - int offs; - offs = 8 + (i * 8); - printf_debug("0x%02x: 0x%08x (SPID%d)\n", offs, - *(uint32_t *) (spibar + offs), i); - printf_debug("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4, - *(uint32_t *) (spibar + offs + 4), i); - } - printf_debug("0x50: 0x%08x (BBAR)\n", - *(uint32_t *) (spibar + 0x50)); - printf_debug("0x54: 0x%04x (PREOP)\n", - *(uint16_t *) (spibar + 0x54)); - printf_debug("0x56: 0x%04x (OPTYPE)\n", - *(uint16_t *) (spibar + 0x56)); - printf_debug("0x58: 0x%08x (OPMENU)\n", - *(uint32_t *) (spibar + 0x58)); - printf_debug("0x5c: 0x%08x (OPMENU+4)\n", - *(uint32_t *) (spibar + 0x5c)); - for (i = 0; i < 4; i++) { - int offs; - offs = 0x60 + (i * 4); - printf_debug("0x%02x: 0x%08x (PBR%d)\n", offs, - *(uint32_t *) (spibar + offs), i); - } - printf_debug("\n"); - if ((*(uint16_t *) spibar) & (1 << 15)) { - printf("WARNING: SPI Configuration Lockdown activated.\n"); - ichspi_lock = 1; - } - ich_init_opcodes(); - break; - case BUS_TYPE_ICH9_SPI: - tmp2 = *(uint16_t *) (spibar + 4); - printf_debug("0x04: 0x%04x (HSFS)\n", tmp2); - printf_debug("FLOCKDN %i, ", (tmp2 >> 15 & 1)); - printf_debug("FDV %i, ", (tmp2 >> 14) & 1); - printf_debug("FDOPSS %i, ", (tmp2 >> 13) & 1); - printf_debug("SCIP %i, ", (tmp2 >> 5) & 1); - printf_debug("BERASE %i, ", (tmp2 >> 3) & 3); - printf_debug("AEL %i, ", (tmp2 >> 2) & 1); - printf_debug("FCERR %i, ", (tmp2 >> 1) & 1); - printf_debug("FDONE %i\n", (tmp2 >> 0) & 1); - - tmp = *(uint32_t *) (spibar + 0x50); - printf_debug("0x50: 0x%08x (FRAP)\n", tmp); - printf_debug("BMWAG %i, ", (tmp >> 24) & 0xff); - printf_debug("BMRAG %i, ", (tmp >> 16) & 0xff); - printf_debug("BRWA %i, ", (tmp >> 8) & 0xff); - printf_debug("BRRA %i\n", (tmp >> 0) & 0xff); - - printf_debug("0x54: 0x%08x (FREG0)\n", - *(uint32_t *) (spibar + 0x54)); - printf_debug("0x58: 0x%08x (FREG1)\n", - *(uint32_t *) (spibar + 0x58)); - printf_debug("0x5C: 0x%08x (FREG2)\n", - *(uint32_t *) (spibar + 0x5C)); - printf_debug("0x60: 0x%08x (FREG3)\n", - *(uint32_t *) (spibar + 0x60)); - printf_debug("0x64: 0x%08x (FREG4)\n", - *(uint32_t *) (spibar + 0x64)); - printf_debug("0x74: 0x%08x (PR0)\n", - *(uint32_t *) (spibar + 0x74)); - printf_debug("0x78: 0x%08x (PR1)\n", - *(uint32_t *) (spibar + 0x78)); - printf_debug("0x7C: 0x%08x (PR2)\n", - *(uint32_t *) (spibar + 0x7C)); - printf_debug("0x80: 0x%08x (PR3)\n", - *(uint32_t *) (spibar + 0x80)); - printf_debug("0x84: 0x%08x (PR4)\n", - *(uint32_t *) (spibar + 0x84)); - printf_debug("0x90: 0x%08x (SSFS, SSFC)\n", - *(uint32_t *) (spibar + 0x90)); - printf_debug("0x94: 0x%04x (PREOP)\n", - *(uint16_t *) (spibar + 0x94)); - printf_debug("0x96: 0x%04x (OPTYPE)\n", - *(uint16_t *) (spibar + 0x96)); - printf_debug("0x98: 0x%08x (OPMENU)\n", - *(uint32_t *) (spibar + 0x98)); - printf_debug("0x9C: 0x%08x (OPMENU+4)\n", - *(uint32_t *) (spibar + 0x9C)); - printf_debug("0xA0: 0x%08x (BBAR)\n", - *(uint32_t *) (spibar + 0xA0)); - printf_debug("0xB0: 0x%08x (FDOC)\n", - *(uint32_t *) (spibar + 0xB0)); - if (tmp2 & (1 << 15)) { - printf("WARNING: SPI Configuration Lockdown activated.\n"); - ichspi_lock = 1; - } - ich_init_opcodes(); - break; - default: - /* Nothing */ - break; - } - - old = pci_read_byte(dev, 0xdc); - printf_debug("SPI Read Configuration: "); - new = (old >> 2) & 0x3; - switch (new) { - case 0: - case 1: - case 2: - printf_debug("prefetching %sabled, caching %sabled, ", - (new & 0x2) ? "en" : "dis", - (new & 0x1) ? "dis" : "en"); - break; - default: - printf_debug("invalid prefetching/caching settings, "); - break; - } - - return ret; -} - -static int enable_flash_ich7(struct pci_dev *dev, const char *name) -{ - return enable_flash_ich_dc_spi(dev, name, 7); -} - -static int enable_flash_ich8(struct pci_dev *dev, const char *name) -{ - return enable_flash_ich_dc_spi(dev, name, 8); -} - -static int enable_flash_ich9(struct pci_dev *dev, const char *name) -{ - return enable_flash_ich_dc_spi(dev, name, 9); -} - -static int enable_flash_ich10(struct pci_dev *dev, const char *name) -{ - return enable_flash_ich_dc_spi(dev, name, 10); -} - -static int enable_flash_vt823x(struct pci_dev *dev, const char *name) -{ - uint8_t val; - - /* enable ROM decode range (1MB) FFC00000 - FFFFFFFF */ - pci_write_byte(dev, 0x41, 0x7f); - - /* ROM write enable */ - val = pci_read_byte(dev, 0x40); - val |= 0x10; - pci_write_byte(dev, 0x40, val); - - if (pci_read_byte(dev, 0x40) != val) { - printf("\nWARNING: Failed to enable ROM Write on \"%s\"\n", - name); - return -1; - } - - return 0; -} - -static int enable_flash_cs5530(struct pci_dev *dev, const char *name) -{ - uint8_t reg8; - -#define DECODE_CONTROL_REG2 0x5b /* F0 index 0x5b */ -#define ROM_AT_LOGIC_CONTROL_REG 0x52 /* F0 index 0x52 */ - -#define LOWER_ROM_ADDRESS_RANGE (1 << 0) -#define ROM_WRITE_ENABLE (1 << 1) -#define UPPER_ROM_ADDRESS_RANGE (1 << 2) -#define BIOS_ROM_POSITIVE_DECODE (1 << 5) - - /* Decode 0x000E0000-0x000FFFFF (128 KB), not just 64 KB, and - * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 KB. - * Make the configured ROM areas writable. - */ - reg8 = pci_read_byte(dev, ROM_AT_LOGIC_CONTROL_REG); - reg8 |= LOWER_ROM_ADDRESS_RANGE; - reg8 |= UPPER_ROM_ADDRESS_RANGE; - reg8 |= ROM_WRITE_ENABLE; - pci_write_byte(dev, ROM_AT_LOGIC_CONTROL_REG, reg8); - - /* Set positive decode on ROM. */ - reg8 = pci_read_byte(dev, DECODE_CONTROL_REG2); - reg8 |= BIOS_ROM_POSITIVE_DECODE; - pci_write_byte(dev, DECODE_CONTROL_REG2, reg8); - - return 0; -} - -/** - * Geode systems write protect the BIOS via RCONFs (cache settings similar - * to MTRRs). To unlock, change MSR 0x1808 top byte to 0x22. Reading and - * writing to MSRs, however requires instructions rdmsr/wrmsr, which are - * ring0 privileged instructions so only the kernel can do the read/write. - * This function, therefore, requires that the msr kernel module be loaded - * to access these instructions from user space using device /dev/cpu/0/msr. - * - * This hard-coded location could have potential problems on SMP machines - * since it assumes cpu0, but it is safe on the Geode which is not SMP. - * - * Geode systems also write protect the NOR flash chip itself via MSR_NORF_CTL. - * To enable write to NOR Boot flash for the benefit of systems that have such - * a setup, raise MSR 0x51400018 WE_CS3 (write enable Boot Flash Chip Select). - * - * This is probably not portable beyond Linux. - */ -static int enable_flash_cs5536(struct pci_dev *dev, const char *name) -{ -#define MSR_RCONF_DEFAULT 0x1808 -#define MSR_NORF_CTL 0x51400018 - - int fd_msr; - unsigned char buf[8]; - - fd_msr = open("/dev/cpu/0/msr", O_RDWR); - if (!fd_msr) { - perror("open msr"); - return -1; - } - - if (lseek64(fd_msr, (off64_t) MSR_RCONF_DEFAULT, SEEK_SET) == -1) { - perror("lseek64"); - printf("Cannot operate on MSR. Did you run 'modprobe msr'?\n"); - close(fd_msr); - return -1; - } - - if (read(fd_msr, buf, 8) != 8) { - perror("read msr"); - close(fd_msr); - return -1; - } - - if (buf[7] != 0x22) { - buf[7] &= 0xfb; - if (lseek64(fd_msr, (off64_t) MSR_RCONF_DEFAULT, - SEEK_SET) == -1) { - perror("lseek64"); - close(fd_msr); - return -1; - } - - if (write(fd_msr, buf, 8) < 0) { - perror("msr write"); - close(fd_msr); - return -1; - } - } - - if (lseek64(fd_msr, (off64_t) MSR_NORF_CTL, SEEK_SET) == -1) { - perror("lseek64"); - close(fd_msr); - return -1; - } - - if (read(fd_msr, buf, 8) != 8) { - perror("read msr"); - close(fd_msr); - return -1; - } - - /* Raise WE_CS3 bit. */ - buf[0] |= 0x08; - - if (lseek64(fd_msr, (off64_t) MSR_NORF_CTL, SEEK_SET) == -1) { - perror("lseek64"); - close(fd_msr); - return -1; - } - if (write(fd_msr, buf, 8) < 0) { - perror("msr write"); - close(fd_msr); - return -1; - } - - close(fd_msr); - -#undef MSR_RCONF_DEFAULT -#undef MSR_NORF_CTL - return 0; -} - -static int enable_flash_sc1100(struct pci_dev *dev, const char *name) -{ - uint8_t new; - - pci_write_byte(dev, 0x52, 0xee); - - new = pci_read_byte(dev, 0x52); - - if (new != 0xee) { - printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x52, new, name); - return -1; - } - - return 0; -} - -static int enable_flash_sis5595(struct pci_dev *dev, const char *name) -{ - uint8_t new, newer; - - new = pci_read_byte(dev, 0x45); - - new &= (~0x20); /* Clear bit 5. */ - new |= 0x4; /* Set bit 2. */ - - pci_write_byte(dev, 0x45, new); - - newer = pci_read_byte(dev, 0x45); - if (newer != new) { - printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); - printf("Stuck at 0x%x\n", newer); - return -1; - } - - /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ - new = pci_read_byte(dev, 0x40); - new &= 0xFB; - new |= 0x3; - pci_write_byte(dev, 0x40, new); - newer = pci_read_byte(dev, 0x40); - if (newer != new) { - printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); - printf("Stuck at 0x%x\n", newer); - return -1; - } - return 0; -} - -/* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ -static int enable_flash_amd8111(struct pci_dev *dev, const char *name) -{ - uint8_t old, new; - - /* Enable decoding at 0xffb00000 to 0xffffffff. */ - old = pci_read_byte(dev, 0x43); - new = old | 0xC0; - if (new != old) { - pci_write_byte(dev, 0x43, new); - if (pci_read_byte(dev, 0x43) != new) { - printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x43, new, name); - } - } - - /* Enable 'ROM write' bit. */ - old = pci_read_byte(dev, 0x40); - new = old | 0x01; - if (new == old) - return 0; - pci_write_byte(dev, 0x40, new); - - if (pci_read_byte(dev, 0x40) != new) { - printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); - return -1; - } - - return 0; -} - -static int enable_flash_sb600(struct pci_dev *dev, const char *name) -{ - uint32_t tmp, low_bits, num; - uint8_t reg; - - low_bits = tmp = pci_read_long(dev, 0xa0); - low_bits &= ~0xffffc000; /* for mmap aligning requirements */ - low_bits &= 0xfffffff0; /* remove low 4 bits */ - tmp &= 0xffffc000; - printf_debug("SPI base address is at 0x%x\n", tmp + low_bits); - - sb600_spibar = physmap("SB600 SPI registers", tmp, 0x4000); - sb600_spibar += low_bits; - - /* Clear ROM protect 0-3. */ - for (reg = 0x50; reg < 0x60; reg += 4) { - num = pci_read_long(dev, reg); - num &= 0xfffffffc; - pci_write_byte(dev, reg, num); - } - - flashbus = BUS_TYPE_SB600_SPI; - - /* Enable SPI ROM in SB600 PM register. */ - OUTB(0x8f, 0xcd6); - OUTB(0x0e, 0xcd7); - - return 0; -} - -static int enable_flash_ck804(struct pci_dev *dev, const char *name) -{ - uint8_t old, new; - - old = pci_read_byte(dev, 0x88); - new = old | 0xc0; - if (new != old) { - pci_write_byte(dev, 0x88, new); - if (pci_read_byte(dev, 0x88) != new) { - printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x88, new, name); - } - } - - old = pci_read_byte(dev, 0x6d); - new = old | 0x01; - if (new == old) - return 0; - pci_write_byte(dev, 0x6d, new); - - if (pci_read_byte(dev, 0x6d) != new) { - printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x6d, new, name); - return -1; - } - - return 0; -} - -/* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */ -static int enable_flash_sb400(struct pci_dev *dev, const char *name) -{ - uint8_t tmp; - struct pci_filter f; - struct pci_dev *smbusdev; - - /* Look for the SMBus device. */ - pci_filter_init((struct pci_access *)0, &f); - f.vendor = 0x1002; - f.device = 0x4372; - - for (smbusdev = pacc->devices; smbusdev; smbusdev = smbusdev->next) { - if (pci_filter_match(&f, smbusdev)) - break; - } - - if (!smbusdev) { - fprintf(stderr, "ERROR: SMBus device not found. Aborting.\n"); - exit(1); - } - - /* Enable some SMBus stuff. */ - tmp = pci_read_byte(smbusdev, 0x79); - tmp |= 0x01; - pci_write_byte(smbusdev, 0x79, tmp); - - /* Change southbridge. */ - tmp = pci_read_byte(dev, 0x48); - tmp |= 0x21; - pci_write_byte(dev, 0x48, tmp); - - /* Now become a bit silly. */ - tmp = INB(0xc6f); - OUTB(tmp, 0xeb); - OUTB(tmp, 0xeb); - tmp |= 0x40; - OUTB(tmp, 0xc6f); - OUTB(tmp, 0xeb); - OUTB(tmp, 0xeb); - - return 0; -} - -static int enable_flash_mcp55(struct pci_dev *dev, const char *name) -{ - uint8_t old, new, byte; - uint16_t word; - - /* Set the 0-16 MB enable bits. */ - byte = pci_read_byte(dev, 0x88); - byte |= 0xff; /* 256K */ - pci_write_byte(dev, 0x88, byte); - byte = pci_read_byte(dev, 0x8c); - byte |= 0xff; /* 1M */ - pci_write_byte(dev, 0x8c, byte); - word = pci_read_word(dev, 0x90); - word |= 0x7fff; /* 16M */ - pci_write_word(dev, 0x90, word); - - old = pci_read_byte(dev, 0x6d); - new = old | 0x01; - if (new == old) - return 0; - pci_write_byte(dev, 0x6d, new); - - if (pci_read_byte(dev, 0x6d) != new) { - printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x6d, new, name); - return -1; - } - - return 0; -} - -static int enable_flash_ht1000(struct pci_dev *dev, const char *name) -{ - uint8_t byte; - - /* Set the 4MB enable bit. */ - byte = pci_read_byte(dev, 0x41); - byte |= 0x0e; - pci_write_byte(dev, 0x41, byte); - - byte = pci_read_byte(dev, 0x43); - byte |= (1 << 4); - pci_write_byte(dev, 0x43, byte); - - return 0; -} - -/** - * Usually on the x86 architectures (and on other PC-like platforms like some - * Alphas or Itanium) the system flash is mapped right below 4G. On the AMD - * Elan SC520 only a small piece of the system flash is mapped there, but the - * complete flash is mapped somewhere below 1G. The position can be determined - * by the BOOTCS PAR register. - */ -static int get_flashbase_sc520(struct pci_dev *dev, const char *name) -{ - int i, bootcs_found = 0; - uint32_t parx = 0; - void *mmcr; - - /* 1. Map MMCR */ - mmcr = physmap("Elan SC520 MMCR", 0xfffef000, getpagesize()); - - /* 2. Scan PAR0 (0x88) - PAR15 (0xc4) for - * BOOTCS region (PARx[31:29] = 100b)e - */ - for (i = 0x88; i <= 0xc4; i += 4) { - parx = *(volatile uint32_t *)(mmcr + i); - if ((parx >> 29) == 4) { - bootcs_found = 1; - break; /* BOOTCS found */ - } - } - - /* 3. PARx[25] = 1b --> flashbase[29:16] = PARx[13:0] - * PARx[25] = 0b --> flashbase[29:12] = PARx[17:0] - */ - if (bootcs_found) { - if (parx & (1 << 25)) { - parx &= (1 << 14) - 1; /* Mask [13:0] */ - flashbase = parx << 16; - } else { - parx &= (1 << 18) - 1; /* Mask [17:0] */ - flashbase = parx << 12; - } - } else { - printf("AMD Elan SC520 detected, but no BOOTCS. Assuming flash at 4G\n"); - } - - /* 4. Clean up */ - munmap(mmcr, getpagesize()); - return 0; -} - -typedef struct penable { - uint16_t vendor, device; - const char *name; - int (*doit) (struct pci_dev *dev, const char *name); -} FLASH_ENABLE; - -static const FLASH_ENABLE enables[] = { - {0x1039, 0x0630, "SiS630", enable_flash_sis630}, - {0x8086, 0x122e, "Intel PIIX", enable_flash_piix4}, - {0x8086, 0x1234, "Intel MPIIX", enable_flash_piix4}, - {0x8086, 0x7000, "Intel PIIX3", enable_flash_piix4}, - {0x8086, 0x7110, "Intel PIIX4/4E/4M", enable_flash_piix4}, - {0x8086, 0x7198, "Intel 440MX", enable_flash_piix4}, - {0x8086, 0x2410, "Intel ICH", enable_flash_ich_4e}, - {0x8086, 0x2420, "Intel ICH0", enable_flash_ich_4e}, - {0x8086, 0x2440, "Intel ICH2", enable_flash_ich_4e}, - {0x8086, 0x244c, "Intel ICH2-M", enable_flash_ich_4e}, - {0x8086, 0x2480, "Intel ICH3-S", enable_flash_ich_4e}, - {0x8086, 0x248c, "Intel ICH3-M", enable_flash_ich_4e}, - {0x8086, 0x24c0, "Intel ICH4/ICH4-L", enable_flash_ich_4e}, - {0x8086, 0x24cc, "Intel ICH4-M", enable_flash_ich_4e}, - {0x8086, 0x24d0, "Intel ICH5/ICH5R", enable_flash_ich_4e}, - {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, - {0x8086, 0x2670, "Intel 631xESB/632xESB/3100", enable_flash_ich_dc}, - {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, - {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x5031, "Intel EP80579", enable_flash_ich7}, - {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich7}, - {0x8086, 0x27b8, "Intel ICH7/ICH7R", enable_flash_ich7}, - {0x8086, 0x27b9, "Intel ICH7M", enable_flash_ich7}, - {0x8086, 0x27bd, "Intel ICH7MDH", enable_flash_ich7}, - {0x8086, 0x2810, "Intel ICH8/ICH8R", enable_flash_ich8}, - {0x8086, 0x2811, "Intel ICH8M-E", enable_flash_ich8}, - {0x8086, 0x2812, "Intel ICH8DH", enable_flash_ich8}, - {0x8086, 0x2814, "Intel ICH8DO", enable_flash_ich8}, - {0x8086, 0x2815, "Intel ICH8M", enable_flash_ich8}, - {0x8086, 0x2912, "Intel ICH9DH", enable_flash_ich9}, - {0x8086, 0x2914, "Intel ICH9DO", enable_flash_ich9}, - {0x8086, 0x2916, "Intel ICH9R", enable_flash_ich9}, - {0x8086, 0x2917, "Intel ICH9M-E", enable_flash_ich9}, - {0x8086, 0x2918, "Intel ICH9", enable_flash_ich9}, - {0x8086, 0x2919, "Intel ICH9M", enable_flash_ich9}, - {0x8086, 0x3a14, "Intel ICH10DO", enable_flash_ich10}, - {0x8086, 0x3a16, "Intel ICH10R", enable_flash_ich10}, - {0x8086, 0x3a18, "Intel ICH10", enable_flash_ich10}, - {0x8086, 0x3a1a, "Intel ICH10D", enable_flash_ich10}, - {0x1106, 0x8231, "VIA VT8231", enable_flash_vt823x}, - {0x1106, 0x3177, "VIA VT8235", enable_flash_vt823x}, - {0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x}, - {0x1106, 0x3337, "VIA VT8237A", enable_flash_vt823x}, - {0x1106, 0x3372, "VIA VT8237S", enable_flash_vt8237s_spi}, - {0x1106, 0x8324, "VIA CX700", enable_flash_vt823x}, - {0x1106, 0x0586, "VIA VT82C586A/B", enable_flash_amd8111}, - {0x1106, 0x0686, "VIA VT82C686A/B", enable_flash_amd8111}, - {0x1078, 0x0100, "AMD CS5530(A)", enable_flash_cs5530}, - {0x100b, 0x0510, "AMD SC1100", enable_flash_sc1100}, - {0x1039, 0x0008, "SiS5595", enable_flash_sis5595}, - {0x1022, 0x2080, "AMD CS5536", enable_flash_cs5536}, - {0x1022, 0x7468, "AMD8111", enable_flash_amd8111}, - {0x1002, 0x438D, "ATI(AMD) SB600", enable_flash_sb600}, - {0x1002, 0x439d, "ATI(AMD) SB700", enable_flash_sb600}, - {0x10B9, 0x1533, "ALi M1533", enable_flash_ali_m1533}, - {0x10de, 0x0050, "NVIDIA CK804", enable_flash_ck804}, /* LPC */ - {0x10de, 0x0051, "NVIDIA CK804", enable_flash_ck804}, /* Pro */ - /* Slave, should not be here, to fix known bug for A01. */ - {0x10de, 0x00d3, "NVIDIA CK804", enable_flash_ck804}, - {0x10de, 0x0260, "NVIDIA MCP51", enable_flash_ck804}, - {0x10de, 0x0261, "NVIDIA MCP51", enable_flash_ck804}, - {0x10de, 0x0262, "NVIDIA MCP51", enable_flash_ck804}, - {0x10de, 0x0263, "NVIDIA MCP51", enable_flash_ck804}, - {0x10de, 0x0360, "NVIDIA MCP55", enable_flash_mcp55}, /* M57SLI*/ - {0x10de, 0x0361, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0362, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0363, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0364, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0365, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0366, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */ - {0x10de, 0x0367, "NVIDIA MCP55", enable_flash_mcp55}, /* Pro */ - {0x10de, 0x0548, "NVIDIA MCP67", enable_flash_mcp55}, - {0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, - {0x1166, 0x0205, "Broadcom HT-1000", enable_flash_ht1000}, - {0x1022, 0x3000, "AMD Elan SC520", get_flashbase_sc520}, - {0x1022, 0x7440, "AMD AMD-768", enable_flash_amd8111}, -}; - -void print_supported_chipsets(void) -{ - int i; - - printf("\nSupported chipsets:\n\n"); - - for (i = 0; i < ARRAY_SIZE(enables); i++) - printf("%s (%04x:%04x)\n", enables[i].name, - enables[i].vendor, enables[i].device); -} - -int chipset_flash_enable(void) -{ - struct pci_dev *dev = 0; - int ret = -2; /* Nothing! */ - int i; - - /* Now let's try to find the chipset we have... */ - for (i = 0; i < ARRAY_SIZE(enables); i++) { - dev = pci_dev_find(enables[i].vendor, enables[i].device); - if (dev) - break; - } - - if (dev) { - printf("Found chipset \"%s\", enabling flash write... ", - enables[i].name); - - ret = enables[i].doit(dev, enables[i].name); - if (ret) - printf("FAILED!\n"); - else - printf("OK.\n"); - } - - return ret; -} diff --git a/util/flashrom/coreboot_tables.h b/util/flashrom/coreboot_tables.h deleted file mode 100644 index 2eaff08765..0000000000 --- a/util/flashrom/coreboot_tables.h +++ /dev/null @@ -1,217 +0,0 @@ -#ifndef COREBOOT_TABLES_H -#define COREBOOT_TABLES_H - -#include <stdint.h> - -/* The coreboot table information is for conveying information - * from the firmware to the loaded OS image. Primarily this - * is expected to be information that cannot be discovered by - * other means, such as quering the hardware directly. - * - * All of the information should be Position Independent Data. - * That is it should be safe to relocated any of the information - * without it's meaning/correctnes changing. For table that - * can reasonably be used on multiple architectures the data - * size should be fixed. This should ease the transition between - * 32 bit and 64 bit architectures etc. - * - * The completeness test for the information in this table is: - * - Can all of the hardware be detected? - * - Are the per motherboard constants available? - * - Is there enough to allow a kernel to run that was written before - * a particular motherboard is constructed? (Assuming the kernel - * has drivers for all of the hardware but it does not have - * assumptions on how the hardware is connected together). - * - * With this test it should be straight forward to determine if a - * table entry is required or not. This should remove much of the - * long term compatibility burden as table entries which are - * irrelevant or have been replaced by better alternatives may be - * dropped. Of course it is polite and expidite to include extra - * table entries and be backwards compatible, but it is not required. - */ - -/* Since coreboot is usually compiled 32bit, gcc will align 64bit - * types to 32bit boundaries. If the coreboot table is dumped on a - * 64bit system, a uint64_t would be aligned to 64bit boundaries, - * breaking the table format. - * - * lb_uint64 will keep 64bit coreboot table values aligned to 32bit - * to ensure compatibility. They can be accessed with the two functions - * below: unpack_lb64() and pack_lb64() - * - * See also: util/lbtdump/lbtdump.c - */ - -struct lb_uint64 { - uint32_t lo; - uint32_t hi; -}; - -static inline uint64_t unpack_lb64(struct lb_uint64 value) -{ - uint64_t result; - result = value.hi; - result = (result << 32) + value.lo; - return result; -} - -static inline struct lb_uint64 pack_lb64(uint64_t value) -{ - struct lb_uint64 result; - result.lo = (value >> 0) & 0xffffffff; - result.hi = (value >> 32) & 0xffffffff; - return result; -} - -struct lb_header { - uint8_t signature[4]; /* LBIO */ - uint32_t header_bytes; - uint32_t header_checksum; - uint32_t table_bytes; - uint32_t table_checksum; - uint32_t table_entries; -}; - -/* Every entry in the boot enviroment list will correspond to a boot - * info record. Encoding both type and size. The type is obviously - * so you can tell what it is. The size allows you to skip that - * boot enviroment record if you don't know what it easy. This allows - * forward compatibility with records not yet defined. - */ -struct lb_record { - uint32_t tag; /* tag ID */ - uint32_t size; /* size of record (in bytes) */ -}; - -#define LB_TAG_UNUSED 0x0000 - -#define LB_TAG_MEMORY 0x0001 - -struct lb_memory_range { - struct lb_uint64 start; - struct lb_uint64 size; - uint32_t type; -#define LB_MEM_RAM 1 /* Memory anyone can use */ -#define LB_MEM_RESERVED 2 /* Don't use this memory region */ -#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ -}; - -struct lb_memory { - uint32_t tag; - uint32_t size; - struct lb_memory_range map[0]; -}; - -#define LB_TAG_HWRPB 0x0002 -struct lb_hwrpb { - uint32_t tag; - uint32_t size; - uint64_t hwrpb; -}; - -#define LB_TAG_MAINBOARD 0x0003 -struct lb_mainboard { - uint32_t tag; - uint32_t size; - uint8_t vendor_idx; - uint8_t part_number_idx; - uint8_t strings[0]; -}; - -#define LB_TAG_VERSION 0x0004 -#define LB_TAG_EXTRA_VERSION 0x0005 -#define LB_TAG_BUILD 0x0006 -#define LB_TAG_COMPILE_TIME 0x0007 -#define LB_TAG_COMPILE_BY 0x0008 -#define LB_TAG_COMPILE_HOST 0x0009 -#define LB_TAG_COMPILE_DOMAIN 0x000a -#define LB_TAG_COMPILER 0x000b -#define LB_TAG_LINKER 0x000c -#define LB_TAG_ASSEMBLER 0x000d -struct lb_string { - uint32_t tag; - uint32_t size; - uint8_t string[0]; -}; - -#define LB_TAG_FORWARD 0x0011 -struct lb_forward { - uint32_t tag; - uint32_t size; - uint64_t forward; -}; - -/* The following structures are for the cmos definitions table */ -#define LB_TAG_CMOS_OPTION_TABLE 200 -/* cmos header record */ -struct cmos_option_table { - uint32_t tag; /* CMOS definitions table type */ - uint32_t size; /* size of the entire table */ - uint32_t header_length; /* length of header */ -}; - -/* cmos entry record - This record is variable length. The name field may be - shorter than CMOS_MAX_NAME_LENGTH. The entry may start - anywhere in the byte, but can not span bytes unless it - starts at the beginning of the byte and the length is - fills complete bytes. -*/ -#define LB_TAG_OPTION 201 -struct cmos_entries { - uint32_t tag; /* entry type */ - uint32_t size; /* length of this record */ - uint32_t bit; /* starting bit from start of image */ - uint32_t length; /* length of field in bits */ - uint32_t config; /* e=enumeration, h=hex, r=reserved */ - uint32_t config_id; /* a number linking to an enumeration record */ -#define CMOS_MAX_NAME_LENGTH 32 - uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii, - variable length int aligned */ -}; - -/* cmos enumerations record - This record is variable length. The text field may be - shorter than CMOS_MAX_TEXT_LENGTH. -*/ -#define LB_TAG_OPTION_ENUM 202 -struct cmos_enums { - uint32_t tag; /* enumeration type */ - uint32_t size; /* length of this record */ - uint32_t config_id; /* a number identifying the config id */ - uint32_t value; /* the value associated with the text */ -#define CMOS_MAX_TEXT_LENGTH 32 - uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii, - variable length int aligned */ -}; - -/* cmos defaults record - This record contains default settings for the cmos ram. -*/ -#define LB_TAG_OPTION_DEFAULTS 203 -struct cmos_defaults { - uint32_t tag; /* default type */ - uint32_t size; /* length of this record */ - uint32_t name_length; /* length of the following name field */ - uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */ -#define CMOS_IMAGE_BUFFER_SIZE 128 - uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */ -}; - -#define LB_TAG_OPTION_CHECKSUM 204 -struct cmos_checksum { - uint32_t tag; - uint32_t size; - /* In practice everything is byte aligned, but things are measured - * in bits to be consistent. - */ - uint32_t range_start; /* First bit that is checksummed (byte aligned) */ - uint32_t range_end; /* Last bit that is checksummed (byte aligned) */ - uint32_t location; /* First bit of the checksum (byte aligned) */ - uint32_t type; /* Checksum algorithm that is used */ -#define CHECKSUM_NONE 0 -#define CHECKSUM_PCBIOS 1 -}; - -#endif /* COREBOOT_TABLES_H */ diff --git a/util/flashrom/en29f002a.c b/util/flashrom/en29f002a.c deleted file mode 100644 index 7a8c7f7156..0000000000 --- a/util/flashrom/en29f002a.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2007 Carl-Daniel Hailfinger - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * EN29F512 has 1C,21 - * EN29F010 has 1C,20 - * EN29F040A has 1C,04 - * EN29LV010 has 1C,6E and uses short F0 reset sequence - * EN29LV040(A) has 1C,4F and uses short F0 reset sequence - */ - -#include <stdio.h> -#include <stdint.h> -#include "flash.h" - -int probe_en29f512(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0x90, bios + 0x555); - - myusec_delay(10); - - id1 = chip_readb(bios + 0x100); - id2 = chip_readb(bios + 0x101); - - /* exit by writing F0 anywhere? or the code below */ - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0xF0, bios + 0x555); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - - if (id1 == flash->manufacture_id && id2 == flash->model_id) - return 1; - - return 0; -} - -/* - * EN29F002AT has 1C,92 - * EN29F002AB has 1C,97 - */ - -/* This does not seem to function properly for EN29F002NT. */ -int probe_en29f002a(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0xAAA); - chip_writeb(0x90, bios + 0x555); - - myusec_delay(10); - - id1 = chip_readb(bios + 0x100); - id2 = chip_readb(bios + 0x101); - - /* exit by writing F0 anywhere? or the code below */ - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0xAAA); - chip_writeb(0xF0, bios + 0x555); - - printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); - - if (id1 == flash->manufacture_id && id2 == flash->model_id) - return 1; - - return 0; -} - -/* The EN29F002 chip needs repeated single byte writing, no block writing. */ -int write_en29f002a(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - volatile uint8_t *bios = flash->virtual_memory; - volatile uint8_t *dst = bios; - - // *bios = 0xF0; - myusec_delay(10); - erase_chip_jedec(flash); - - printf("Programming page: "); - for (i = 0; i < total_size; i++) { - /* write to the sector */ - if ((i & 0xfff) == 0) - printf("address: 0x%08lx", (unsigned long)i); - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); - chip_writeb(*buf++, dst++); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(dst); - - if ((i & 0xfff) == 0) - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - - printf("\n"); - return 0; -} diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h deleted file mode 100644 index 59c6c479be..0000000000 --- a/util/flashrom/flash.h +++ /dev/null @@ -1,697 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com> - * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __FLASH_H__ -#define __FLASH_H__ 1 - -#if defined(__GLIBC__) -#include <sys/io.h> -#endif -#include <unistd.h> -#include <stdint.h> -#include <stdio.h> - -#if (defined(__MACH__) && defined(__APPLE__)) -#define __DARWIN__ -#endif - -#if defined(__FreeBSD__) - #include <machine/cpufunc.h> - #define off64_t off_t - #define lseek64 lseek - #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0) - #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0) - #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0) - #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); }) - #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); }) - #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); }) -#else -#if defined(__DARWIN__) - #include <DirectIO/darwinio.h> - #define off64_t off_t - #define lseek64 lseek -#endif - #define OUTB outb - #define OUTW outw - #define OUTL outl - #define INB inb - #define INW inw - #define INL inl -#endif - -static inline void chip_writeb(uint8_t b, volatile void *addr) -{ - *(volatile uint8_t *) addr = b; -} - -static inline void chip_writew(uint16_t b, volatile void *addr) -{ - *(volatile uint16_t *) addr = b; -} - -static inline void chip_writel(uint32_t b, volatile void *addr) -{ - *(volatile uint32_t *) addr = b; -} - -static inline uint8_t chip_readb(const volatile void *addr) -{ - return *(volatile uint8_t *) addr; -} - -static inline uint16_t chip_readw(const volatile void *addr) -{ - return *(volatile uint16_t *) addr; -} - -static inline uint32_t chip_readl(const volatile void *addr) -{ - return *(volatile uint32_t *) addr; -} - -#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) - -struct flashchip { - const char *vendor; - const char *name; - /* - * With 32bit manufacture_id and model_id we can cover IDs up to - * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's - * Identification code. - */ - uint32_t manufacture_id; - uint32_t model_id; - - int total_size; - int page_size; - - /* - * Indicate if flashrom has been tested with this flash chip and if - * everything worked correctly. - */ - uint32_t tested; - - int (*probe) (struct flashchip *flash); - int (*erase) (struct flashchip *flash); - int (*write) (struct flashchip *flash, uint8_t *buf); - int (*read) (struct flashchip *flash, uint8_t *buf); - - /* Some flash devices have an additional register space. */ - volatile uint8_t *virtual_memory; - volatile uint8_t *virtual_registers; -}; - -#define TEST_UNTESTED 0 - -#define TEST_OK_PROBE (1<<0) -#define TEST_OK_READ (1<<1) -#define TEST_OK_ERASE (1<<2) -#define TEST_OK_WRITE (1<<3) -#define TEST_OK_PR (TEST_OK_PROBE|TEST_OK_READ) -#define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE) -#define TEST_OK_MASK 0x0f - -#define TEST_BAD_PROBE (1<<4) -#define TEST_BAD_READ (1<<5) -#define TEST_BAD_ERASE (1<<6) -#define TEST_BAD_WRITE (1<<7) -#define TEST_BAD_PREW (TEST_BAD_PROBE|TEST_BAD_READ|TEST_BAD_ERASE|TEST_BAD_WRITE) -#define TEST_BAD_MASK 0xf0 - -extern struct flashchip flashchips[]; - -/* - * Please keep this list sorted alphabetically by manufacturer. The first - * entry of each section should be the manufacturer ID, followed by the - * list of devices from that manufacturer (sorted by device IDs). - * - * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no - * continuation code. - * SPI parts have 16-bit device IDs if they support RDID. - */ - -#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */ - -#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ - -#define AMD_ID 0x01 /* AMD */ -#define AM_29F002BT 0xB0 -#define AM_29F002BB 0x34 -#define AM_29F040B 0xA4 -#define AM_29LV040B 0x4F -#define AM_29F016D 0xAD - -#define AMIC_ID 0x7F37 /* AMIC */ -#define AMIC_ID_NOPREFIX 0x37 /* AMIC */ -#define AMIC_A25L40P 0x2013 -#define AMIC_A29002B 0x0d -#define AMIC_A29002T 0x8c -#define AMIC_A29040B 0x86 -#define AMIC_A49LF040A 0x9d - -#define ASD_ID 0x25 /* ASD, not listed in JEP106W */ -#define ASD_AE49F2008 0x52 - -#define ATMEL_ID 0x1F /* Atmel */ -#define AT_25DF021 0x4300 -#define AT_25DF041A 0x4401 -#define AT_25DF081 0x4502 -#define AT_25DF161 0x4602 -#define AT_25DF321 0x4700 /* also 26DF321 */ -#define AT_25DF321A 0x4701 -#define AT_25DF641 0x4800 -#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */ -#define AT_25F512B 0x6500 -#define AT_25FS010 0x6601 -#define AT_25FS040 0x6604 -#define AT_26DF041 0x4400 -#define AT_26DF081 0x4500 /* guessed, no datasheet available */ -#define AT_26DF081A 0x4501 -#define AT_26DF161 0x4600 -#define AT_26DF161A 0x4601 -#define AT_26DF321 0x4700 /* also 25DF321 */ -#define AT_26F004 0x0400 -#define AT_29C040A 0xA4 -#define AT_29C020 0xDA -#define AT_45BR3214B /* No ID available */ -#define AT_45CS1282 0x2920 -#define AT_45D011 /* No ID available */ -#define AT_45D021A /* No ID available */ -#define AT_45D041A /* No ID available */ -#define AT_45D081A /* No ID available */ -#define AT_45D161 /* No ID available */ -#define AT_45DB011 /* No ID available */ -#define AT_45DB011B /* No ID available */ -#define AT_45DB011D 0x2200 -#define AT_45DB021A /* No ID available */ -#define AT_45DB021B /* No ID available */ -#define AT_45DB021D 0x2300 -#define AT_45DB041A /* No ID available */ -#define AT_45DB041D 0x2400 -#define AT_45DB081A /* No ID available */ -#define AT_45DB081D 0x2500 -#define AT_45DB161 /* No ID available */ -#define AT_45DB161B /* No ID available */ -#define AT_45DB161D 0x2600 -#define AT_45DB321 /* No ID available */ -#define AT_45DB321B /* No ID available */ -#define AT_45DB321C 0x2700 -#define AT_45DB321D 0x2701 /* Buggy data sheet */ -#define AT_45DB642 /* No ID available */ -#define AT_45DB642D 0x2800 -#define AT_49F002N 0x07 /* for AT49F002(N) */ -#define AT_49F002NT 0x08 /* for AT49F002(N)T */ - -#define CATALYST_ID 0x31 /* Catalyst */ - -#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */ -#define EMST_F49B002UA 0x00 - -/* - * EN25 chips are SPI, first byte of device ID is memory type, - * second byte of device ID is log(bitsize)-9. - * Vendor and device ID of EN29 series are both prefixed with 0x7F, which - * is the continuation code for IDs in bank 2. - * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in - * a collision with Mitsubishi. Mitsubishi once manufactured flash chips. - * Let's hope they are not manufacturing SPI flash chips as well. - */ -#define EON_ID 0x7F1C /* EON Silicon Devices */ -#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */ -#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */ -#define EN_25B10 0x2011 -#define EN_25B20 0x2012 -#define EN_25B40 0x2013 -#define EN_25B80 0x2014 -#define EN_25B16 0x2015 -#define EN_25B32 0x2016 -#define EN_29F512 0x7F21 -#define EN_29F010 0x7F20 -#define EN_29F040A 0x7F04 -#define EN_29LV010 0x7F6E -#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */ -#define EN_29F002T 0x7F92 -#define EN_29F002B 0x7F97 - -#define FUJITSU_ID 0x04 /* Fujitsu */ -#define MBM29F400BC 0xAB -#define MBM29F400TC 0x23 -#define MBM29F004BC 0x7B -#define MBM29F004TC 0x77 - -#define HYUNDAI_ID 0xAD /* Hyundai */ - -#define IMT_ID 0x7F1F /* Integrated Memory Technologies */ -#define IM_29F004B 0xAE -#define IM_29F004T 0xAF - -#define INTEL_ID 0x89 /* Intel */ - -#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */ - -/* - * MX25 chips are SPI, first byte of device ID is memory type, - * second byte of device ID is log(bitsize)-9. - * Generalplus SPI chips seem to be compatible with Macronix - * and use the same set of IDs. - */ -#define MX_ID 0xC2 /* Macronix (MX) */ -#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */ -#define MX_25L1005 0x2011 -#define MX_25L2005 0x2012 -#define MX_25L4005 0x2013 /* MX25L4005{,A} */ -#define MX_25L8005 0x2014 -#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */ -#define MX_25L3205 0x2016 /* MX25L3205{,A} */ -#define MX_25L6405 0x2017 /* MX25L3205{,D} */ -#define MX_25L12805 0x2018 /* MX25L12805 */ -#define MX_25L1635D 0x2415 -#define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ -#define MX_29F002B 0x34 -#define MX_29F002T 0xB0 -#define MX_29LV002CB 0x5A -#define MX_29LV002CT 0x59 -#define MX_29LV004CB 0xB6 -#define MX_29LV004CT 0xB5 -#define MX_29LV008CB 0x37 -#define MX_29LV008CT 0x3E -#define MX_29F040C 0xA4 -#define MX_29F200CB 0x57 -#define MX_29F200CT 0x51 -#define MX_29F400CB 0xAB -#define MX_29F400CT 0x23 -#define MX_29LV040C 0x4F -#define MX_29LV128DB 0x7A -#define MX_29LV128DT 0x7E -#define MX_29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */ -#define MX_29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */ -#define MX_29LV320DB 0xA8 /* Same as MX29LV321DB */ -#define MX_29LV320DT 0xA7 /* Same as MX29LV321DT */ -#define MX_29LV400CB 0xBA -#define MX_29LV400CT 0xB9 -#define MX_29LV800CB 0x5B -#define MX_29LV800CT 0xDA -#define MX_29LV640DB 0xCB /* Same as MX29LV640EB */ -#define MX_29LV640DT 0xC9 /* Same as MX29LV640ET */ -#define MX_29SL402CB 0xF1 -#define MX_29SL402CT 0x70 -#define MX_29SL800CB 0x6B /* Same as MX29SL802CB */ -#define MX_29SL800CT 0xEA /* Same as MX29SL802CT */ - -/* - * Programmable Micro Corp is listed in JEP106W in bank 2, so it should - * have a 0x7F continuation code prefix. - */ -#define PMC_ID 0x7F9D /* PMC */ -#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */ -#define PMC_25LV512 0x7B -#define PMC_25LV010 0x7C -#define PMC_25LV020 0x7D -#define PMC_25LV040 0x7E -#define PMC_25LV080B 0x13 -#define PMC_25LV016B 0x14 -#define PMC_39LV512 0x1B -#define PMC_39F010 0x1C /* also Pm39LV010 */ -#define PMC_39LV020 0x3D -#define PMC_39LV040 0x3E -#define PMC_39F020 0x4D -#define PMC_39F040 0x4E -#define PMC_49FL002 0x6D -#define PMC_49FL004 0x6E - -#define SHARP_ID 0xB0 /* Sharp */ -#define SHARP_LHF00L04 0xCF - -/* - * Spansion was previously a joint venture of AMD and Fujitsu. - * S25 chips are SPI. The first device ID byte is memory type and - * the second device ID byte is memory capacity. - */ -#define SPANSION_ID 0x01 /* Spansion */ -#define SPANSION_S25FL016A 0x0214 - -/* - * SST25 chips are SPI, first byte of device ID is memory type, second - * byte of device ID is related to log(bitsize) at least for some chips. - */ -#define SST_ID 0xBF /* SST */ -#define SST_25WF512 0x2501 -#define SST_25WF010 0x2502 -#define SST_25WF020 0x2503 -#define SST_25WF040 0x2504 -#define SST_25VF512A_REMS 0x48 /* REMS or RES opcode */ -#define SST_25VF010_REMS 0x49 /* REMS or RES opcode */ -#define SST_25VF020_REMS 0x43 /* REMS or RES opcode */ -#define SST_25VF040_REMS 0x44 /* REMS or RES opcode */ -#define SST_25VF040B 0x258D -#define SST_25VF040B_REMS 0x8D /* REMS or RES opcode */ -#define SST_25VF080_REMS 0x80 /* REMS or RES opcode */ -#define SST_25VF080B 0x258E -#define SST_25VF080B_REMS 0x8E /* REMS or RES opcode */ -#define SST_25VF016B 0x2541 -#define SST_25VF032B 0x254A -#define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */ -#define SST_26VF016 0x2601 -#define SST_26VF032 0x2602 -#define SST_27SF512 0xA4 -#define SST_27SF010 0xA5 -#define SST_27SF020 0xA6 -#define SST_27VF010 0xA9 -#define SST_27VF020 0xAA -#define SST_28SF040 0x04 -#define SST_29EE512 0x5D -#define SST_29EE010 0x07 -#define SST_29LE010 0x08 /* also SST29VE010 */ -#define SST_29EE020A 0x10 -#define SST_29LE020 0x12 /* also SST29VE020 */ -#define SST_29SF020 0x24 -#define SST_29VF020 0x25 -#define SST_29SF040 0x13 -#define SST_29VF040 0x14 -#define SST_39SF010 0xB5 -#define SST_39SF020 0xB6 -#define SST_39SF040 0xB7 -#define SST_39VF512 0xD4 -#define SST_39VF010 0xD5 -#define SST_39VF020 0xD6 -#define SST_39VF040 0xD7 -#define SST_49LF040B 0x50 -#define SST_49LF040 0x51 -#define SST_49LF020 0x61 -#define SST_49LF020A 0x52 -#define SST_49LF080A 0x5B -#define SST_49LF002A 0x57 -#define SST_49LF003A 0x1B -#define SST_49LF004A 0x60 -#define SST_49LF008A 0x5A -#define SST_49LF004C 0x54 -#define SST_49LF008C 0x59 -#define SST_49LF016C 0x5C -#define SST_49LF160C 0x4C - -/* - * ST25P chips are SPI, first byte of device ID is memory type, second - * byte of device ID is related to log(bitsize) at least for some chips. - */ -#define ST_ID 0x20 /* ST / SGS/Thomson */ -#define ST_M25P05A 0x2010 -#define ST_M25P10A 0x2011 -#define ST_M25P20 0x2012 -#define ST_M25P40 0x2013 -#define ST_M25P40_RES 0x12 -#define ST_M25P80 0x2014 -#define ST_M25P16 0x2015 -#define ST_M25P32 0x2016 -#define ST_M25P64 0x2017 -#define ST_M25P128 0x2018 -#define ST_M50FLW040A 0x08 -#define ST_M50FLW040B 0x28 -#define ST_M50FLW080A 0x80 -#define ST_M50FLW080B 0x81 -#define ST_M50FW002 0x29 -#define ST_M50FW040 0x2C -#define ST_M50FW080 0x2D -#define ST_M50FW016 0x2E -#define ST_M50LPW116 0x30 -#define ST_M29F002B 0x34 -#define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */ -#define ST_M29F400BT 0xD5 -#define ST_M29F040B 0xE2 -#define ST_M29W010B 0x23 -#define ST_M29W040B 0xE3 - -#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */ -#define S29C51001T 0x01 -#define S29C51002T 0x02 -#define S29C51004T 0x03 -#define S29C31004T 0x63 - -#define TI_ID 0x97 /* Texas Instruments */ - -/* - * W25X chips are SPI, first byte of device ID is memory type, second - * byte of device ID is related to log(bitsize). - */ -#define WINBOND_ID 0xDA /* Winbond */ -#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */ -#define W_25X10 0x3011 -#define W_25X20 0x3012 -#define W_25X40 0x3013 -#define W_25X80 0x3014 -#define W_25X16 0x3015 -#define W_25X32 0x3016 -#define W_25X64 0x3017 -#define W_29C011 0xC1 -#define W_29C020C 0x45 -#define W_29C040P 0x46 -#define W_29EE011 0xC1 -#define W_39V040FA 0x34 -#define W_39V040A 0x3D -#define W_39V040B 0x54 -#define W_39V080A 0xD0 -#define W_39V080FA 0xD3 -#define W_39V080FA_DM 0x93 -#define W_49F002U 0x0B -#define W_49V002A 0xB0 -#define W_49V002FA 0x32 - -/* udelay.c */ -void myusec_delay(int time); -void myusec_calibrate_delay(); - -/* PCI handling for board/chipset_enable */ -struct pci_access *pacc; -struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); -struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, - uint16_t card_vendor, uint16_t card_device); - -/* board_enable.c */ -void w836xx_ext_enter(uint16_t port); -void w836xx_ext_leave(uint16_t port); -unsigned char wbsio_read(uint16_t index, uint8_t reg); -void wbsio_write(uint16_t index, uint8_t reg, uint8_t data); -void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask); -int board_flash_enable(const char *vendor, const char *part); -void print_supported_boards(void); - -/* chipset_enable.c */ -int chipset_flash_enable(void); -void print_supported_chipsets(void); - -extern unsigned long flashbase; - -typedef enum { - BUS_TYPE_LPC, - BUS_TYPE_ICH7_SPI, - BUS_TYPE_ICH9_SPI, - BUS_TYPE_IT87XX_SPI, - BUS_TYPE_SB600_SPI, - BUS_TYPE_VIA_SPI, - BUS_TYPE_WBSIO_SPI -} flashbus_t; - -extern flashbus_t flashbus; -extern void *spibar; - -/* physmap.c */ -void *physmap(const char *descr, unsigned long phys_addr, size_t len); -void physunmap(void *virt_addr, size_t len); - -/* flashrom.c */ -extern int verbose; -#define printf_debug(x...) { if (verbose) printf(x); } -void map_flash_registers(struct flashchip *flash); - -/* layout.c */ -int show_id(uint8_t *bios, int size, int force); -int read_romlayout(char *name); -int find_romentry(char *name); -int handle_romentries(uint8_t *buffer, uint8_t *content); - -/* cbtable.c */ -int coreboot_init(void); -extern char *lb_part, *lb_vendor; - -/* spi.c */ -int probe_spi_rdid(struct flashchip *flash); -int probe_spi_rdid4(struct flashchip *flash); -int probe_spi_rems(struct flashchip *flash); -int probe_spi_res(struct flashchip *flash); -int spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int spi_write_enable(); -int spi_write_disable(); -int spi_chip_erase_60(struct flashchip *flash); -int spi_chip_erase_c7(struct flashchip *flash); -int spi_chip_erase_60_c7(struct flashchip *flash); -int spi_chip_erase_d8(struct flashchip *flash); -int spi_block_erase_52(const struct flashchip *flash, unsigned long addr); -int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr); -int spi_chip_write(struct flashchip *flash, uint8_t *buf); -int spi_chip_read(struct flashchip *flash, uint8_t *buf); -uint8_t spi_read_status_register(); -int spi_disable_blockprotect(void); -void spi_byte_program(int address, uint8_t byte); -int spi_nbyte_read(int address, uint8_t *bytes, int len); -int spi_aai_write(struct flashchip *flash, uint8_t *buf); - -/* 82802ab.c */ -int probe_82802ab(struct flashchip *flash); -int erase_82802ab(struct flashchip *flash); -int write_82802ab(struct flashchip *flash, uint8_t *buf); - -/* am29f040b.c */ -int probe_29f040b(struct flashchip *flash); -int erase_29f040b(struct flashchip *flash); -int write_29f040b(struct flashchip *flash, uint8_t *buf); - -/* en29f002a.c */ -int probe_en29f002a(struct flashchip *flash); -int erase_en29f002a(struct flashchip *flash); -int write_en29f002a(struct flashchip *flash, uint8_t *buf); - -/* ichspi.c */ -int ich_init_opcodes(); -int ich_spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int ich_spi_read(struct flashchip *flash, uint8_t * buf); -int ich_spi_write(struct flashchip *flash, uint8_t * buf); - -/* it87spi.c */ -extern uint16_t it8716f_flashport; -int it87xx_probe_spi_flash(const char *name); -int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf); -int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf); - -/* sb600spi.c */ -int sb600_spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int sb600_spi_read(struct flashchip *flash, uint8_t *buf); -int sb600_spi_write(struct flashchip *flash, uint8_t *buf); -uint8_t sb600_read_status_register(void); -extern uint8_t volatile *sb600_spibar; - -/* jedec.c */ -uint8_t oddparity(uint8_t val); -void toggle_ready_jedec(volatile uint8_t *dst); -void data_polling_jedec(volatile uint8_t *dst, uint8_t data); -void unprotect_jedec(volatile uint8_t *bios); -void protect_jedec(volatile uint8_t *bios); -int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst); -int probe_jedec(struct flashchip *flash); -int erase_chip_jedec(struct flashchip *flash); -int write_jedec(struct flashchip *flash, uint8_t *buf); -int erase_sector_jedec(volatile uint8_t *bios, unsigned int page); -int erase_block_jedec(volatile uint8_t *bios, unsigned int page); -int write_sector_jedec(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, unsigned int page_size); - -/* m29f002.c */ -int erase_m29f002(struct flashchip *flash); -int write_m29f002t(struct flashchip *flash, uint8_t *buf); -int write_m29f002b(struct flashchip *flash, uint8_t *buf); - -/* m29f400bt.c */ -int probe_m29f400bt(struct flashchip *flash); -int erase_m29f400bt(struct flashchip *flash); -int block_erase_m29f400bt(volatile uint8_t *bios, - volatile uint8_t *dst); -int write_m29f400bt(struct flashchip *flash, uint8_t *buf); -int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf); -void toggle_ready_m29f400bt(volatile uint8_t *dst); -void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data); -void protect_m29f400bt(volatile uint8_t *bios); -void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, int page_size); - -/* mx29f002.c */ -int probe_29f002(struct flashchip *flash); -int erase_29f002(struct flashchip *flash); -int write_29f002(struct flashchip *flash, uint8_t *buf); - -/* pm49fl00x.c */ -int probe_49fl00x(struct flashchip *flash); -int erase_49fl00x(struct flashchip *flash); -int write_49fl00x(struct flashchip *flash, uint8_t *buf); - -/* sharplhf00l04.c */ -int probe_lhf00l04(struct flashchip *flash); -int erase_lhf00l04(struct flashchip *flash); -int write_lhf00l04(struct flashchip *flash, uint8_t *buf); -void toggle_ready_lhf00l04(volatile uint8_t *dst); -void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data); -void protect_lhf00l04(volatile uint8_t *bios); - -/* sst28sf040.c */ -int probe_28sf040(struct flashchip *flash); -int erase_28sf040(struct flashchip *flash); -int write_28sf040(struct flashchip *flash, uint8_t *buf); - -/* sst39sf020.c */ -int probe_39sf020(struct flashchip *flash); -int write_39sf020(struct flashchip *flash, uint8_t *buf); - -/* sst49lf040.c */ -int erase_49lf040(struct flashchip *flash); -int write_49lf040(struct flashchip *flash, uint8_t *buf); - -/* sst49lfxxxc.c */ -int probe_49lfxxxc(struct flashchip *flash); -int erase_49lfxxxc(struct flashchip *flash); -int write_49lfxxxc(struct flashchip *flash, uint8_t *buf); - -/* sst_fwhub.c */ -int probe_sst_fwhub(struct flashchip *flash); -int erase_sst_fwhub(struct flashchip *flash); -int write_sst_fwhub(struct flashchip *flash, uint8_t *buf); - -/* w39v040c.c */ -int probe_w39v040c(struct flashchip *flash); -int erase_w39v040c(struct flashchip *flash); -int write_w39v040c(struct flashchip *flash, uint8_t *buf); - -/* w39V080fa.c */ -int probe_winbond_fwhub(struct flashchip *flash); -int erase_winbond_fwhub(struct flashchip *flash); -int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf); - -/* w29ee011.c */ -int probe_w29ee011(struct flashchip *flash); - -/* w49f002u.c */ -int write_49f002(struct flashchip *flash, uint8_t *buf); - -/* wbsio_spi.c */ -int wbsio_check_for_spi(const char *name); -int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int wbsio_spi_read(struct flashchip *flash, uint8_t *buf); -int wbsio_spi_write(struct flashchip *flash, uint8_t *buf); - -/* stm50flw0x0x.c */ -int probe_stm50flw0x0x(struct flashchip *flash); -int erase_stm50flw0x0x(struct flashchip *flash); -int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf); - -#endif /* !__FLASH_H__ */ diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c deleted file mode 100644 index b9c87ad77a..0000000000 --- a/util/flashrom/flashchips.c +++ /dev/null @@ -1,2256 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * Copyright (C) 2004 Tyan Corp - * Copyright (C) 2005-2008 coresystems GmbH <stepan@openbios.org> - * Copyright (C) 2006-2009 Carl-Daniel Hailfinger - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "flash.h" - -/** - * List of supported flash ROM chips. - * - * Please keep the list sorted by vendor name and chip name, so that - * the output of 'flashrom -L' is alphabetically sorted. - */ -struct flashchip flashchips[] = { - - /* Vendor, Chip, Vendor ID, Chip ID, - * Total size (kB), Page size (B), - * Test status, - * Probe function, Erase function, Write function, Read function - */ - - { - .vendor = "AMD", - .name = "Am29F002(N)BB", - .manufacture_id = AMD_ID, - .model_id = AM_29F002BB, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_en29f002a, - }, - - { - .vendor = "AMD", - .name = "Am29F002(N)BT", - .manufacture_id = AMD_ID, - .model_id = AM_29F002BT, - .total_size = 256, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_en29f002a, - }, - - { - .vendor = "AMD", - .name = "Am29F016D", - .manufacture_id = AMD_ID, - .model_id = AM_29F016D, - .total_size = 2048, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_29f040b, - .erase = erase_29f040b, - .write = write_29f040b, - }, - - { - .vendor = "AMD", - .name = "Am29F040B", - .manufacture_id = AMD_ID, - .model_id = AM_29F040B, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_29f040b, - .erase = erase_29f040b, - .write = write_29f040b, - }, - - { - .vendor = "AMD", - .name = "Am29F080B", - .manufacture_id = 0x01, - .model_id = 0xd5, - .total_size = 1024, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_29f040b, - .write = write_29f040b, - }, - - { - .vendor = "AMD", - .name = "Am29LV040B", - .manufacture_id = AMD_ID, - .model_id = AM_29LV040B, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_29f040b, - .erase = erase_29f040b, - .write = write_29f040b, - }, - - { - .vendor = "AMD", - .name = "Am29LV081B", - .manufacture_id = 0x01, - .model_id = 0x38, - .total_size = 1024, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_29f040b, - .erase = erase_29f040b, - .write = write_29f040b, - }, - - { - .vendor = "ASD", - .name = "AE49F2008", - .manufacture_id = ASD_ID, - .model_id = ASD_AE49F2008, - .total_size = 256, - .page_size = 128, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "Atmel", - .name = "AT25DF021", - .manufacture_id = ATMEL_ID, - .model_id = AT_25DF021, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25DF041A", - .manufacture_id = ATMEL_ID, - .model_id = AT_25DF041A, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25DF081", - .manufacture_id = ATMEL_ID, - .model_id = AT_25DF081, - .total_size = 1024, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25DF161", - .manufacture_id = ATMEL_ID, - .model_id = AT_25DF161, - .total_size = 2048, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25DF321", - .manufacture_id = ATMEL_ID, - .model_id = AT_25DF321, - .total_size = 4096, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25DF321A", - .manufacture_id = ATMEL_ID, - .model_id = AT_25DF321A, - .total_size = 4096, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25DF641", - .manufacture_id = ATMEL_ID, - .model_id = AT_25DF641, - .total_size = 8192, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25F512B", - .manufacture_id = ATMEL_ID, - .model_id = AT_25F512B, - .total_size = 64, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25FS010", - .manufacture_id = ATMEL_ID, - .model_id = AT_25FS010, - .total_size = 128, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT25FS040", - .manufacture_id = ATMEL_ID, - .model_id = AT_25FS040, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT26DF041", - .manufacture_id = ATMEL_ID, - .model_id = AT_26DF041, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL /* Incompatible Page write */, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT26DF081A", - .manufacture_id = ATMEL_ID, - .model_id = AT_26DF081A, - .total_size = 1024, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT26DF161", - .manufacture_id = ATMEL_ID, - .model_id = AT_26DF161, - .total_size = 2048, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT26DF161A", - .manufacture_id = ATMEL_ID, - .model_id = AT_26DF161A, - .total_size = 2048, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - /*The AT26DF321 has the same ID as the AT25DF321. */ - /*{ - .vendor = "Atmel", - .name = "AT26DF321", - .manufacture_id = ATMEL_ID, - .model_id = AT_26DF321, - .total_size = 4096, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - },*/ - - { - .vendor = "Atmel", - .name = "AT26F004", - .manufacture_id = ATMEL_ID, - .model_id = AT_26F004, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = NULL /* Incompatible Page write */, - .read = spi_chip_read, - }, - - { - .vendor = "Atmel", - .name = "AT29C020", - .manufacture_id = ATMEL_ID, - .model_id = AT_29C020, - .total_size = 256, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "Atmel", - .name = "AT29C040A", - .manufacture_id = ATMEL_ID, - .model_id = AT_29C040A, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "Atmel", - .name = "AT45CS1282", - .manufacture_id = ATMEL_ID, - .model_id = AT_45CS1282, - .total_size = 16896 /* No power of two sizes */, - .page_size = 1056 /* No power of two sizes */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL /* Incompatible Page write */, - .read = NULL /* Incompatible read */, - }, - - { - .vendor = "Atmel", - .name = "AT45DB011D", - .manufacture_id = ATMEL_ID, - .model_id = AT_45DB011D, - .total_size = 128 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - .read = NULL, - }, - - { - .vendor = "Atmel", - .name = "AT45DB021D", - .manufacture_id = ATMEL_ID, - .model_id = AT_45DB021D, - .total_size = 256 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - .read = NULL, - }, - - { - .vendor = "Atmel", - .name = "AT45DB041D", - .manufacture_id = ATMEL_ID, - .model_id = AT_45DB041D, - .total_size = 512 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - .read = NULL, - }, - - { - .vendor = "Atmel", - .name = "AT45DB081D", - .manufacture_id = ATMEL_ID, - .model_id = AT_45DB081D, - .total_size = 1024 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - .read = NULL, - }, - - { - .vendor = "Atmel", - .name = "AT45DB161D", - .manufacture_id = ATMEL_ID, - .model_id = AT_45DB161D, - .total_size = 2048 /* Size can only be determined from status register */, - .page_size = 512 /* Size can only be determined from status register */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - .read = NULL, - }, - - { - .vendor = "Atmel", - .name = "AT45DB321C", - .manufacture_id = ATMEL_ID, - .model_id = AT_45DB321C, - .total_size = 4224 /* No power of two sizes */, - .page_size = 528 /* No power of two sizes */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - .read = NULL /* Incompatible read */, - }, - - { - .vendor = "Atmel", - .name = "AT45DB321D", - .manufacture_id = ATMEL_ID, - .model_id = AT_45DB321D, - .total_size = 4096 /* Size can only be determined from status register */, - .page_size = 512 /* Size can only be determined from status register */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - .read = NULL, - }, - - { - .vendor = "Atmel", - .name = "AT45DB642D", - .manufacture_id = ATMEL_ID, - .model_id = AT_45DB642D, - .total_size = 8192 /* Size can only be determined from status register */, - .page_size = 1024 /* Size can only be determined from status register */, - .tested = TEST_BAD_READ, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - .read = NULL, - }, - - { - .vendor = "Atmel", - .name = "AT49F002(N)", - .manufacture_id = ATMEL_ID, - .model_id = AT_49F002N, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "Atmel", - .name = "AT49F002(N)T", - .manufacture_id = ATMEL_ID, - .model_id = AT_49F002NT, - .total_size = 256, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "AMIC", - .name = "A25L40P", - .manufacture_id = AMIC_ID, - .model_id = AMIC_A25L40P, - .total_size = 512, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid4, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "AMIC", - .name = "A29002B", - .manufacture_id = AMIC_ID_NOPREFIX, - .model_id = AMIC_A29002B, - .total_size = 256, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_29f002, - .erase = erase_29f002, - .write = write_29f002, - }, - - { - .vendor = "AMIC", - .name = "A29002T", - .manufacture_id = AMIC_ID_NOPREFIX, - .model_id = AMIC_A29002T, - .total_size = 256, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_29f002, - .erase = erase_29f002, - .write = write_29f002, - }, - - { - .vendor = "AMIC", - .name = "A29040B", - .manufacture_id = AMIC_ID_NOPREFIX, - .model_id = AMIC_A29040B, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PR, - .probe = probe_29f040b, - .erase = erase_29f040b, - .write = write_29f040b, - }, - - { - .vendor = "AMIC", - .name = "A49LF040A", - .manufacture_id = AMIC_ID_NOPREFIX, - .model_id = AMIC_A49LF040A, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_49fl00x, - .erase = erase_49fl00x, - .write = write_49fl00x, - }, - - { - .vendor = "EMST", - .name = "F49B002UA", - .manufacture_id = EMST_ID, - .model_id = EMST_F49B002UA, - .total_size = 256, - .page_size = 4096, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "EON", - .name = "EN29F002(A)(N)B", - .manufacture_id = EON_ID, - .model_id = EN_29F002B, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_en29f002a, - }, - - { - .vendor = "EON", - .name = "EN29F002(A)(N)T", - .manufacture_id = EON_ID, - .model_id = EN_29F002T, - .total_size = 256, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_en29f002a, - }, - - { - .vendor = "Fujitsu", - .name = "MBM29F004BC", - .manufacture_id = FUJITSU_ID, - .model_id = MBM29F004BC, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = NULL, - .write = NULL, - }, - - { - .vendor = "Fujitsu", - .name = "MBM29F004TC", - .manufacture_id = FUJITSU_ID, - .model_id = MBM29F004TC, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = NULL, - .write = NULL, - }, - - { - .vendor = "Fujitsu", - .name = "MBM29F400BC", - .manufacture_id = FUJITSU_ID, - .model_id = MBM29F400BC, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .erase = erase_m29f400bt, - .write = write_coreboot_m29f400bt, - }, - - { - .vendor = "Fujitsu", - .name = "MBM29F400TC", - .manufacture_id = FUJITSU_ID, - .model_id = MBM29F400TC, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .erase = erase_m29f400bt, - .write = write_coreboot_m29f400bt, - }, - - { - .vendor = "Intel", - .name = "82802AB", - .manufacture_id = INTEL_ID, - .model_id = 173, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_82802ab, - .erase = erase_82802ab, - .write = write_82802ab, - }, - - { - .vendor = "Intel", - .name = "82802AC", - .manufacture_id = INTEL_ID, - .model_id = 172, - .total_size = 1024, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_82802ab, - .erase = erase_82802ab, - .write = write_82802ab, - }, - - { - .vendor = "Macronix", - .name = "MX25L512", - .manufacture_id = MX_ID, - .model_id = MX_25L512, - .total_size = 64, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L1005", - .manufacture_id = MX_ID, - .model_id = MX_25L1005, - .total_size = 128, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L2005", - .manufacture_id = MX_ID, - .model_id = MX_25L2005, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L4005", - .manufacture_id = MX_ID, - .model_id = MX_25L4005, - .total_size = 512, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L8005", - .manufacture_id = MX_ID, - .model_id = MX_25L8005, - .total_size = 1024, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L1605", - .manufacture_id = MX_ID, - .model_id = MX_25L1605, - .total_size = 2048, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L1635D", - .manufacture_id = MX_ID, - .model_id = MX_25L1635D, - .total_size = 2048, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L3205", - .manufacture_id = MX_ID, - .model_id = MX_25L3205, - .total_size = 4096, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L3235D", - .manufacture_id = MX_ID, - .model_id = MX_25L3235D, - .total_size = 4096, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L6405", - .manufacture_id = MX_ID, - .model_id = MX_25L6405, - .total_size = 8192, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX25L12805", - .manufacture_id = MX_ID, - .model_id = MX_25L12805, - .total_size = 16384, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Macronix", - .name = "MX29F002B", - .manufacture_id = MX_ID, - .model_id = MX_29F002B, - .total_size = 256, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_29f002, - .erase = erase_29f002, - .write = write_29f002, - }, - - { - .vendor = "Macronix", - .name = "MX29F002T", - .manufacture_id = MX_ID, - .model_id = MX_29F002T, - .total_size = 256, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_29f002, - .erase = erase_29f002, - .write = write_29f002, - }, - - { - .vendor = "Macronix", - .name = "MX29LV040C", - .manufacture_id = MX_ID, - .model_id = MX_29LV040C, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PR, - .probe = probe_29f002, - .erase = erase_29f002, - .write = write_29f002, - }, - - { - .vendor = "Numonyx", - .name = "M25PE10", - .manufacture_id = ST_ID, - .model_id = 0x8011, - .total_size = 128, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_d8, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Numonyx", - .name = "M25PE20", - .manufacture_id = ST_ID, - .model_id = 0x8012, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_d8, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Numonyx", - .name = "M25PE40", - .manufacture_id = ST_ID, - .model_id = 0x8013, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_d8, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Numonyx", - .name = "M25PE80", - .manufacture_id = ST_ID, - .model_id = 0x8014, - .total_size = 1024, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_d8, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Numonyx", - .name = "M25PE16", - .manufacture_id = ST_ID, - .model_id = 0x8015, - .total_size = 2048, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_d8, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "PMC", - .name = "Pm25LV010", - .manufacture_id = PMC_ID, - .model_id = PMC_25LV010, - .total_size = 128, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "PMC", - .name = "Pm25LV016B", - .manufacture_id = PMC_ID, - .model_id = PMC_25LV016B, - .total_size = 2048, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "PMC", - .name = "Pm25LV020", - .manufacture_id = PMC_ID, - .model_id = PMC_25LV020, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "PMC", - .name = "Pm25LV040", - .manufacture_id = PMC_ID, - .model_id = PMC_25LV040, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "PMC", - .name = "Pm25LV080B", - .manufacture_id = PMC_ID, - .model_id = PMC_25LV080B, - .total_size = 1024, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "PMC", - .name = "Pm25LV512", - .manufacture_id = PMC_ID, - .model_id = PMC_25LV512, - .total_size = 64, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "PMC", - .name = "Pm49FL002", - .manufacture_id = PMC_ID_NOPREFIX, - .model_id = PMC_49FL002, - .total_size = 256, - .page_size = 16 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_49fl00x, - .erase = erase_49fl00x, - .write = write_49fl00x, - }, - - { - .vendor = "PMC", - .name = "Pm49FL004", - .manufacture_id = PMC_ID_NOPREFIX, - .model_id = PMC_49FL004, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_49fl00x, - .erase = erase_49fl00x, - .write = write_49fl00x, - }, - - { - .vendor = "Sharp", - .name = "LHF00L04", - .manufacture_id = SHARP_ID, - .model_id = SHARP_LHF00L04, - .total_size = 1024, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_lhf00l04, - .erase = erase_lhf00l04, - .write = write_lhf00l04, - }, - - { - .vendor = "Spansion", - .name = "S25FL016A", - .manufacture_id = SPANSION_ID, - .model_id = SPANSION_S25FL016A, - .total_size = 2048, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "SST", - .name = "SST25VF016B", - .manufacture_id = SST_ID, - .model_id = SST_25VF016B, - .total_size = 2048, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "SST", - .name = "SST25VF032B", - .manufacture_id = SST_ID, - .model_id = SST_25VF032B, - .total_size = 4096, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "SST", - .name = "SST25VF040B", - .manufacture_id = SST_ID, - .model_id = SST_25VF040B, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "SST", - .name = "SST25VF040.REMS", - .manufacture_id = 0xbf, - .model_id = 0x44, - .total_size = 512, - .page_size = 64*1024, - .tested = TEST_OK_PR, - .probe = probe_spi_rems, - .erase = spi_chip_erase_60, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "SST", - .name = "SST25VF040B.REMS", - .manufacture_id = 0xbf, - .model_id = 0x8d, - .total_size = 512, - .page_size = 64*1024, - .tested = TEST_OK_PR, - .probe = probe_spi_rems, - .erase = spi_chip_erase_c7, - .write = spi_aai_write, - .read = spi_chip_read, - }, - - { - .vendor = "SST", - .name = "SST25VF080B", - .manufacture_id = SST_ID, - .model_id = SST_25VF080B, - .total_size = 1024, - .page_size = 256, - .tested = TEST_OK_PROBE, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_60_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "SST", - .name = "SST28SF040A", - .manufacture_id = SST_ID, - .model_id = SST_28SF040, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_28sf040, - .erase = erase_28sf040, - .write = write_28sf040, - }, - - { - .vendor = "SST", - .name = "SST29EE010", - .manufacture_id = SST_ID, - .model_id = SST_29EE010, - .total_size = 128, - .page_size = 128, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "SST", - .name = "SST29LE010", - .manufacture_id = SST_ID, - .model_id = SST_29LE010, - .total_size = 128, - .page_size = 128, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "SST", - .name = "SST29EE020A", - .manufacture_id = SST_ID, - .model_id = SST_29EE020A, - .total_size = 256, - .page_size = 128, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "SST", - .name = "SST29LE020", - .manufacture_id = SST_ID, - .model_id = SST_29LE020, - .total_size = 256, - .page_size = 128, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "SST", - .name = "SST39SF010A", - .manufacture_id = SST_ID, - .model_id = SST_39SF010, - .total_size = 128, - .page_size = 4096, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "SST", - .name = "SST39SF020A", - .manufacture_id = SST_ID, - .model_id = SST_39SF020, - .total_size = 256, - .page_size = 4096, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "SST", - .name = "SST39SF040", - .manufacture_id = SST_ID, - .model_id = SST_39SF040, - .total_size = 512, - .page_size = 4096, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "SST", - .name = "SST39VF512", - .manufacture_id = SST_ID, - .model_id = SST_39VF512, - .total_size = 64, - .page_size = 4096, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "SST", - .name = "SST39VF010", - .manufacture_id = SST_ID, - .model_id = SST_39VF010, - .total_size = 128, - .page_size = 4096, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "SST", - .name = "SST39VF020", - .manufacture_id = SST_ID, - .model_id = SST_39VF020, - .total_size = 256, - .page_size = 4096, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "SST", - .name = "SST39VF040", - .manufacture_id = SST_ID, - .model_id = SST_39VF040, - .total_size = 512, - .page_size = 4096, - .tested = TEST_OK_PROBE, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "SST", - .name = "SST39VF080", - .manufacture_id = 0xbf, - .model_id = 0xd8, - .total_size = 1024, - .page_size = 4096, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "SST", - .name = "SST49LF002A/B", - .manufacture_id = SST_ID, - .model_id = SST_49LF002A, - .total_size = 256, - .page_size = 16 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_sst_fwhub, - .erase = erase_sst_fwhub, - .write = write_sst_fwhub, - }, - - { - .vendor = "SST", - .name = "SST49LF003A/B", - .manufacture_id = SST_ID, - .model_id = SST_49LF003A, - .total_size = 384, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_sst_fwhub, - .erase = erase_sst_fwhub, - .write = write_sst_fwhub, - }, - - { - .vendor = "SST", - .name = "SST49LF004A/B", - .manufacture_id = SST_ID, - .model_id = SST_49LF004A, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_sst_fwhub, - .erase = erase_sst_fwhub, - .write = write_sst_fwhub, - }, - - { - .vendor = "SST", - .name = "SST49LF004C", - .manufacture_id = SST_ID, - .model_id = SST_49LF004C, - .total_size = 512, - .page_size = 4 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_49lfxxxc, - .erase = erase_49lfxxxc, - .write = write_49lfxxxc, - }, - - { - .vendor = "SST", - .name = "SST49LF008A", - .manufacture_id = SST_ID, - .model_id = SST_49LF008A, - .total_size = 1024, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_sst_fwhub, - .erase = erase_sst_fwhub, - .write = write_sst_fwhub, - }, - - { - .vendor = "SST", - .name = "SST49LF008C", - .manufacture_id = SST_ID, - .model_id = SST_49LF008C, - .total_size = 1024, - .page_size = 4 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_49lfxxxc, - .erase = erase_49lfxxxc, - .write = write_49lfxxxc, - }, - - { - .vendor = "SST", - .name = "SST49LF016C", - .manufacture_id = SST_ID, - .model_id = SST_49LF016C, - .total_size = 2048, - .page_size = 4 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_49lfxxxc, - .erase = erase_49lfxxxc, - .write = write_49lfxxxc, - }, - - { - .vendor = "SST", - .name = "SST49LF020", - .manufacture_id = SST_ID, - .model_id = SST_49LF020, - .total_size = 256, - .page_size = 16 * 1024, - .tested = TEST_OK_PR, - .probe = probe_jedec, - .erase = erase_49lf040, - .write = write_49lf040, - }, - - { - .vendor = "SST", - .name = "SST49LF020A", - .manufacture_id = SST_ID, - .model_id = SST_49LF020A, - .total_size = 256, - .page_size = 16 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_49lf040, - .write = write_49lf040, - }, - - { - .vendor = "SST", - .name = "SST49LF040", - .manufacture_id = SST_ID, - .model_id = SST_49LF040, - .total_size = 512, - .page_size = 4096, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_49lf040, - .write = write_49lf040, - }, - - { - .vendor = "SST", - .name = "SST49LF040B", - .manufacture_id = SST_ID, - .model_id = SST_49LF040B, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_sst_fwhub, - .erase = erase_sst_fwhub, - .write = write_sst_fwhub, - }, - - { - .vendor = "SST", - .name = "SST49LF080A", - .manufacture_id = SST_ID, - .model_id = SST_49LF080A, - .total_size = 1024, - .page_size = 4096, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_49lf040, - .write = write_49lf040, - }, - - { - .vendor = "SST", - .name = "SST49LF160C", - .manufacture_id = SST_ID, - .model_id = SST_49LF160C, - .total_size = 2048, - .page_size = 4 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_49lfxxxc, - .erase = erase_49lfxxxc, - .write = write_49lfxxxc, - }, - - { - .vendor = "ST", - .name = "M25P05-A", - .manufacture_id = ST_ID, - .model_id = ST_M25P05A, - .total_size = 64, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P10-A", - .manufacture_id = ST_ID, - .model_id = ST_M25P10A, - .total_size = 128, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P20", - .manufacture_id = ST_ID, - .model_id = ST_M25P20, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P40", - .manufacture_id = ST_ID, - .model_id = ST_M25P40, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P40-old", - .manufacture_id = ST_ID, - .model_id = ST_M25P40_RES, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_res, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P80", - .manufacture_id = ST_ID, - .model_id = ST_M25P80, - .total_size = 1024, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P16", - .manufacture_id = ST_ID, - .model_id = ST_M25P16, - .total_size = 2048, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P32", - .manufacture_id = ST_ID, - .model_id = ST_M25P32, - .total_size = 4096, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P64", - .manufacture_id = ST_ID, - .model_id = ST_M25P64, - .total_size = 8192, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M25P128", - .manufacture_id = ST_ID, - .model_id = ST_M25P128, - .total_size = 16384, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "ST", - .name = "M29F002B", - .manufacture_id = ST_ID, - .model_id = ST_M29F002B, - .total_size = 256, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_m29f002, - .write = write_m29f002b, - }, - - { - .vendor = "ST", - .name = "M29F002T/NT", - .manufacture_id = ST_ID, - .model_id = ST_M29F002T, - .total_size = 256, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_m29f002, - .write = write_m29f002t, - }, - - { - .vendor = "ST", - .name = "M29F040B", - .manufacture_id = ST_ID, - .model_id = ST_M29F040B, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_29f040b, - .erase = erase_29f040b, - .write = write_29f040b, - }, - - { - .vendor = "ST", - .name = "M29F400BT", - .manufacture_id = ST_ID, - .model_id = ST_M29F400BT, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .erase = erase_m29f400bt, - .write = write_coreboot_m29f400bt, - }, - - { - .vendor = "ST", - .name = "M29W010B", - .manufacture_id = ST_ID, - .model_id = ST_M29W010B, - .total_size = 128, - .page_size = 16 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "ST", - .name = "M29W040B", - .manufacture_id = ST_ID, - .model_id = ST_M29W040B, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "ST", - .name = "M50FLW040A", - .manufacture_id = ST_ID, - .model_id = ST_M50FLW040A, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, - .erase = erase_stm50flw0x0x, - .write = write_stm50flw0x0x, - }, - - { - .vendor = "ST", - .name = "M50FLW040B", - .manufacture_id = ST_ID, - .model_id = ST_M50FLW040B, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, - .erase = erase_stm50flw0x0x, - .write = write_stm50flw0x0x, - }, - - { - .vendor = "ST", - .name = "M50FLW080A", - .manufacture_id = ST_ID, - .model_id = ST_M50FLW080A, - .total_size = 1024, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_stm50flw0x0x, - .erase = erase_stm50flw0x0x, - .write = write_stm50flw0x0x, - }, - - { - .vendor = "ST", - .name = "M50FLW080B", - .manufacture_id = ST_ID, - .model_id = ST_M50FLW080B, - .total_size = 1024, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, - .erase = erase_stm50flw0x0x, - .write = write_stm50flw0x0x, - }, - - { - .vendor = "ST", - .name = "M50FW002", - .manufacture_id = ST_ID, - .model_id = ST_M50FW002, - .total_size = 256, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_49lfxxxc, - .erase = NULL, - .write = NULL, - }, - - { - .vendor = "ST", - .name = "M50FW016", - .manufacture_id = ST_ID, - .model_id = ST_M50FW016, - .total_size = 2048, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_82802ab, - .erase = erase_82802ab, - .write = write_82802ab, - }, - - { - .vendor = "ST", - .name = "M50FW040", - .manufacture_id = ST_ID, - .model_id = ST_M50FW040, - .total_size = 512, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_82802ab, - .erase = erase_82802ab, - .write = write_82802ab, - }, - - { - .vendor = "ST", - .name = "M50FW080", - .manufacture_id = ST_ID, - .model_id = ST_M50FW080, - .total_size = 1024, - .page_size = 64 * 1024, - .tested = TEST_OK_PREW, - .probe = probe_82802ab, - .erase = erase_82802ab, - .write = write_82802ab, - }, - - { - .vendor = "ST", - .name = "M50LPW116", - .manufacture_id = ST_ID, - .model_id = ST_M50LPW116, - .total_size = 2048, - .page_size = 64 * 1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "SyncMOS", - .name = "S29C31004T", - .manufacture_id = SYNCMOS_ID, - .model_id = S29C31004T, - .total_size = 512, - .page_size = 128, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "SyncMOS", - .name = "S29C51001T", - .manufacture_id = SYNCMOS_ID, - .model_id = S29C51001T, - .total_size = 128, - .page_size = 128, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "SyncMOS", - .name = "S29C51002T", - .manufacture_id = SYNCMOS_ID, - .model_id = S29C51002T, - .total_size = 256, - .page_size = 128, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "SyncMOS", - .name = "S29C51004T", - .manufacture_id = SYNCMOS_ID, - .model_id = S29C51004T, - .total_size = 512, - .page_size = 128, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "Winbond", - .name = "W25x10", - .manufacture_id = WINBOND_NEX_ID, - .model_id = W_25X10, - .total_size = 128, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Winbond", - .name = "W25x20", - .manufacture_id = WINBOND_NEX_ID, - .model_id = W_25X20, - .total_size = 256, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Winbond", - .name = "W25x40", - .manufacture_id = WINBOND_NEX_ID, - .model_id = W_25X40, - .total_size = 512, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Winbond", - .name = "W25x80", - .manufacture_id = WINBOND_NEX_ID, - .model_id = W_25X80, - .total_size = 1024, - .page_size = 256, - .tested = TEST_OK_PREW, - .probe = probe_spi_rdid, - .erase = spi_chip_erase_c7, - .write = spi_chip_write, - .read = spi_chip_read, - }, - - { - .vendor = "Winbond", - .name = "W29C011", - .manufacture_id = WINBOND_ID, - .model_id = W_29C011, - .total_size = 128, - .page_size = 128, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "Winbond", - .name = "W29C020C", - .manufacture_id = WINBOND_ID, - .model_id = W_29C020C, - .total_size = 256, - .page_size = 128, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "Winbond", - .name = "W29C040P", - .manufacture_id = WINBOND_ID, - .model_id = W_29C040P, - .total_size = 512, - .page_size = 256, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "Winbond", - .name = "W29EE011", - .manufacture_id = WINBOND_ID, - .model_id = W_29C011, - .total_size = 128, - .page_size = 128, - .tested = TEST_OK_PREW, - .probe = probe_w29ee011, - .erase = erase_chip_jedec, - .write = write_jedec, - }, - - { - .vendor = "Winbond", - .name = "W39V040A", - .manufacture_id = WINBOND_ID, - .model_id = W_39V040A, - .total_size = 512, - .page_size = 64*1024, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "Winbond", - .name = "W39V040B", - .manufacture_id = WINBOND_ID, - .model_id = W_39V040B, - .total_size = 512, - .page_size = 64*1024, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "Winbond", - .name = "W39V040C", - .manufacture_id = WINBOND_ID, - .model_id = 0x50, - .total_size = 512, - .page_size = 64*1024, - .tested = TEST_OK_PREW, - .probe = probe_w39v040c, - .erase = erase_w39v040c, - .write = write_w39v040c, - }, - - { - .vendor = "Winbond", - .name = "W39V040FA", - .manufacture_id = WINBOND_ID, - .model_id = W_39V040FA, - .total_size = 512, - .page_size = 64*1024, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "Winbond", - .name = "W39V080A", - .manufacture_id = WINBOND_ID, - .model_id = W_39V080A, - .total_size = 1024, - .page_size = 64*1024, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_39sf020, - }, - - { - .vendor = "Winbond", - .name = "W49F002U", - .manufacture_id = WINBOND_ID, - .model_id = W_49F002U, - .total_size = 256, - .page_size = 128, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "Winbond", - .name = "W49V002A", - .manufacture_id = WINBOND_ID, - .model_id = W_49V002A, - .total_size = 256, - .page_size = 128, - .tested = TEST_OK_PREW, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "Winbond", - .name = "W49V002FA", - .manufacture_id = WINBOND_ID, - .model_id = W_49V002FA, - .total_size = 256, - .page_size = 128, - .tested = TEST_UNTESTED, - .probe = probe_jedec, - .erase = erase_chip_jedec, - .write = write_49f002, - }, - - { - .vendor = "Winbond", - .name = "W39V080FA", - .manufacture_id = WINBOND_ID, - .model_id = W_39V080FA, - .total_size = 1024, - .page_size = 64*1024, - .tested = TEST_OK_PREW, - .probe = probe_winbond_fwhub, - .erase = erase_winbond_fwhub, - .write = write_winbond_fwhub, - }, - - { - .vendor = "Winbond", - .name = "W39V080FA (dual mode)", - .manufacture_id = WINBOND_ID, - .model_id = W_39V080FA_DM, - .total_size = 512, - .page_size = 64*1024, - .tested = TEST_UNTESTED, - .probe = probe_winbond_fwhub, - .erase = erase_winbond_fwhub, - .write = write_winbond_fwhub, - }, - - { - .vendor = "Atmel", - .name = "unknown Atmel SPI chip", - .manufacture_id = ATMEL_ID, - .model_id = GENERIC_DEVICE_ID, - .total_size = 0, - .page_size = 256, - .tested = TEST_BAD_PREW, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - }, - - { - .vendor = "EON", - .name = "unknown EON SPI chip", - .manufacture_id = EON_ID_NOPREFIX, - .model_id = GENERIC_DEVICE_ID, - .total_size = 0, - .page_size = 256, - .tested = TEST_BAD_PREW, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - }, - - { - .vendor = "Macronix", - .name = "unknown Macronix SPI chip", - .manufacture_id = MX_ID, - .model_id = GENERIC_DEVICE_ID, - .total_size = 0, - .page_size = 256, - .tested = TEST_BAD_PREW, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - }, - - { - .vendor = "PMC", - .name = "unknown PMC SPI chip", - .manufacture_id = PMC_ID, - .model_id = GENERIC_DEVICE_ID, - .total_size = 0, - .page_size = 256, - .tested = TEST_BAD_PREW, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - }, - - { - .vendor = "SST", - .name = "unknown SST SPI chip", - .manufacture_id = SST_ID, - .model_id = GENERIC_DEVICE_ID, - .total_size = 0, - .page_size = 256, - .tested = TEST_BAD_PREW, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - }, - - { - .vendor = "ST", - .name = "unknown ST SPI chip", - .manufacture_id = ST_ID, - .model_id = GENERIC_DEVICE_ID, - .total_size = 0, - .page_size = 256, - .tested = TEST_BAD_PREW, - .probe = probe_spi_rdid, - .erase = NULL, - .write = NULL, - }, - - { NULL } -}; diff --git a/util/flashrom/flashrom.8 b/util/flashrom/flashrom.8 deleted file mode 100644 index cf6f5fd50e..0000000000 --- a/util/flashrom/flashrom.8 +++ /dev/null @@ -1,149 +0,0 @@ -.TH FLASHROM 8 "April 11, 2009" -.SH NAME -flashrom \- read, write, and erase BIOS/ROM/flash chips -.SH SYNOPSIS -.B flashrom \fR[\fB\-rwvEVfLhR\fR] [\fB\-c\fR chipname] [\fB\-s\fR exclude_start] [\fB\-e\fR exclude_end] - [\fB-m\fR vendor:part] [\fB-l\fR file.layout] [\fB-i\fR image_name] [file] -.SH DESCRIPTION -.B flashrom -is a utility for reading, writing, and erasing flash ROM chips. -It's often used to flash BIOS/coreboot/firmware images. -.PP -It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and -TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, -or SPI. -.PP -(see -.B http://coreboot.org -for details on coreboot) -.SH OPTIONS -If no file is specified, then all that happens -is that flash info is dumped and the flash chip is set to writable. -.TP -.B "\-r, \-\-read <file>" -Read flash ROM contents and save them into the given -.BR <file> . -.TP -.B "\-w, \-\-write <file>" -Write file into flash ROM (default when -.B <file> -is specified). -.TP -.B "\-v, \-\-verify <file>" -Verify the flash ROM contents against the given -.BR <file> . -.TP -.B "\-E, \-\-erase" -Erase the flash ROM chip. -.TP -.B "\-V, \-\-verbose" -More verbose output. -.TP -.B "\-c, \-\-chip" <chipname> -Probe only for specified flash ROM chip. -.TP -.B "\-s, \-\-estart" <addr> -Exclude start position (obsolete). -.TP -.B "\-e, \-\-eend" <addr> -Exclude end postion (obsolete). -.TP -.B "\-m, \-\-mainboard" <[vendor:]part> -Override mainboard settings. This option is needed for some mainboards, -see the -.B "flashrom \-\-list\-supported" -output for a list. The vendor is not required when the board name is unique. -.TP -.B "\-f, \-\-force" -Force write without checking whether the ROM image file is really meant -to be used on this board. -.sp -Note: This check only works while coreboot is running, and only for those -boards where the coreboot code supports it. -.TP -.B "\-l, \-\-layout <file>" -Read ROM layout from -.BR <file> . -.TP -.B "\-i, \-\-image <name>" -Only flash image -.B <name> -from flash layout. -.TP -.B "\-L, \-\-list\-supported" -List the ROM chips, chipsets, and mainboards supported by flashrom. -The list of mainboards consists of those boards which need a special -ROM write-enable function for flashrom to work. -.sp -There are many other boards which will work out of the box, without such -special support in flashrom. Some of the known-good/known-bad and tested ones -are listed at -.BR http://coreboot.org/Flashrom#Supported_mainboards , -but the list is not exhaustive, of course. -.sp -Please let us know if you can verify other boards to work or not work out -of the box. -.TP -.B "\-h, \-\-help" -Show a help text and exit. -.TP -.B "\-R, \-\-version" -Show version information and exit. -.SH EXIT STATUS -flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem -(/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails. -.SH BUGS -Please report any bugs at -.BR http://tracker.coreboot.org/trac/coreboot/newticket "," -or on the coreboot mailing list -.RB "(" http://coreboot.org/Mailinglist ")." -.SH LICENCE -.B flashrom -is covered by the GNU General Public License (GPL), version 2. Some files are -additionally available under the GPL (version 2, or any later version). -.SH COPYRIGHT -.br -Please see the individual files. -.SH AUTHORS -Carl-Daniel Hailfinger -.br -Claus Gindhart <claus.gindhart@kontron.com> -.br -Dominik Geyer <dominik.geyer@kontron.com> -.br -Eric Biederman <ebiederman@lnxi.com> -.br -Giampiero Giancipoli <gianci@email.it> -.br -Joe Bao <Zheng.Bao@amd.com> -.br -Luc Verhaegen <libv@skynet.be> -.br -Markus Boas <ryven@ryven.de> -.br -Nikolay Petukhov <nikolay.petukhov@gmail.com> -.br -Peter Stuge <peter@stuge.se> -.br -Reinder E.N. de Haan <lb_reha@mveas.com> -.br -Ronald G. Minnich <rminnich@gmail.com> -.br -Ronald Hoogenboom <ronald@zonnet.nl> -.br -Stefan Reinauer <stepan@coresystems.de> -.br -Stefan Wildemann <stefan.wildemann@kontron.com> -.br -Steven James <pyro@linuxlabs.com> -.br -Uwe Hermann <uwe@hermann-uwe.de> -.br -Wang Qingpei <Qingpei.Wang@amd.com> -.br -Yinghai Lu <yinghai.lu@amd.com> -.br -some others -.PP -This manual page was written by Uwe Hermann <uwe@hermann-uwe.de>. -It is licensed under the terms of the GNU GPL (version 2 or later). diff --git a/util/flashrom/flashrom.c b/util/flashrom/flashrom.c deleted file mode 100644 index 8e1c3e44ed..0000000000 --- a/util/flashrom/flashrom.c +++ /dev/null @@ -1,686 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * Copyright (C) 2004 Tyan Corp <yhlu@tyan.com> - * Copyright (C) 2005-2008 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <errno.h> -#include <fcntl.h> -#include <sys/types.h> -#include <sys/stat.h> -#include <unistd.h> -#include <stdio.h> -#include <string.h> -#include <stdlib.h> -#include <getopt.h> -#include <pci/pci.h> -/* for iopl */ -#if defined (__sun) && (defined(__i386) || defined(__amd64)) -#include <strings.h> -#include <sys/sysi86.h> -#include <sys/psw.h> -#include <asm/sunddi.h> -#endif -#include "flash.h" - -char *chip_to_probe = NULL; -struct pci_access *pacc; /* For board and chipset_enable */ -int exclude_start_page, exclude_end_page; -int verbose = 0; - -struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) -{ - struct pci_dev *temp; - struct pci_filter filter; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - filter.device = device; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) - return temp; - - return NULL; -} - -struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, - uint16_t card_vendor, uint16_t card_device) -{ - struct pci_dev *temp; - struct pci_filter filter; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - filter.device = device; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) { - if ((card_vendor == - pci_read_word(temp, PCI_SUBSYSTEM_VENDOR_ID)) - && (card_device == - pci_read_word(temp, PCI_SUBSYSTEM_ID))) - return temp; - } - - return NULL; -} - -void map_flash_registers(struct flashchip *flash) -{ - size_t size = flash->total_size * 1024; - flash->virtual_registers = physmap("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size); -} - -struct flashchip *probe_flash(struct flashchip *first_flash, int force) -{ - volatile uint8_t *bios; - struct flashchip *flash; - unsigned long base = 0, size; - - for (flash = first_flash; flash && flash->name; flash++) { - if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) - continue; - printf_debug("Probing for %s %s, %d KB: ", - flash->vendor, flash->name, flash->total_size); - if (!flash->probe && !force) { - printf_debug("failed! flashrom has no probe function for this flash chip.\n"); - continue; - } - - size = flash->total_size * 1024; - - /* If getpagesize() > size -> - * "Can't mmap memory using /dev/mem: Invalid argument" - * This should never happen as we don't support any flash chips - * smaller than 4k or 8k (yet). - */ - - if (getpagesize() > size) { - /* - * if a flash size of 0 is mapped, we map a single page - * so we can probe in that area whether we know the - * vendor at least. - */ - size = getpagesize(); - } - - base = flashbase && flashchips == first_flash ? flashbase : (0xffffffff - size + 1); - flash->virtual_memory = bios = physmap("flash chip", base, size); - - if (force) - break; - - if (flash->probe(flash) != 1) - goto notfound; - - if (first_flash == flashchips - || flash->model_id != GENERIC_DEVICE_ID) - break; - -notfound: - physunmap((void *)bios, size); - } - - if (!flash || !flash->name) - return NULL; - - printf("Found chip \"%s %s\" (%d KB) at physical address 0x%lx.\n", - flash->vendor, flash->name, flash->total_size, base); - flashbase = base; - return flash; -} - -int verify_flash(struct flashchip *flash, uint8_t *buf) -{ - int idx; - int total_size = flash->total_size * 1024; - uint8_t *buf2 = (uint8_t *) calloc(total_size, sizeof(char)); - if (flash->read == NULL) - memcpy(buf2, (const char *)flash->virtual_memory, total_size); - else - flash->read(flash, buf2); - - printf("Verifying flash... "); - - if (verbose) - printf("address: 0x00000000\b\b\b\b\b\b\b\b\b\b"); - - for (idx = 0; idx < total_size; idx++) { - if (verbose && ((idx & 0xfff) == 0xfff)) - printf("0x%08x", idx); - - if (*(buf2 + idx) != *(buf + idx)) { - if (verbose) - printf("0x%08x FAILED!", idx); - else - printf("FAILED at 0x%08x!", idx); - printf(" Expected=0x%02x, Read=0x%02x\n", - *(buf + idx), *(buf2 + idx)); - return 1; - } - - if (verbose && ((idx & 0xfff) == 0xfff)) - printf("\b\b\b\b\b\b\b\b\b\b"); - } - if (verbose) - printf("\b\b\b\b\b\b\b\b\b\b "); - - printf("VERIFIED. \n"); - - return 0; -} - -int read_flash(struct flashchip *flash, char *filename, unsigned int exclude_start_position, unsigned int exclude_end_position) -{ - unsigned long numbytes; - FILE *image; - unsigned long size = flash->total_size * 1024; - unsigned char *buf = calloc(size, sizeof(char)); - if ((image = fopen(filename, "w")) == NULL) { - perror(filename); - exit(1); - } - printf("Reading flash... "); - if (flash->read == NULL) - memcpy(buf, (const char *)flash->virtual_memory, size); - else - flash->read(flash, buf); - - if (exclude_end_position - exclude_start_position > 0) - memset(buf + exclude_start_position, 0, - exclude_end_position - exclude_start_position); - - numbytes = fwrite(buf, 1, size, image); - fclose(image); - printf("%s.\n", numbytes == size ? "done" : "FAILED"); - if (numbytes != size) - return 1; - return 0; -} - -int erase_flash(struct flashchip *flash) -{ - uint32_t erasedbytes; - unsigned long size = flash->total_size * 1024; - unsigned char *buf = calloc(size, sizeof(char)); - printf("Erasing flash chip... "); - if (NULL == flash->erase) { - printf("FAILED!\n"); - fprintf(stderr, "ERROR: flashrom has no erase function for this flash chip.\n"); - return 1; - } - flash->erase(flash); - if (NULL == flash->read) - memcpy(buf, (const char *)flash->virtual_memory, size); - else - flash->read(flash, buf); - for (erasedbytes = 0; erasedbytes < size; erasedbytes++) - if (0xff != buf[erasedbytes]) { - printf("FAILED!\n"); - fprintf(stderr, "ERROR at 0x%08x: Expected=0xff, Read=0x%02x\n", - erasedbytes, buf[erasedbytes]); - return 1; - } - printf("SUCCESS.\n"); - return 0; -} - -#ifndef MAX -#define MAX(a, b) ((a) > (b) ? (a) : (b)) -#endif -#define POS_PRINT(x) do { pos += strlen(x); printf(x); } while (0) - -void print_supported_chips(void) -{ - int okcol = 0, pos = 0; - struct flashchip *f; - - for (f = flashchips; f->name != NULL; f++) { - if (GENERIC_DEVICE_ID == f->model_id) - continue; - okcol = MAX(okcol, strlen(f->vendor) + 1 + strlen(f->name)); - } - okcol = (okcol + 7) & ~7; - - POS_PRINT("Supported flash chips:"); - while (pos < okcol) { - printf("\t"); - pos += 8 - (pos % 8); - } - printf("Tested OK operations:\tKnown BAD operations:\n\n"); - - for (f = flashchips; f->name != NULL; f++) { - printf("%s %s", f->vendor, f->name); - pos = strlen(f->vendor) + 1 + strlen(f->name); - while (pos < okcol) { - printf("\t"); - pos += 8 - (pos % 8); - } - if ((f->tested & TEST_OK_MASK)) { - if ((f->tested & TEST_OK_PROBE)) - POS_PRINT("PROBE "); - if ((f->tested & TEST_OK_READ)) - POS_PRINT("READ "); - if ((f->tested & TEST_OK_ERASE)) - POS_PRINT("ERASE "); - if ((f->tested & TEST_OK_WRITE)) - POS_PRINT("WRITE"); - } - while (pos < okcol + 24) { - printf("\t"); - pos += 8 - (pos % 8); - } - if ((f->tested & TEST_BAD_MASK)) { - if ((f->tested & TEST_BAD_PROBE)) - printf("PROBE "); - if ((f->tested & TEST_BAD_READ)) - printf("READ "); - if ((f->tested & TEST_BAD_ERASE)) - printf("ERASE "); - if ((f->tested & TEST_BAD_WRITE)) - printf("WRITE"); - } - printf("\n"); - } -} - -void usage(const char *name) -{ - printf("usage: %s [-rwvEVfLhR] [-c chipname] [-s exclude_start]\n", - name); - printf(" [-e exclude_end] [-m [vendor:]part] [-l file.layout] [-i imagename] [file]\n"); - printf - (" -r | --read: read flash and save into file\n" - " -w | --write: write file into flash\n" - " -v | --verify: verify flash against file\n" - " -E | --erase: erase flash device\n" - " -V | --verbose: more verbose output\n" - " -c | --chip <chipname>: probe only for specified flash chip\n" - " -s | --estart <addr>: exclude start position\n" - " -e | --eend <addr>: exclude end postion\n" - " -m | --mainboard <[vendor:]part>: override mainboard settings\n" - " -f | --force: force write without checking image\n" - " -l | --layout <file.layout>: read rom layout from file\n" - " -i | --image <name>: only flash image name from flash layout\n" - " -L | --list-supported: print supported devices\n" - " -h | --help: print this help text\n" - " -R | --version: print the version (release)\n" - "\n" " If no file is specified, then all that happens" - " is that flash info is dumped.\n\n"); - exit(1); -} - -void print_version(void) -{ - printf("flashrom r%s\n", FLASHROM_VERSION); -} - -int main(int argc, char *argv[]) -{ - uint8_t *buf; - unsigned long size, numbytes; - FILE *image; - /* Probe for up to three flash chips. */ - struct flashchip *flash, *flashes[3]; - int opt; - int option_index = 0; - int force = 0; - int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; - int ret = 0, i; -#ifdef __FreeBSD__ - int io_fd; -#endif - - static struct option long_options[] = { - {"read", 0, 0, 'r'}, - {"write", 0, 0, 'w'}, - {"erase", 0, 0, 'E'}, - {"verify", 0, 0, 'v'}, - {"chip", 1, 0, 'c'}, - {"estart", 1, 0, 's'}, - {"eend", 1, 0, 'e'}, - {"mainboard", 1, 0, 'm'}, - {"verbose", 0, 0, 'V'}, - {"force", 0, 0, 'f'}, - {"layout", 1, 0, 'l'}, - {"image", 1, 0, 'i'}, - {"list-supported", 0, 0, 'L'}, - {"help", 0, 0, 'h'}, - {"version", 0, 0, 'R'}, - {0, 0, 0, 0} - }; - - char *filename = NULL; - - unsigned int exclude_start_position = 0, exclude_end_position = 0; // [x,y) - char *tempstr = NULL, *tempstr2 = NULL; - - if (argc > 1) { - /* Yes, print them. */ - int i; - printf_debug("The arguments are:\n"); - for (i = 1; i < argc; ++i) - printf_debug("%s\n", argv[i]); - } - - setbuf(stdout, NULL); - while ((opt = getopt_long(argc, argv, "rRwvVEfc:s:e:m:l:i:Lh", - long_options, &option_index)) != EOF) { - switch (opt) { - case 'r': - read_it = 1; - break; - case 'w': - write_it = 1; - break; - case 'v': - verify_it = 1; - break; - case 'c': - chip_to_probe = strdup(optarg); - break; - case 'V': - verbose = 1; - break; - case 'E': - erase_it = 1; - break; - case 's': - tempstr = strdup(optarg); - sscanf(tempstr, "%x", &exclude_start_position); - break; - case 'e': - tempstr = strdup(optarg); - sscanf(tempstr, "%x", &exclude_end_position); - break; - case 'm': - tempstr = strdup(optarg); - strtok(tempstr, ":"); - tempstr2 = strtok(NULL, ":"); - if (tempstr2) { - lb_vendor = tempstr; - lb_part = tempstr2; - } else { - lb_vendor = NULL; - lb_part = tempstr; - } - break; - case 'f': - force = 1; - break; - case 'l': - tempstr = strdup(optarg); - if (read_romlayout(tempstr)) - exit(1); - break; - case 'i': - tempstr = strdup(optarg); - find_romentry(tempstr); - break; - case 'L': - print_supported_chips(); - print_supported_chipsets(); - print_supported_boards(); - exit(0); - break; - case 'R': - print_version(); - exit(0); - break; - case 'h': - default: - usage(argv[0]); - break; - } - } - - if (read_it && write_it) { - printf("Error: -r and -w are mutually exclusive.\n"); - usage(argv[0]); - } - - if (optind < argc) - filename = argv[optind++]; - - /* First get full io access */ -#if defined (__sun) && (defined(__i386) || defined(__amd64)) - if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { -#elif defined(__FreeBSD__) - if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else - if (iopl(3) != 0) { -#endif - fprintf(stderr, "ERROR: Could not get IO privileges (%s).\nYou need to be root.\n", strerror(errno)); - exit(1); - } - - /* Initialize PCI access for flash enables */ - pacc = pci_alloc(); /* Get the pci_access structure */ - /* Set all options you want -- here we stick with the defaults */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ - - myusec_calibrate_delay(); - - /* We look at the lbtable first to see if we need a - * mainboard specific flash enable sequence. - */ - coreboot_init(); - - /* try to enable it. Failure IS an option, since not all motherboards - * really need this to be done, etc., etc. - */ - ret = chipset_flash_enable(); - if (ret == -2) { - printf("WARNING: No chipset found. Flash detection " - "will most likely fail.\n"); - } - - board_flash_enable(lb_vendor, lb_part); - - for (i = 0; i < ARRAY_SIZE(flashes); i++) { - flashes[i] = - probe_flash(i ? flashes[i - 1] + 1 : flashchips, 0); - if (!flashes[i]) - for (i++; i < ARRAY_SIZE(flashes); i++) - flashes[i] = NULL; - } - - if (flashes[1]) { - printf("Multiple flash chips were detected:"); - for (i = 0; i < ARRAY_SIZE(flashes) && flashes[i]; i++) - printf(" %s", flashes[i]->name); - printf("\nPlease specify which chip to use with the -c <chipname> option.\n"); - exit(1); - } else if (!flashes[0]) { - printf("No EEPROM/flash device found.\n"); - if (!force || !chip_to_probe) { - printf("If you know which flash chip you have, and if this version of flashrom\n"); - printf("supports a similar flash chip, you can try to force read your chip. Run:\n"); - printf("flashrom -f -r -c similar_supported_flash_chip filename\n"); - printf("\n"); - printf("Note: flashrom can never write when the flash chip isn't found automatically.\n"); - } - if (force && read_it && chip_to_probe) { - printf("Force read (-f -r -c) requested, forcing chip probe success:\n"); - flashes[0] = probe_flash(flashchips, 1); - if (!flashes[0]) { - printf("flashrom does not support a flash chip named '%s'.\n", chip_to_probe); - printf("Run flashrom -L to view the hardware supported in this flashrom version.\n"); - exit(1); - } - if (!filename) { - printf("Error: No filename specified.\n"); - exit(1); - } - size = flashes[0]->total_size * 1024; - buf = (uint8_t *) calloc(size, sizeof(char)); - - if ((image = fopen(filename, "w")) == NULL) { - perror(filename); - exit(1); - } - printf("Force reading flash... "); - if (!flashes[0]->read) - memcpy(buf, (const char *)flashes[0]->virtual_memory, size); - else - flashes[0]->read(flashes[0], buf); - - if (exclude_end_position - exclude_start_position > 0) - memset(buf + exclude_start_position, 0, - exclude_end_position - - exclude_start_position); - - numbytes = fwrite(buf, 1, size, image); - fclose(image); - printf("%s.\n", numbytes == size ? "done" : "FAILED"); - free(buf); - return numbytes != size; - } - // FIXME: flash writes stay enabled! - exit(1); - } - - flash = flashes[0]; - - if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) { - printf("===\n"); - if (flash->tested & TEST_BAD_MASK) { - printf("This flash part has status NOT WORKING for operations:"); - if (flash->tested & TEST_BAD_PROBE) - printf(" PROBE"); - if (flash->tested & TEST_BAD_READ) - printf(" READ"); - if (flash->tested & TEST_BAD_ERASE) - printf(" ERASE"); - if (flash->tested & TEST_BAD_WRITE) - printf(" WRITE"); - printf("\n"); - } - if ((!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) || - (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) || - (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) || - (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE))) { - printf("This flash part has status UNTESTED for operations:"); - if (!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) - printf(" PROBE"); - if (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) - printf(" READ"); - if (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) - printf(" ERASE"); - if (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE)) - printf(" WRITE"); - printf("\n"); - } - printf("Please email a report to flashrom@coreboot.org if any of the above operations\n"); - printf("work correctly for you with this flash part. Please include the full output\n"); - printf("from the program, including chipset found. Thank you for your help!\n"); - printf("===\n"); - } - - if (!(read_it | write_it | verify_it | erase_it)) { - printf("No operations were specified.\n"); - // FIXME: flash writes stay enabled! - exit(1); - } - - if (!filename && !erase_it) { - printf("Error: No filename specified.\n"); - // FIXME: flash writes stay enabled! - exit(1); - } - - size = flash->total_size * 1024; - buf = (uint8_t *) calloc(size, sizeof(char)); - - if (erase_it) { - if (erase_flash(flash)) - return 1; - } else if (read_it) { - if (read_flash(flash, filename, exclude_start_position, exclude_end_position)) - return 1; - } else { - struct stat image_stat; - - if ((image = fopen(filename, "r")) == NULL) { - perror(filename); - exit(1); - } - if (fstat(fileno(image), &image_stat) != 0) { - perror(filename); - exit(1); - } - if (image_stat.st_size != flash->total_size * 1024) { - fprintf(stderr, "Error: Image size doesn't match\n"); - exit(1); - } - - numbytes = fread(buf, 1, size, image); - show_id(buf, size, force); - fclose(image); - if (numbytes != size) { - fprintf(stderr, "Error: Failed to read file. Got %ld bytes, wanted %ld!\n", numbytes, size); - return 1; - } - } - - /* exclude range stuff. Nice idea, but at the moment it is only - * supported in hardware by the pm49fl004 chips. - * Instead of implementing this for all chips I suggest advancing - * it to the rom layout feature below and drop exclude range - * completely once all flash chips can do rom layouts. stepan - */ - - // //////////////////////////////////////////////////////////// - if (exclude_end_position - exclude_start_position > 0) - memcpy(buf + exclude_start_position, - (const char *)flash->virtual_memory + - exclude_start_position, - exclude_end_position - exclude_start_position); - - exclude_start_page = exclude_start_position / flash->page_size; - if ((exclude_start_position % flash->page_size) != 0) { - exclude_start_page++; - } - exclude_end_page = exclude_end_position / flash->page_size; - // //////////////////////////////////////////////////////////// - - // This should be moved into each flash part's code to do it - // cleanly. This does the job. - handle_romentries(buf, (uint8_t *) flash->virtual_memory); - - // //////////////////////////////////////////////////////////// - - if (write_it) { - if (!flash->write) { - fprintf(stderr, "Error: flashrom has no write function for this flash chip.\n"); - return 1; - } - ret |= flash->write(flash, buf); - } - - if (verify_it) - ret |= verify_flash(flash, buf); - -#ifdef __FreeBSD__ - close(io_fd); -#endif - return ret; -} diff --git a/util/flashrom/ichspi.c b/util/flashrom/ichspi.c deleted file mode 100644 index 19f4b8066a..0000000000 --- a/util/flashrom/ichspi.c +++ /dev/null @@ -1,800 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2008 Stefan Wildemann <stefan.wildemann@kontron.com> - * Copyright (C) 2008 Claus Gindhart <claus.gindhart@kontron.com> - * Copyright (C) 2008 Dominik Geyer <dominik.geyer@kontron.com> - * Copyright (C) 2008 coresystems GmbH <info@coresystems.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * This module is designed for supporting the devices - * ST M25P40 - * ST M25P80 - * ST M25P16 - * ST M25P32 already tested - * ST M25P64 - * AT 25DF321 already tested - * - */ - -#include <stdio.h> -#include <string.h> -#include <stdint.h> -#include <sys/mman.h> -#include <pci/pci.h> -#include "flash.h" -#include "spi.h" - -/* ICH9 controller register definition */ -#define ICH9_REG_FADDR 0x08 /* 32 Bits */ -#define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ - -#define ICH9_REG_SSFS 0x90 /* 08 Bits */ -#define SSFS_SCIP 0x00000001 -#define SSFS_CDS 0x00000004 -#define SSFS_FCERR 0x00000008 -#define SSFS_AEL 0x00000010 - -#define ICH9_REG_SSFC 0x91 /* 24 Bits */ -#define SSFC_SCGO 0x00000200 -#define SSFC_ACS 0x00000400 -#define SSFC_SPOP 0x00000800 -#define SSFC_COP 0x00001000 -#define SSFC_DBC 0x00010000 -#define SSFC_DS 0x00400000 -#define SSFC_SME 0x00800000 -#define SSFC_SCF 0x01000000 -#define SSFC_SCF_20MHZ 0x00000000 -#define SSFC_SCF_33MHZ 0x01000000 - -#define ICH9_REG_PREOP 0x94 /* 16 Bits */ -#define ICH9_REG_OPTYPE 0x96 /* 16 Bits */ -#define ICH9_REG_OPMENU 0x98 /* 64 Bits */ - -// ICH9R SPI commands -#define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0 -#define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1 -#define SPI_OPCODE_TYPE_READ_WITH_ADDRESS 2 -#define SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS 3 - -// ICH7 registers -#define ICH7_REG_SPIS 0x00 /* 16 Bits */ -#define SPIS_SCIP 0x00000001 -#define SPIS_CDS 0x00000004 -#define SPIS_FCERR 0x00000008 - -/* VIA SPI is compatible with ICH7, but maxdata - to transfer is 16 bytes. - - DATA byte count on ICH7 is 8:13, on VIA 8:11 - - bit 12 is port select CS0 CS1 - bit 13 is FAST READ enable - bit 7 is used with fast read and one shot controls CS de-assert? -*/ - -#define ICH7_REG_SPIC 0x02 /* 16 Bits */ -#define SPIC_SCGO 0x0002 -#define SPIC_ACS 0x0004 -#define SPIC_SPOP 0x0008 -#define SPIC_DS 0x4000 - -#define ICH7_REG_SPIA 0x04 /* 32 Bits */ -#define ICH7_REG_SPID0 0x08 /* 64 Bytes */ -#define ICH7_REG_PREOP 0x54 /* 16 Bits */ -#define ICH7_REG_OPTYPE 0x56 /* 16 Bits */ -#define ICH7_REG_OPMENU 0x58 /* 64 Bits */ - -/* ICH SPI configuration lock-down. May be set during chipset enabling. */ -int ichspi_lock = 0; - -typedef struct _OPCODE { - uint8_t opcode; //This commands spi opcode - uint8_t spi_type; //This commands spi type - uint8_t atomic; //Use preop: (0: none, 1: preop0, 2: preop1 -} OPCODE; - -/* Opcode definition: - * Preop 1: Write Enable - * Preop 2: Write Status register enable - * - * OP 0: Write address - * OP 1: Read Address - * OP 2: ERASE block - * OP 3: Read Status register - * OP 4: Read ID - * OP 5: Write Status register - * OP 6: chip private (read JDEC id) - * OP 7: Chip erase - */ -typedef struct _OPCODES { - uint8_t preop[2]; - OPCODE opcode[8]; -} OPCODES; - -static OPCODES *curopcodes = NULL; - -/* HW access functions */ -static inline uint32_t REGREAD32(int X) -{ - volatile uint32_t regval; - regval = *(volatile uint32_t *)((uint8_t *) spibar + X); - return regval; -} - -static inline uint16_t REGREAD16(int X) -{ - volatile uint16_t regval; - regval = *(volatile uint16_t *)((uint8_t *) spibar + X); - return regval; -} - -#define REGWRITE32(X,Y) (*(uint32_t *)((uint8_t *)spibar+X)=Y) -#define REGWRITE16(X,Y) (*(uint16_t *)((uint8_t *)spibar+X)=Y) -#define REGWRITE8(X,Y) (*(uint8_t *)((uint8_t *)spibar+X)=Y) - -/* Common SPI functions */ -static inline int find_opcode(OPCODES *op, uint8_t opcode); -static inline int find_preop(OPCODES *op, uint8_t preop); -static int generate_opcodes(OPCODES * op); -static int program_opcodes(OPCODES * op); -static int run_opcode(OPCODE op, uint32_t offset, - uint8_t datalength, uint8_t * data); -static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, - int offset, int maxdata); -static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, - int offset, int maxdata); - -/* for pairing opcodes with their required preop */ -struct preop_opcode_pair { - uint8_t preop; - uint8_t opcode; -}; - -struct preop_opcode_pair pops[] = { - {JEDEC_WREN, JEDEC_BYTE_PROGRAM}, - {JEDEC_WREN, JEDEC_SE}, /* sector erase */ - {JEDEC_WREN, JEDEC_BE_52}, /* block erase */ - {JEDEC_WREN, JEDEC_BE_D8}, /* block erase */ - {JEDEC_WREN, JEDEC_CE_60}, /* chip erase */ - {JEDEC_WREN, JEDEC_CE_C7}, /* chip erase */ - {JEDEC_EWSR, JEDEC_WRSR}, - {0,} -}; - -OPCODES O_ST_M25P = { - { - JEDEC_WREN, - 0}, - { - {JEDEC_BYTE_PROGRAM, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Write Byte - {JEDEC_READ, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Data - {JEDEC_BE_D8, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Erase Sector - {JEDEC_RDSR, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read Device Status Reg - {JEDEC_RES, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Resume Deep Power-Down - {JEDEC_WRSR, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Write Status Register - {JEDEC_RDID, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read JDEC ID - {JEDEC_CE_C7, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Bulk erase - } -}; - -OPCODES O_EXISTING = {}; - -static inline int find_opcode(OPCODES *op, uint8_t opcode) -{ - int a; - - for (a = 0; a < 8; a++) { - if (op->opcode[a].opcode == opcode) - return a; - } - - return -1; -} - -static inline int find_preop(OPCODES *op, uint8_t preop) -{ - int a; - - for (a = 0; a < 2; a++) { - if (op->preop[a] == preop) - return a; - } - - return -1; -} - -static int generate_opcodes(OPCODES * op) -{ - int a, b, i; - uint16_t preop, optype; - uint32_t opmenu[2]; - - if (op == NULL) { - printf_debug("\n%s: null OPCODES pointer!\n", __FUNCTION__); - return -1; - } - - switch (flashbus) { - case BUS_TYPE_ICH7_SPI: - case BUS_TYPE_VIA_SPI: - preop = REGREAD16(ICH7_REG_PREOP); - optype = REGREAD16(ICH7_REG_OPTYPE); - opmenu[0] = REGREAD32(ICH7_REG_OPMENU); - opmenu[1] = REGREAD32(ICH7_REG_OPMENU + 4); - break; - case BUS_TYPE_ICH9_SPI: - preop = REGREAD16(ICH9_REG_PREOP); - optype = REGREAD16(ICH9_REG_OPTYPE); - opmenu[0] = REGREAD32(ICH9_REG_OPMENU); - opmenu[1] = REGREAD32(ICH9_REG_OPMENU + 4); - break; - default: - printf_debug("%s: unsupported chipset\n", __FUNCTION__); - return -1; - } - - op->preop[0] = (uint8_t) preop; - op->preop[1] = (uint8_t) (preop >> 8); - - for (a = 0; a < 8; a++) { - op->opcode[a].spi_type = (uint8_t) (optype & 0x3); - optype >>= 2; - } - - for (a = 0; a < 4; a++) { - op->opcode[a].opcode = (uint8_t) (opmenu[0] & 0xff); - opmenu[0] >>= 8; - } - - for (a = 4; a < 8; a++) { - op->opcode[a].opcode = (uint8_t) (opmenu[1] & 0xff); - opmenu[1] >>= 8; - } - - /* atomic (link opcode with required pre-op) */ - for (a = 4; a < 8; a++) - op->opcode[a].atomic = 0; - - for (i = 0; pops[i].opcode; i++) { - a = find_opcode(op, pops[i].opcode); - b = find_preop(op, pops[i].preop); - if ((a != -1) && (b != -1)) - op->opcode[a].atomic = (uint8_t) ++b; - } - - return 0; -} - -int program_opcodes(OPCODES * op) -{ - uint8_t a; - uint16_t preop, optype; - uint32_t opmenu[2]; - - /* Program Prefix Opcodes */ - /* 0:7 Prefix Opcode 1 */ - preop = (op->preop[0]); - /* 8:16 Prefix Opcode 2 */ - preop |= ((uint16_t) op->preop[1]) << 8; - - /* Program Opcode Types 0 - 7 */ - optype = 0; - for (a = 0; a < 8; a++) { - optype |= ((uint16_t) op->opcode[a].spi_type) << (a * 2); - } - - /* Program Allowable Opcodes 0 - 3 */ - opmenu[0] = 0; - for (a = 0; a < 4; a++) { - opmenu[0] |= ((uint32_t) op->opcode[a].opcode) << (a * 8); - } - - /*Program Allowable Opcodes 4 - 7 */ - opmenu[1] = 0; - for (a = 4; a < 8; a++) { - opmenu[1] |= ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8); - } - - printf_debug("\n%s: preop=%04x optype=%04x opmenu=%08x%08x\n", __func__, preop, optype, opmenu[0], opmenu[1]); - switch (flashbus) { - case BUS_TYPE_ICH7_SPI: - case BUS_TYPE_VIA_SPI: - REGWRITE16(ICH7_REG_PREOP, preop); - REGWRITE16(ICH7_REG_OPTYPE, optype); - REGWRITE32(ICH7_REG_OPMENU, opmenu[0]); - REGWRITE32(ICH7_REG_OPMENU + 4, opmenu[1]); - break; - case BUS_TYPE_ICH9_SPI: - REGWRITE16(ICH9_REG_PREOP, preop); - REGWRITE16(ICH9_REG_OPTYPE, optype); - REGWRITE32(ICH9_REG_OPMENU, opmenu[0]); - REGWRITE32(ICH9_REG_OPMENU + 4, opmenu[1]); - break; - default: - printf_debug("%s: unsupported chipset\n", __FUNCTION__); - return -1; - } - - return 0; -} - -/* This function generates OPCODES from or programs OPCODES to ICH according to - * the chipset's SPI configuration lock. - * - * It should be called before ICH sends any spi command. - */ -int ich_init_opcodes(void) -{ - int rc = 0; - OPCODES *curopcodes_done; - - if (curopcodes) - return 0; - - if (ichspi_lock) { - printf_debug("Generating OPCODES... "); - curopcodes_done = &O_EXISTING; - rc = generate_opcodes(curopcodes_done); - } else { - printf_debug("Programming OPCODES... "); - curopcodes_done = &O_ST_M25P; - rc = program_opcodes(curopcodes_done); - } - - if (rc) { - curopcodes = NULL; - printf_debug("failed\n"); - return 1; - } else { - curopcodes = curopcodes_done; - printf_debug("done\n"); - return 0; - } -} - -static int ich7_run_opcode(OPCODE op, uint32_t offset, - uint8_t datalength, uint8_t * data, int maxdata) -{ - int write_cmd = 0; - int timeout; - uint32_t temp32 = 0; - uint16_t temp16; - uint32_t a; - uint64_t opmenu; - int opcode_index; - - /* Is it a write command? */ - if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) - || (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) { - write_cmd = 1; - } - - /* Programm Offset in Flash into FADDR */ - REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ - - /* Program data into FDATA0 to N */ - if (write_cmd && (datalength != 0)) { - temp32 = 0; - for (a = 0; a < datalength; a++) { - if ((a % 4) == 0) { - temp32 = 0; - } - - temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8); - - if ((a % 4) == 3) { - REGWRITE32(ICH7_REG_SPID0 + (a - (a % 4)), - temp32); - } - } - if (((a - 1) % 4) != 3) { - REGWRITE32(ICH7_REG_SPID0 + - ((a - 1) - ((a - 1) % 4)), temp32); - } - - } - - /* Assemble SPIS */ - temp16 = 0; - /* clear error status registers */ - temp16 |= (SPIS_CDS + SPIS_FCERR); - REGWRITE16(ICH7_REG_SPIS, temp16); - - /* Assemble SPIC */ - temp16 = 0; - - if (datalength != 0) { - temp16 |= SPIC_DS; - temp16 |= ((uint32_t) ((datalength - 1) & (maxdata - 1))) << 8; - } - - /* Select opcode */ - opmenu = REGREAD32(ICH7_REG_OPMENU); - opmenu |= ((uint64_t)REGREAD32(ICH7_REG_OPMENU + 4)) << 32; - - for (opcode_index = 0; opcode_index < 8; opcode_index++) { - if ((opmenu & 0xff) == op.opcode) { - break; - } - opmenu >>= 8; - } - if (opcode_index == 8) { - printf_debug("Opcode %x not found.\n", op.opcode); - return 1; - } - temp16 |= ((uint16_t) (opcode_index & 0x07)) << 4; - - /* Handle Atomic */ - if (op.atomic != 0) { - /* Select atomic command */ - temp16 |= SPIC_ACS; - /* Select prefix opcode */ - if ((op.atomic - 1) == 1) { - /*Select prefix opcode 2 */ - temp16 |= SPIC_SPOP; - } - } - - /* Start */ - temp16 |= SPIC_SCGO; - - /* write it */ - REGWRITE16(ICH7_REG_SPIC, temp16); - - /* wait for cycle complete */ - timeout = 1000 * 60; // 60s is a looong timeout. - while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) { - myusec_delay(1000); - } - if (!timeout) { - printf_debug("timeout\n"); - } - - if ((REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR) != 0) { - printf_debug("Transaction error!\n"); - return 1; - } - - if ((!write_cmd) && (datalength != 0)) { - for (a = 0; a < datalength; a++) { - if ((a % 4) == 0) { - temp32 = REGREAD32(ICH7_REG_SPID0 + (a)); - } - - data[a] = - (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8))) - >> ((a % 4) * 8); - } - } - - return 0; -} - -static int ich9_run_opcode(OPCODE op, uint32_t offset, - uint8_t datalength, uint8_t * data) -{ - int write_cmd = 0; - int timeout; - uint32_t temp32; - uint32_t a; - uint64_t opmenu; - int opcode_index; - - /* Is it a write command? */ - if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) - || (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) { - write_cmd = 1; - } - - /* Programm Offset in Flash into FADDR */ - REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ - - /* Program data into FDATA0 to N */ - if (write_cmd && (datalength != 0)) { - temp32 = 0; - for (a = 0; a < datalength; a++) { - if ((a % 4) == 0) { - temp32 = 0; - } - - temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8); - - if ((a % 4) == 3) { - REGWRITE32(ICH9_REG_FDATA0 + (a - (a % 4)), - temp32); - } - } - if (((a - 1) % 4) != 3) { - REGWRITE32(ICH9_REG_FDATA0 + - ((a - 1) - ((a - 1) % 4)), temp32); - } - } - - /* Assemble SSFS + SSFC */ - temp32 = 0; - - /* clear error status registers */ - temp32 |= (SSFS_CDS + SSFS_FCERR); - /* USE 20 MhZ */ - temp32 |= SSFC_SCF_20MHZ; - - if (datalength != 0) { - uint32_t datatemp; - temp32 |= SSFC_DS; - datatemp = ((uint32_t) ((datalength - 1) & 0x3f)) << (8 + 8); - temp32 |= datatemp; - } - - /* Select opcode */ - opmenu = REGREAD32(ICH9_REG_OPMENU); - opmenu |= ((uint64_t)REGREAD32(ICH9_REG_OPMENU + 4)) << 32; - - for (opcode_index = 0; opcode_index < 8; opcode_index++) { - if ((opmenu & 0xff) == op.opcode) { - break; - } - opmenu >>= 8; - } - if (opcode_index == 8) { - printf_debug("Opcode %x not found.\n", op.opcode); - return 1; - } - temp32 |= ((uint32_t) (opcode_index & 0x07)) << (8 + 4); - - /* Handle Atomic */ - if (op.atomic != 0) { - /* Select atomic command */ - temp32 |= SSFC_ACS; - /* Selct prefix opcode */ - if ((op.atomic - 1) == 1) { - /*Select prefix opcode 2 */ - temp32 |= SSFC_SPOP; - } - } - - /* Start */ - temp32 |= SSFC_SCGO; - - /* write it */ - REGWRITE32(ICH9_REG_SSFS, temp32); - - /*wait for cycle complete */ - timeout = 1000 * 60; // 60s is a looong timeout. - while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) { - myusec_delay(1000); - } - if (!timeout) { - printf_debug("timeout\n"); - } - - if ((REGREAD32(ICH9_REG_SSFS) & SSFS_FCERR) != 0) { - printf_debug("Transaction error!\n"); - return 1; - } - - if ((!write_cmd) && (datalength != 0)) { - for (a = 0; a < datalength; a++) { - if ((a % 4) == 0) { - temp32 = REGREAD32(ICH9_REG_FDATA0 + (a)); - } - - data[a] = - (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8))) - >> ((a % 4) * 8); - } - } - - return 0; -} - -static int run_opcode(OPCODE op, uint32_t offset, - uint8_t datalength, uint8_t * data) -{ - switch (flashbus) { - case BUS_TYPE_VIA_SPI: - return ich7_run_opcode(op, offset, datalength, data, 16); - case BUS_TYPE_ICH7_SPI: - return ich7_run_opcode(op, offset, datalength, data, 64); - case BUS_TYPE_ICH9_SPI: - return ich9_run_opcode(op, offset, datalength, data); - default: - printf_debug("%s: unsupported chipset\n", __FUNCTION__); - } - - /* If we ever get here, something really weird happened */ - return -1; -} - -static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset, - int maxdata) -{ - int page_size = flash->page_size; - uint32_t remaining = flash->page_size; - int a; - - printf_debug("ich_spi_read_page: offset=%d, number=%d, buf=%p\n", - offset, page_size, buf); - - for (a = 0; a < page_size; a += maxdata) { - if (remaining < maxdata) { - - if (spi_nbyte_read(offset + (page_size - remaining), - &buf[page_size - remaining], remaining)) { - printf_debug("Error reading"); - return 1; - } - remaining = 0; - } else { - if (spi_nbyte_read(offset + (page_size - remaining), - &buf[page_size - remaining], maxdata)) { - printf_debug("Error reading"); - return 1; - } - remaining -= maxdata; - } - } - - return 0; -} - -static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, - int offset, int maxdata) -{ - int page_size = flash->page_size; - uint32_t remaining = page_size; - int a; - - printf_debug("ich_spi_write_page: offset=%d, number=%d, buf=%p\n", - offset, page_size, bytes); - - for (a = 0; a < page_size; a += maxdata) { - if (remaining < maxdata) { - if (run_opcode - (curopcodes->opcode[0], - offset + (page_size - remaining), remaining, - &bytes[page_size - remaining]) != 0) { - printf_debug("Error writing"); - return 1; - } - remaining = 0; - } else { - if (run_opcode - (curopcodes->opcode[0], - offset + (page_size - remaining), maxdata, - &bytes[page_size - remaining]) != 0) { - printf_debug("Error writing"); - return 1; - } - remaining -= maxdata; - } - } - - return 0; -} - -int ich_spi_read(struct flashchip *flash, uint8_t * buf) -{ - int i, rc = 0; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - int maxdata = 64; - - if (flashbus == BUS_TYPE_VIA_SPI) { - maxdata = 16; - } - - for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { - rc = ich_spi_read_page(flash, (void *)(buf + i * page_size), - i * page_size, maxdata); - } - - return rc; -} - -int ich_spi_write(struct flashchip *flash, uint8_t * buf) -{ - int i, j, rc = 0; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - int erase_size = 64 * 1024; - int maxdata = 64; - - spi_disable_blockprotect(); - - printf("Programming page: \n"); - - for (i = 0; i < total_size / erase_size; i++) { - /* FIMXE: call the chip-specific spi_block_erase_XX instead. - * For this, we need to add a block erase function to - * struct flashchip. - */ - rc = spi_block_erase_d8(flash, i * erase_size); - if (rc) { - printf("Error erasing block at 0x%x\n", i); - break; - } - - if (flashbus == BUS_TYPE_VIA_SPI) - maxdata = 16; - - for (j = 0; j < erase_size / page_size; j++) { - ich_spi_write_page(flash, - (void *)(buf + (i * erase_size) + (j * page_size)), - (i * erase_size) + (j * page_size), maxdata); - } - } - - printf("\n"); - - return rc; -} - -int ich_spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) -{ - int a; - int opcode_index = -1; - const unsigned char cmd = *writearr; - OPCODE *opcode; - uint32_t addr = 0; - uint8_t *data; - int count; - - /* find cmd in opcodes-table */ - for (a = 0; a < 8; a++) { - if ((curopcodes->opcode[a]).opcode == cmd) { - opcode_index = a; - break; - } - } - - /* unknown / not programmed command */ - if (opcode_index == -1) { - printf_debug("Invalid OPCODE 0x%02x\n", cmd); - return 1; - } - - opcode = &(curopcodes->opcode[opcode_index]); - - /* if opcode-type requires an address */ - if (opcode->spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS || - opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) { - addr = (writearr[1] << 16) | - (writearr[2] << 8) | (writearr[3] << 0); - } - - /* translate read/write array/count */ - if (opcode->spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) { - data = (uint8_t *) (writearr + 1); - count = writecnt - 1; - } else if (opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) { - data = (uint8_t *) (writearr + 4); - count = writecnt - 4; - } else { - data = (uint8_t *) readarr; - count = readcnt; - } - - if (run_opcode(*opcode, addr, count, data) != 0) { - printf_debug("run OPCODE 0x%02x failed\n", opcode->opcode); - return 1; - } - - return 0; -} diff --git a/util/flashrom/it87spi.c b/util/flashrom/it87spi.c deleted file mode 100644 index f95f88d82c..0000000000 --- a/util/flashrom/it87spi.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2007, 2008 Carl-Daniel Hailfinger - * Copyright (C) 2008 Ronald Hoogenboom <ronald@zonnet.nl> - * Copyright (C) 2008 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Contains the ITE IT87* SPI specific routines - */ - -#include <stdio.h> -#include <pci/pci.h> -#include <stdint.h> -#include <string.h> -#include "flash.h" -#include "spi.h" - -#define ITE_SUPERIO_PORT1 0x2e -#define ITE_SUPERIO_PORT2 0x4e - -uint16_t it8716f_flashport = 0; -/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */ -int fast_spi = 1; - -/* Generic Super I/O helper functions */ -uint8_t regval(uint16_t port, uint8_t reg) -{ - OUTB(reg, port); - return INB(port + 1); -} - -void regwrite(uint16_t port, uint8_t reg, uint8_t val) -{ - OUTB(reg, port); - OUTB(val, port + 1); -} - -/* Helper functions for most recent ITE IT87xx Super I/O chips */ -#define CHIP_ID_BYTE1_REG 0x20 -#define CHIP_ID_BYTE2_REG 0x21 -static void enter_conf_mode_ite(uint16_t port) -{ - OUTB(0x87, port); - OUTB(0x01, port); - OUTB(0x55, port); - if (port == ITE_SUPERIO_PORT1) - OUTB(0x55, port); - else - OUTB(0xaa, port); -} - -static void exit_conf_mode_ite(uint16_t port) -{ - regwrite(port, 0x02, 0x02); -} - -static uint16_t find_ite_spi_flash_port(uint16_t port) -{ - uint8_t tmp = 0; - uint16_t id, flashport = 0; - - enter_conf_mode_ite(port); - - id = regval(port, CHIP_ID_BYTE1_REG) << 8; - id |= regval(port, CHIP_ID_BYTE2_REG); - - /* TODO: Handle more IT87xx if they support flash translation */ - if (0x8716 == id || 0x8718 == id) { - /* NOLDN, reg 0x24, mask out lowest bit (suspend) */ - tmp = regval(port, 0x24) & 0xFE; - printf("Serial flash segment 0x%08x-0x%08x %sabled\n", - 0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis"); - printf("Serial flash segment 0x%08x-0x%08x %sabled\n", - 0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis"); - printf("Serial flash segment 0x%08x-0x%08x %sabled\n", - 0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis"); - printf("Serial flash segment 0x%08x-0x%08x %sabled\n", - 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis"); - printf("LPC write to serial flash %sabled\n", - (tmp & 1 << 4) ? "en" : "dis"); - /* If any serial flash segment is enabled, enable writing. */ - if ((tmp & 0xe) && (!(tmp & 1 << 4))) { - printf("Enabling LPC write to serial flash\n"); - tmp |= 1 << 4; - regwrite(port, 0x24, tmp); - } - printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); - /* LDN 0x7, reg 0x64/0x65 */ - regwrite(port, 0x07, 0x7); - flashport = regval(port, 0x64) << 8; - flashport |= regval(port, 0x65); - } - exit_conf_mode_ite(port); - return flashport; -} - -int it87xx_probe_spi_flash(const char *name) -{ - it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT1); - - if (!it8716f_flashport) - it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT2); - - if (it8716f_flashport) - flashbus = BUS_TYPE_IT87XX_SPI; - - return (!it8716f_flashport); -} - -/* - * The IT8716F only supports commands with length 1,2,4,5 bytes including - * command byte and can not read more than 3 bytes from the device. - * - * This function expects writearr[0] to be the first byte sent to the device, - * whereas the IT8716F splits commands internally into address and non-address - * commands with the address in inverse wire order. That's why the register - * ordering in case 4 and 5 may seem strange. - */ -int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) -{ - uint8_t busy, writeenc; - int i; - - do { - busy = INB(it8716f_flashport) & 0x80; - } while (busy); - if (readcnt > 3) { - printf("%s called with unsupported readcnt %i.\n", - __FUNCTION__, readcnt); - return 1; - } - switch (writecnt) { - case 1: - OUTB(writearr[0], it8716f_flashport + 1); - writeenc = 0x0; - break; - case 2: - OUTB(writearr[0], it8716f_flashport + 1); - OUTB(writearr[1], it8716f_flashport + 7); - writeenc = 0x1; - break; - case 4: - OUTB(writearr[0], it8716f_flashport + 1); - OUTB(writearr[1], it8716f_flashport + 4); - OUTB(writearr[2], it8716f_flashport + 3); - OUTB(writearr[3], it8716f_flashport + 2); - writeenc = 0x2; - break; - case 5: - OUTB(writearr[0], it8716f_flashport + 1); - OUTB(writearr[1], it8716f_flashport + 4); - OUTB(writearr[2], it8716f_flashport + 3); - OUTB(writearr[3], it8716f_flashport + 2); - OUTB(writearr[4], it8716f_flashport + 7); - writeenc = 0x3; - break; - default: - printf("%s called with unsupported writecnt %i.\n", - __FUNCTION__, writecnt); - return 1; - } - /* - * Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes. - * Note: - * We can't use writecnt directly, but have to use a strange encoding. - */ - OUTB(((0x4 + (fast_spi ? 1 : 0)) << 4) - | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport); - - if (readcnt > 0) { - do { - busy = INB(it8716f_flashport) & 0x80; - } while (busy); - - for (i = 0; i < readcnt; i++) - readarr[i] = INB(it8716f_flashport + 5 + i); - } - - return 0; -} - -/* Page size is usually 256 bytes */ -static void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) -{ - int i; - - spi_write_enable(); - OUTB(0x06, it8716f_flashport + 1); - OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); - for (i = 0; i < 256; i++) { - bios[256 * block + i] = buf[256 * block + i]; - } - OUTB(0, it8716f_flashport); - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 1-10 ms, so wait in 1 ms steps. - */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(1000); -} - -/* - * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles - * Program chip using firmware cycle byte programming. (SLOW!) - */ -int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf) -{ - int total_size = 1024 * flash->total_size; - int i; - - fast_spi = 0; - - spi_disable_blockprotect(); - for (i = 0; i < total_size; i++) { - spi_write_enable(); - spi_byte_program(i, buf[i]); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); - } - /* resume normal ops... */ - OUTB(0x20, it8716f_flashport); - - return 0; -} - -/* - * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles - * Need to read this big flash using firmware cycles 3 byte at a time. - */ -int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf) -{ - int total_size = 1024 * flash->total_size; - int i; - fast_spi = 0; - - if (total_size > 512 * 1024) { - for (i = 0; i < total_size; i += 3) { - int toread = 3; - if (total_size - i < toread) - toread = total_size - i; - spi_nbyte_read(i, buf + i, toread); - } - } else { - memcpy(buf, (const char *)flash->virtual_memory, total_size); - } - - return 0; -} - -int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf) -{ - int total_size = 1024 * flash->total_size; - int i; - - if (total_size > 512 * 1024) { - it8716f_over512k_spi_chip_write(flash, buf); - } else { - for (i = 0; i < total_size / 256; i++) { - it8716f_spi_page_program(i, buf, - (uint8_t *)flash->virtual_memory); - } - } - - return 0; -} diff --git a/util/flashrom/jedec.c b/util/flashrom/jedec.c deleted file mode 100644 index ac6095ba56..0000000000 --- a/util/flashrom/jedec.c +++ /dev/null @@ -1,330 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it> - * Copyright (C) 2006 coresystems GmbH <info@coresystems.de> - * Copyright (C) 2007 Carl-Daniel Hailfinger - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <stdint.h> -#include "flash.h" - -#define MAX_REFLASH_TRIES 0x10 - -/* Check one byte for odd parity */ -uint8_t oddparity(uint8_t val) -{ - val = (val ^ (val >> 4)) & 0xf; - val = (val ^ (val >> 2)) & 0x3; - return (val ^ (val >> 1)) & 0x1; -} - -void toggle_ready_jedec(volatile uint8_t *dst) -{ - unsigned int i = 0; - uint8_t tmp1, tmp2; - - tmp1 = chip_readb(dst) & 0x40; - - while (i++ < 0xFFFFFFF) { - tmp2 = chip_readb(dst) & 0x40; - if (tmp1 == tmp2) { - break; - } - tmp1 = tmp2; - } -} - -void data_polling_jedec(volatile uint8_t *dst, uint8_t data) -{ - unsigned int i = 0; - uint8_t tmp; - - data &= 0x80; - - while (i++ < 0xFFFFFFF) { - tmp = chip_readb(dst) & 0x80; - if (tmp == data) { - break; - } - } -} - -void unprotect_jedec(volatile uint8_t *bios) -{ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x80, bios + 0x5555); - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x20, bios + 0x5555); - - usleep(200); -} - -void protect_jedec(volatile uint8_t *bios) -{ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); - - usleep(200); -} - -int probe_jedec(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - uint32_t largeid1, largeid2; - - /* Issue JEDEC Product ID Entry command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x90, bios + 0x5555); - /* Older chips may need up to 100 us to respond. The ATMEL 29C020 - * needs 10 ms according to the data sheet. - */ - myusec_delay(10000); - - /* Read product ID */ - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - largeid1 = id1; - largeid2 = id2; - - /* Check if it is a continuation ID, this should be a while loop. */ - if (id1 == 0x7F) { - largeid1 <<= 8; - id1 = chip_readb(bios + 0x100); - largeid1 |= id1; - } - if (id2 == 0x7F) { - largeid2 <<= 8; - id2 = chip_readb(bios + 0x101); - largeid2 |= id2; - } - - /* Issue JEDEC Product ID Exit command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); - - printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); - if (!oddparity(id1)) - printf_debug(", id1 parity violation"); - printf_debug("\n"); - if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id) - return 1; - - return 0; -} - -int erase_sector_jedec(volatile uint8_t *bios, unsigned int page) -{ - /* Issue the Sector Erase command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); - - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x30, bios + page); - myusec_delay(10); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); - - return 0; -} - -int erase_block_jedec(volatile uint8_t *bios, unsigned int block) -{ - /* Issue the Sector Erase command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); - - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x50, bios + block); - myusec_delay(10); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); - - return 0; -} - -int erase_chip_jedec(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - - /* Issue the JEDEC Chip Erase command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); - - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x10, bios + 0x5555); - myusec_delay(10); - - toggle_ready_jedec(bios); - - return 0; -} - -int write_page_write_jedec(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, int page_size) -{ - int i, tried = 0, start_index = 0, ok; - volatile uint8_t *d = dst; - uint8_t *s = src; - -retry: - /* Issue JEDEC Data Unprotect comand */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); - - /* transfer data from source to destination */ - for (i = start_index; i < page_size; i++) { - /* If the data is 0xFF, don't program it */ - if (*src != 0xFF) - chip_writeb(*src, dst); - dst++; - src++; - } - - toggle_ready_jedec(dst - 1); - - dst = d; - src = s; - ok = 1; - for (i = 0; i < page_size; i++) { - if (chip_readb(dst) != *src) { - ok = 0; - break; - } - dst++; - src++; - } - - if (!ok && tried++ < MAX_REFLASH_TRIES) { - start_index = i; - goto retry; - } - if (!ok) { - fprintf(stderr, " page %d failed!\n", - (unsigned int)(d - bios) / page_size); - } - return !ok; -} - -int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst) -{ - int tried = 0, ok = 1; - - /* If the data is 0xFF, don't program it */ - if (*src == 0xFF) { - return -1; - } - -retry: - /* Issue JEDEC Byte Program command */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); - - /* transfer data from source to destination */ - chip_writeb(*src, dst); - toggle_ready_jedec(bios); - - if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) { - goto retry; - } - - if (tried >= MAX_REFLASH_TRIES) - ok = 0; - - return !ok; -} - -int write_sector_jedec(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, unsigned int page_size) -{ - int i; - - for (i = 0; i < page_size; i++) { - write_byte_program_jedec(bios, src, dst); - dst++, src++; - } - - return 0; -} - -int write_jedec(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - erase_chip_jedec(flash); - // dumb check if erase was successful. - for (i = 0; i < total_size; i++) { - if (bios[i] != (uint8_t) 0xff) { - printf("ERASE FAILED @%d, val %02x!\n", i, bios[i]); - return -1; - } - } - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - printf("%04d at address: 0x%08x", i, i * page_size); - write_page_write_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - protect_jedec(bios); - - return 0; -} diff --git a/util/flashrom/layout.c b/util/flashrom/layout.c deleted file mode 100644 index 87a52ad26f..0000000000 --- a/util/flashrom/layout.c +++ /dev/null @@ -1,231 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2005-2008 coresystems GmbH - * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <ctype.h> -#include <stdint.h> -#include "flash.h" - -char *mainboard_vendor = NULL; -char *mainboard_part = NULL; -int romimages = 0; - -#define MAX_ROMLAYOUT 16 - -typedef struct { - unsigned int start; - unsigned int end; - unsigned int included; - char name[256]; -} romlayout_t; - -romlayout_t rom_entries[MAX_ROMLAYOUT]; - -static char *def_name = "DEFAULT"; - -int show_id(uint8_t *bios, int size, int force) -{ - unsigned int *walk; - unsigned int mb_part_offset, mb_vendor_offset; - char *mb_part, *mb_vendor; - - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); - walk--; - - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID - * information at a different location. - */ - walk = (unsigned int *)(bios + size - 0x80); - walk--; - } - - /* - * Check if coreboot last image size is 0 or not a multiple of 1k or - * bigger than the chip or if the pointers to vendor ID or mainboard ID - * are outside the image of if the start of ID strings are nonsensical - * (nonprintable and not \0). - */ - mb_part_offset = *(walk - 1); - mb_vendor_offset = *(walk - 2); - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || - mb_part_offset > size || mb_vendor_offset > size) { - printf("Flash image seems to be a legacy BIOS. Disabling checks.\n"); - return 0; - } - - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); - if (!isprint((unsigned char)*mb_part) || - !isprint((unsigned char)*mb_vendor)) { - printf("Flash image seems to have garbage in the ID location." - " Disabling checks.\n"); - return 0; - } - - printf_debug("coreboot last image size " - "(not ROM size) is %d bytes.\n", *walk); - - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - printf_debug("Manufacturer: %s\n", mainboard_vendor); - printf_debug("Mainboard ID: %s\n", mainboard_part); - - /* - * If lb_vendor is not set, the coreboot table was - * not found. Nor was -m VENDOR:PART specified. - */ - if (!lb_vendor || !lb_part) { - printf("Note: If the following flash access fails, " - "try -m <vendor>:<mainboard>.\n"); - return 0; - } - - /* These comparisons are case insensitive to make things - * a little less user^Werror prone. - */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - printf_debug("This firmware image matches this mainboard.\n"); - } else { - if (force) { - printf("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - printf("ERROR: Your firmware image (%s:%s) does not " - "appear to\n be correct for the detected " - "mainboard (%s:%s)\n\nOverride with --force if you " - "are absolutely sure that you\nare using a correct " - "image for this mainboard or override\nthe detected " - "values with --mainboard <vendor>:<mainboard>.\n\n", - mainboard_vendor, mainboard_part, lb_vendor, - lb_part); - exit(1); - } - } - - return 0; -} - -int read_romlayout(char *name) -{ - FILE *romlayout; - char tempstr[256]; - int i; - - romlayout = fopen(name, "r"); - - if (!romlayout) { - fprintf(stderr, "ERROR: Could not open ROM layout (%s).\n", - name); - return -1; - } - - while (!feof(romlayout)) { - char *tstr1, *tstr2; - if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[romimages].name)) - continue; -#if 0 - // fscanf does not like arbitrary comments like that :( later - if (tempstr[0] == '#') { - continue; - } -#endif - tstr1 = strtok(tempstr, ":"); - tstr2 = strtok(NULL, ":"); - if (!tstr1 || !tstr2) { - fprintf(stderr, "Error parsing layout file.\n"); - fclose(romlayout); - return 1; - } - rom_entries[romimages].start = strtol(tstr1, (char **)NULL, 16); - rom_entries[romimages].end = strtol(tstr2, (char **)NULL, 16); - rom_entries[romimages].included = 0; - romimages++; - } - - for (i = 0; i < romimages; i++) { - printf_debug("romlayout %08x - %08x named %s\n", - rom_entries[i].start, - rom_entries[i].end, rom_entries[i].name); - } - - fclose(romlayout); - - return 0; -} - -int find_romentry(char *name) -{ - int i; - - if (!romimages) - return -1; - - printf("Looking for \"%s\"... ", name); - - for (i = 0; i < romimages; i++) { - if (!strcmp(rom_entries[i].name, name)) { - rom_entries[i].included = 1; - printf("found.\n"); - return i; - } - } - printf("not found.\n"); // Not found. Error. - - return -1; -} - -int handle_romentries(uint8_t *buffer, uint8_t *content) -{ - int i; - - // This function does not safe flash write cycles. - // - // Also it does not cope with overlapping rom layout - // sections. - // example: - // 00000000:00008fff gfxrom - // 00009000:0003ffff normal - // 00040000:0007ffff fallback - // 00000000:0007ffff all - // - // If you'd specify -i all the included flag of all other - // sections is still 0, so no changes will be made to the - // flash. Same thing if you specify -i normal -i all only - // normal will be updated and the rest will be kept. - - for (i = 0; i < romimages; i++) { - - if (rom_entries[i].included) - continue; - - memcpy(buffer + rom_entries[i].start, - content + rom_entries[i].start, - rom_entries[i].end - rom_entries[i].start); - } - - return 0; -} diff --git a/util/flashrom/m29f002.c b/util/flashrom/m29f002.c deleted file mode 100644 index 040cd2afd5..0000000000 --- a/util/flashrom/m29f002.c +++ /dev/null @@ -1,112 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2009 Peter Stuge <peter@stuge.se> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "flash.h" - -int erase_m29f002(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - chip_writeb(0xaa, bios + 0x555); - chip_writeb(0x55, bios + 0xaaa); - chip_writeb(0x80, bios + 0x555); - chip_writeb(0xaa, bios + 0x555); - chip_writeb(0x55, bios + 0xaaa); - chip_writeb(0x10, bios + 0x555); - myusec_delay(10); - toggle_ready_jedec(bios); - return 0; -} - -static void rewrite_block(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, int size) -{ - /* erase */ - chip_writeb(0xaa, bios + 0x555); - chip_writeb(0x55, bios + 0xaaa); - chip_writeb(0x80, bios + 0x555); - chip_writeb(0xaa, bios + 0x555); - chip_writeb(0x55, bios + 0xaaa); - chip_writeb(0x30, dst); - myusec_delay(10); - toggle_ready_jedec(bios); - - /* program */ - while (size--) { - chip_writeb(0xaa, bios + 0x555); - chip_writeb(0x55, bios + 0xaaa); - chip_writeb(0xa0, bios + 0x555); - chip_writeb(*src, dst); - toggle_ready_jedec(dst); - dst++; - src++; - } -} - -static void do_block(volatile uint8_t *bios, uint8_t *src, int i, - unsigned long start, int size) -{ - printf("%d at address: 0x%08lx", i, start); - rewrite_block(bios, src + start, bios + start, size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); -} - -int write_m29f002t(struct flashchip *flash, uint8_t *buf) -{ - int i, page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - /* M29F002(N)T has 7 blocks. From bottom to top their sizes are: - * 64k 64k 64k 32k 8k 8k 16k - * flash->page_size is set to 64k in flashchips.c - */ - - printf("Programming block: "); - for (i = 0; i < 3; i++) - do_block(bios, buf, i, i * page_size, page_size); - do_block(bios, buf, i++, 0x30000, 32 * 1024); - do_block(bios, buf, i++, 0x38000, 8 * 1024); - do_block(bios, buf, i++, 0x3a000, 8 * 1024); - do_block(bios, buf, i, 0x3c000, 16 * 1024); - - printf("\n"); - return 0; -} - -int write_m29f002b(struct flashchip *flash, uint8_t *buf) -{ - int i = 0, page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - /* M29F002B has 7 blocks. From bottom to top their sizes are: - * 16k 8k 8k 32k 64k 64k 64k - * flash->page_size is set to 64k in flashchips.c - */ - - printf("Programming block: "); - do_block(bios, buf, i++, 0x00000, 16 * 1024); - do_block(bios, buf, i++, 0x04000, 8 * 1024); - do_block(bios, buf, i++, 0x06000, 8 * 1024); - do_block(bios, buf, i++, 0x08000, 32 * 1024); - for (; i < 7; i++) - do_block(bios, buf, i, (i - 3) * page_size, page_size); - - printf("\n"); - return 0; -} diff --git a/util/flashrom/m29f400bt.c b/util/flashrom/m29f400bt.c deleted file mode 100644 index cb55d76ef0..0000000000 --- a/util/flashrom/m29f400bt.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "flash.h" - -void protect_m29f400bt(volatile uint8_t *bios) -{ - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0xA0, bios + 0xAAA); - - usleep(200); -} - -void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, int page_size) -{ - int i; - - for (i = 0; i < page_size; i++) { - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0xA0, bios + 0xAAA); - - /* transfer data from source to destination */ - chip_writeb(*src, dst); - //*(volatile char *) (bios) = 0xF0; - //usleep(5); - toggle_ready_jedec(dst); - printf - ("Value in the flash at address %p = %#x, want %#x\n", - (uint8_t *) (dst - bios), chip_readb(dst), *src); - dst++; - src++; - } -} - -int probe_m29f400bt(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x90, bios + 0xAAA); - - myusec_delay(10); - - id1 = chip_readb(bios); - /* The data sheet says id2 is at (bios + 0x01) and id2 listed in - * flash.h does not match. It should be possible to use JEDEC probe. - */ - id2 = chip_readb(bios + 0x02); - - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0xF0, bios + 0xAAA); - - myusec_delay(10); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - - if (id1 == flash->manufacture_id && id2 == flash->model_id) - return 1; - - return 0; -} - -int erase_m29f400bt(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x80, bios + 0xAAA); - - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x10, bios + 0xAAA); - - myusec_delay(10); - toggle_ready_jedec(bios); - - return 0; -} - -int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst) -{ - - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x80, bios + 0xAAA); - - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - //*(volatile uint8_t *) (bios + 0xAAA) = 0x10; - chip_writeb(0x30, dst); - - myusec_delay(10); - toggle_ready_jedec(bios); - - return 0; -} - -int write_m29f400bt(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - //erase_m29f400bt (flash); - printf("Programming page:\n "); - /********************************* - *Pages for M29F400BT: - * 16 0x7c000 0x7ffff TOP - * 8 0x7a000 0x7bfff - * 8 0x78000 0x79fff - * 32 0x70000 0x77fff - * 64 0x60000 0x6ffff - * 64 0x50000 0x5ffff - * 64 0x40000 0x4ffff - *--------------------------------- - * 64 0x30000 0x3ffff - * 64 0x20000 0x2ffff - * 64 0x10000 0x1ffff - * 64 0x00000 0x0ffff BOTTOM - *********************************/ - printf("total_size/page_size = %d\n", total_size / page_size); - for (i = 0; i < (total_size / page_size) - 1; i++) { - printf("%04d at address: 0x%08x\n", i, i * page_size); - block_erase_m29f400bt(bios, bios + i * page_size); - write_page_m29f400bt(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - - printf("%04d at address: 0x%08x\n", 7, 0x70000); - block_erase_m29f400bt(bios, bios + 0x70000); - write_page_m29f400bt(bios, buf + 0x70000, bios + 0x70000, 32 * 1024); - - printf("%04d at address: 0x%08x\n", 8, 0x78000); - block_erase_m29f400bt(bios, bios + 0x78000); - write_page_m29f400bt(bios, buf + 0x78000, bios + 0x78000, 8 * 1024); - - printf("%04d at address: 0x%08x\n", 9, 0x7a000); - block_erase_m29f400bt(bios, bios + 0x7a000); - write_page_m29f400bt(bios, buf + 0x7a000, bios + 0x7a000, 8 * 1024); - - printf("%04d at address: 0x%08x\n", 10, 0x7c000); - block_erase_m29f400bt(bios, bios + 0x7c000); - write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024); - - printf("\n"); - //protect_m29f400bt (bios); - - return 0; -} - -int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf) -{ - volatile uint8_t *bios = flash->virtual_memory; - - printf("Programming page:\n "); - /********************************* - *Pages for M29F400BT: - * 16 0x7c000 0x7ffff TOP - * 8 0x7a000 0x7bfff - * 8 0x78000 0x79fff - * 32 0x70000 0x77fff - * 64 0x60000 0x6ffff - * 64 0x50000 0x5ffff - * 64 0x40000 0x4ffff - *--------------------------------- - * 64 0x30000 0x3ffff - * 64 0x20000 0x2ffff - * 64 0x10000 0x1ffff - * 64 0x00000 0x0ffff BOTTOM - *********************************/ - printf("%04d at address: 0x%08x\n", 7, 0x00000); - block_erase_m29f400bt(bios, bios + 0x00000); - write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000, 64 * 1024); - - printf("%04d at address: 0x%08x\n", 7, 0x10000); - block_erase_m29f400bt(bios, bios + 0x10000); - write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000, 64 * 1024); - - printf("%04d at address: 0x%08x\n", 7, 0x20000); - block_erase_m29f400bt(bios, bios + 0x20000); - write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000, 64 * 1024); - - printf("%04d at address: 0x%08x\n", 7, 0x30000); - block_erase_m29f400bt(bios, bios + 0x30000); - write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024); - - printf("\n"); - //protect_m29f400bt (bios); - - return 0; -} diff --git a/util/flashrom/mx29f002.c b/util/flashrom/mx29f002.c deleted file mode 100644 index b85440f8d4..0000000000 --- a/util/flashrom/mx29f002.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <stdint.h> -#include "flash.h" - -int probe_29f002(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x90, bios + 0x5555); - - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - chip_writeb(0xF0, bios); - - myusec_delay(10); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) - return 1; - - return 0; -} - -int erase_29f002(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - - chip_writeb(0xF0, bios + 0x555); - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0x80, bios + 0x555); - chip_writeb(0xAA, bios + 0x555); - chip_writeb(0x55, bios + 0x2AA); - chip_writeb(0x10, bios + 0x555); - - myusec_delay(100); - toggle_ready_jedec(bios); - - // while ((*bios & 0x40) != 0x40) - //; - -#if 0 - toggle_ready_jedec(bios); - chip_writeb(0x30, bios + 0x0ffff); - chip_writeb(0x30, bios + 0x1ffff); - chip_writeb(0x30, bios + 0x2ffff); - chip_writeb(0x30, bios + 0x37fff); - chip_writeb(0x30, bios + 0x39fff); - chip_writeb(0x30, bios + 0x3bfff); -#endif - - return 0; -} - -int write_29f002(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - volatile uint8_t *bios = flash->virtual_memory; - volatile uint8_t *dst = bios; - - chip_writeb(0xF0, bios); - myusec_delay(10); - erase_29f002(flash); - //*bios = 0xF0; -#if 1 - printf("Programming page: "); - for (i = 0; i < total_size; i++) { - /* write to the sector */ - if ((i & 0xfff) == 0) - printf("address: 0x%08lx", (unsigned long)i); - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); - chip_writeb(*buf++, dst++); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(dst); - - if ((i & 0xfff) == 0) - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } -#endif - printf("\n"); - - return 0; -} diff --git a/util/flashrom/physmap.c b/util/flashrom/physmap.c deleted file mode 100644 index 49e1bfc649..0000000000 --- a/util/flashrom/physmap.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2009 Peter Stuge <peter@stuge.se> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <sys/types.h> -#include <sys/stat.h> -#include <fcntl.h> -#include <stdlib.h> -#include <errno.h> -#include "flash.h" - -#ifdef __DARWIN__ -#include <DirectIO/darwinio.h> - -#define MEM_DEV "DirectIO" - -void *sys_physmap(unsigned long phys_addr, size_t len) -{ - return map_physical(phys_addr, len); -} - -void physunmap(void *virt_addr, size_t len) -{ - unmap_physical(virt_addr, len); -} - -#else -#include <sys/mman.h> - -#if defined (__sun) && (defined(__i386) || defined(__amd64)) -# define MEM_DEV "/dev/xsvc" -#else -# define MEM_DEV "/dev/mem" -#endif - -static int fd_mem = -1; - -void *sys_physmap(unsigned long phys_addr, size_t len) -{ - void *virt_addr; - - if (-1 == fd_mem) { - /* Open the memory device UNCACHED. Important for MMIO. */ - if (-1 == (fd_mem = open(MEM_DEV, O_RDWR | O_SYNC))) { - perror("Critical error: open(" MEM_DEV ")"); - exit(2); - } - } - - virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED, - fd_mem, (off_t)phys_addr); - return MAP_FAILED == virt_addr ? NULL : virt_addr; -} - -void physunmap(void *virt_addr, size_t len) -{ - munmap(virt_addr, len); -} -#endif - -void *physmap(const char *descr, unsigned long phys_addr, size_t len) -{ - void *virt_addr = sys_physmap(phys_addr, len); - - if (NULL == virt_addr) { - if (NULL == descr) - descr = "memory"; - fprintf(stderr, "Error accessing %s, 0x%lx bytes at 0x%08lx\n", descr, (unsigned long)len, phys_addr); - perror(MEM_DEV " mmap failed"); - if (EINVAL == errno) { - fprintf(stderr, "In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27),\n"); - fprintf(stderr, "CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options.\n"); - fprintf(stderr, "Please check if either is enabled in your kernel before reporting a failure.\n"); - fprintf(stderr, "You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but\n"); - fprintf(stderr, "disabling the other option unfortunately requires a kernel recompile. Sorry!\n"); - } - exit(3); - } - - return virt_addr; -} diff --git a/util/flashrom/pm49fl00x.c b/util/flashrom/pm49fl00x.c deleted file mode 100644 index 86f3497185..0000000000 --- a/util/flashrom/pm49fl00x.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2004 Tyan Corporation - * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com> - * Copyright (C) 2007 Reinder E.N. de Haan <lb_reha@mveas.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include "flash.h" - -extern int exclude_start_page, exclude_end_page; - -void write_lockbits_49fl00x(volatile uint8_t *bios, int size, - unsigned char bits, int block_size) -{ - int i, left = size; - - for (i = 0; left >= block_size; i++, left -= block_size) { - /* pm49fl002 */ - if (block_size == 16384 && i % 2) - continue; - - chip_writeb(bits, bios + (i * block_size) + 2); - } -} - -int probe_49fl00x(struct flashchip *flash) -{ - int ret = probe_jedec(flash); - - if (ret == 1) - map_flash_registers(flash); - - return ret; -} - -int erase_49fl00x(struct flashchip *flash) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - /* unprotected */ - write_lockbits_49fl00x(flash->virtual_registers, - total_size, 0, page_size); - - /* - * erase_chip_jedec() will not work... Datasheet says - * "Chip erase is available in A/A Mux Mode only". - */ - printf("Erasing page: "); - for (i = 0; i < total_size / page_size; i++) { - if ((i >= exclude_start_page) && (i < exclude_end_page)) - continue; - - /* erase the page */ - erase_block_jedec(bios, i * page_size); - printf("%04d at address: 0x%08x", i, i * page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - /* protected */ - write_lockbits_49fl00x(flash->virtual_registers, - total_size, 1, page_size); - - return 0; -} - -int write_49fl00x(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - /* unprotected */ - write_lockbits_49fl00x(flash->virtual_registers, total_size, 0, - page_size); - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - if ((i >= exclude_start_page) && (i < exclude_end_page)) - continue; - - /* erase the page before programming */ - erase_block_jedec(bios, i * page_size); - - /* write to the sector */ - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - /* protected */ - write_lockbits_49fl00x(flash->virtual_registers, total_size, 1, - page_size); - - return 0; -} diff --git a/util/flashrom/sb600spi.c b/util/flashrom/sb600spi.c deleted file mode 100644 index 9a3e99debe..0000000000 --- a/util/flashrom/sb600spi.c +++ /dev/null @@ -1,175 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2008 Wang Qingpei <Qingpei.Wang@amd.com> - * Copyright (C) 2008 Joe Bao <Zheng.Bao@amd.com> - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <string.h> -#include <stdint.h> -#include <sys/mman.h> -#include <pci/pci.h> -#include "flash.h" -#include "spi.h" - -typedef struct _spi_controller { - unsigned int spi_cntrl0; /* 00h */ - unsigned int restrictedcmd1; /* 04h */ - unsigned int restrictedcmd2; /* 08h */ - unsigned int spi_cntrl1; /* 0ch */ - unsigned int spi_cmdvalue0; /* 10h */ - unsigned int spi_cmdvalue1; /* 14h */ - unsigned int spi_cmdvalue2; /* 18h */ - unsigned int spi_fakeid; /* 1Ch */ -} sb600_spi_controller; - -sb600_spi_controller *spi_bar = NULL; -uint8_t volatile *sb600_spibar; - -int sb600_spi_read(struct flashchip *flash, uint8_t *buf) -{ - int rc = 0, i; - int total_size = flash->total_size * 1024; - int page_size = 8; - - for (i = 0; i < total_size / page_size; i++) - spi_nbyte_read(i * page_size, (void *)(buf + i * page_size), - page_size); - return rc; -} - -uint8_t sb600_read_status_register(void) -{ - const unsigned char cmd[0x02] = { JEDEC_RDSR, 0x00 }; - unsigned char readarr[JEDEC_RDSR_INSIZE]; - - /* Read Status Register */ - spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr); - return readarr[0]; -} - -int sb600_spi_write(struct flashchip *flash, uint8_t *buf) -{ - int rc = 0, i; - int total_size = flash->total_size * 1024; - - /* Erase first */ - printf("Erasing flash before programming... "); - flash->erase(flash); - printf("done.\n"); - - printf("Programming flash"); - for (i = 0; i < total_size; i++, buf++) { - spi_disable_blockprotect(); - spi_write_enable(); - spi_byte_program(i, *buf); - /* wait program complete. */ - if (i % 0x8000 == 0) - printf("."); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - ; - } - printf(" done.\n"); - return rc; -} - -void reset_internal_fifo_pointer(void) -{ - sb600_spibar[2] |= 0x10; - - while (sb600_spibar[0xD] & 0x7) - printf("reset\n"); -} - -void execute_command(void) -{ - sb600_spibar[2] |= 1; - - while (sb600_spibar[2] & 1) - ; -} - -int sb600_spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) -{ - int count; - /* First byte is cmd which can not being sent through FIFO. */ - unsigned char cmd = *writearr++; - - writecnt--; - - spi_bar = (sb600_spi_controller *) sb600_spibar; - - printf_debug("%s, cmd=%x, writecnt=%x, readcnt=%x\n", - __func__, cmd, writecnt, readcnt); - - if (readcnt > 8) { - printf("%s, SB600 SPI controller can not receive %d bytes, " - "which is limited with 8 bytes\n", __func__, readcnt); - return 1; - } - - if (writecnt > 8) { - printf("%s, SB600 SPI controller can not sent %d bytes, " - "which is limited with 8 bytes\n", __func__, writecnt); - return 1; - } - - sb600_spibar[0] = cmd; - sb600_spibar[1] = readcnt << 4 | (writecnt); - - /* Before we use the FIFO, reset it first. */ - reset_internal_fifo_pointer(); - - /* Send the write byte to FIFO. */ - for (count = 0; count < writecnt; count++, writearr++) { - printf_debug(" [%x]", *writearr); - sb600_spibar[0xC] = *writearr; - } - printf_debug("\n"); - - /* - * We should send the data by sequence, which means we need to reset - * the FIFO pointer to the first byte we want to send. - */ - reset_internal_fifo_pointer(); - - execute_command(); - - /* - * After the command executed, we should find out the index of the - * received byte. Here we just reset the FIFO pointer, skip the - * writecnt, is there anyone who have anther method to replace it? - */ - reset_internal_fifo_pointer(); - - for (count = 0; count < writecnt; count++) { - cmd = sb600_spibar[0xC]; /* Skip the byte we send. */ - printf_debug("[ %2x]", cmd); - } - - printf_debug("The FIFO pointer 6 is %d.\n", sb600_spibar[0xd] & 0x07); - for (count = 0; count < readcnt; count++, readarr++) { - *readarr = sb600_spibar[0xC]; - printf_debug("[%02x]", *readarr); - } - printf_debug("\n"); - - return 0; -} diff --git a/util/flashrom/sharplhf00l04.c b/util/flashrom/sharplhf00l04.c deleted file mode 100644 index 52071e64ff..0000000000 --- a/util/flashrom/sharplhf00l04.c +++ /dev/null @@ -1,181 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <stdlib.h> -#include "flash.h" - -// I need that Berkeley bit-map printer -void print_lhf00l04_status(uint8_t status) -{ - printf("%s", status & 0x80 ? "Ready:" : "Busy:"); - printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:"); - printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:"); - printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:"); - printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:"); - printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:"); - printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:"); -} - -int probe_lhf00l04(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - -#if 0 - /* Enter ID mode */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x90, bios + 0x5555); -#endif - - chip_writeb(0xff, bios); - myusec_delay(10); - chip_writeb(0x90, bios); - myusec_delay(10); - - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - /* Leave ID mode */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); - - myusec_delay(10); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - - if (id1 != flash->manufacture_id || id2 != flash->model_id) - return 0; - - map_flash_registers(flash); - - return 1; -} - -uint8_t wait_lhf00l04(volatile uint8_t *bios) -{ - uint8_t status; - uint8_t id1, id2; - - chip_writeb(0x70, bios); - if ((chip_readb(bios) & 0x80) == 0) { // it's busy - while ((chip_readb(bios) & 0x80) == 0) ; - } - - status = chip_readb(bios); - - // put another command to get out of status register mode - - chip_writeb(0x90, bios); - myusec_delay(10); - - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - // this is needed to jam it out of "read id" mode - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); - - return status; -} - -int erase_lhf00l04_block(struct flashchip *flash, int offset) -{ - volatile uint8_t *bios = flash->virtual_memory + offset; - volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2; - uint8_t status; - - // clear status register - chip_writeb(0x50, bios); - printf("Erase at %p\n", bios); - status = wait_lhf00l04(flash->virtual_memory); - print_lhf00l04_status(status); - // clear write protect - printf("write protect is at %p\n", (wrprotect)); - printf("write protect is 0x%x\n", chip_readb(wrprotect)); - chip_writeb(0, wrprotect); - printf("write protect is 0x%x\n", chip_readb(wrprotect)); - - // now start it - chip_writeb(0x20, bios); - chip_writeb(0xd0, bios); - myusec_delay(10); - // now let's see what the register is - status = wait_lhf00l04(flash->virtual_memory); - print_lhf00l04_status(status); - printf("DONE BLOCK 0x%x\n", offset); - - return 0; -} - -int erase_lhf00l04(struct flashchip *flash) -{ - int i; - unsigned int total_size = flash->total_size * 1024; - - printf("total_size is %d; flash->page_size is %d\n", - total_size, flash->page_size); - for (i = 0; i < total_size; i += flash->page_size) - erase_lhf00l04_block(flash, i); - printf("DONE ERASE\n"); - - return 0; -} - -void write_page_lhf00l04(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, int page_size) -{ - int i; - - for (i = 0; i < page_size; i++) { - /* transfer data from source to destination */ - chip_writeb(0x40, dst); - chip_writeb(*src++, dst++); - wait_lhf00l04(bios); - } -} - -int write_lhf00l04(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - erase_lhf00l04(flash); - if (chip_readb(bios) != 0xff) { - printf("ERASE FAILED!\n"); - return -1; - } - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - printf("%04d at address: 0x%08x", i, i * page_size); - write_page_lhf00l04(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - protect_jedec(bios); - - return 0; -} diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c deleted file mode 100644 index 036c836d1a..0000000000 --- a/util/flashrom/spi.c +++ /dev/null @@ -1,644 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2007, 2008 Carl-Daniel Hailfinger - * Copyright (C) 2008 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Contains the generic SPI framework - */ - -#include <stdio.h> -#include <pci/pci.h> -#include <stdint.h> -#include <string.h> -#include "flash.h" -#include "spi.h" - -void spi_prettyprint_status_register(struct flashchip *flash); - -int spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) -{ - switch (flashbus) { - case BUS_TYPE_IT87XX_SPI: - return it8716f_spi_command(writecnt, readcnt, writearr, - readarr); - case BUS_TYPE_ICH7_SPI: - case BUS_TYPE_ICH9_SPI: - case BUS_TYPE_VIA_SPI: - return ich_spi_command(writecnt, readcnt, writearr, readarr); - case BUS_TYPE_SB600_SPI: - return sb600_spi_command(writecnt, readcnt, writearr, readarr); - case BUS_TYPE_WBSIO_SPI: - return wbsio_spi_command(writecnt, readcnt, writearr, readarr); - default: - printf_debug - ("%s called, but no SPI chipset/strapping detected\n", - __FUNCTION__); - } - return 1; -} - -static int spi_rdid(unsigned char *readarr, int bytes) -{ - const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; - - if (spi_command(sizeof(cmd), bytes, cmd, readarr)) - return 1; - printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], - readarr[2]); - return 0; -} - -static int spi_rems(unsigned char *readarr) -{ - const unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 }; - - if (spi_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr)) - return 1; - printf_debug("REMS returned %02x %02x.\n", readarr[0], readarr[1]); - return 0; -} - -static int spi_res(unsigned char *readarr) -{ - const unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 }; - - if (spi_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr)) - return 1; - printf_debug("RES returned %02x.\n", readarr[0]); - return 0; -} - -int spi_write_enable(void) -{ - const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN }; - - /* Send WREN (Write Enable) */ - return spi_command(sizeof(cmd), 0, cmd, NULL); -} - -int spi_write_disable(void) -{ - const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI }; - - /* Send WRDI (Write Disable) */ - return spi_command(sizeof(cmd), 0, cmd, NULL); -} - -static int probe_spi_rdid_generic(struct flashchip *flash, int bytes) -{ - unsigned char readarr[4]; - uint32_t manuf_id; - uint32_t model_id; - - if (spi_rdid(readarr, bytes)) - return 0; - - if (!oddparity(readarr[0])) - printf_debug("RDID byte 0 parity violation.\n"); - - /* Check if this is a continuation vendor ID */ - if (readarr[0] == 0x7f) { - if (!oddparity(readarr[1])) - printf_debug("RDID byte 1 parity violation.\n"); - manuf_id = (readarr[0] << 8) | readarr[1]; - model_id = readarr[2]; - if (bytes > 3) { - model_id <<= 8; - model_id |= readarr[3]; - } - } else { - manuf_id = readarr[0]; - model_id = (readarr[1] << 8) | readarr[2]; - } - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, manuf_id, - model_id); - - if (manuf_id == flash->manufacture_id && model_id == flash->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - - return 1; - } - - /* Test if this is a pure vendor match. */ - if (manuf_id == flash->manufacture_id && - GENERIC_DEVICE_ID == flash->model_id) - return 1; - - return 0; -} - -int probe_spi_rdid(struct flashchip *flash) -{ - return probe_spi_rdid_generic(flash, 3); -} - -/* support 4 bytes flash ID */ -int probe_spi_rdid4(struct flashchip *flash) -{ - /* only some SPI chipsets support 4 bytes commands */ - switch (flashbus) { - case BUS_TYPE_ICH7_SPI: - case BUS_TYPE_ICH9_SPI: - case BUS_TYPE_VIA_SPI: - case BUS_TYPE_SB600_SPI: - case BUS_TYPE_WBSIO_SPI: - return probe_spi_rdid_generic(flash, 4); - default: - printf_debug("4b ID not supported on this SPI controller\n"); - } - - return 0; -} - -int probe_spi_rems(struct flashchip *flash) -{ - unsigned char readarr[JEDEC_REMS_INSIZE]; - uint32_t manuf_id, model_id; - - if (spi_rems(readarr)) - return 0; - - manuf_id = readarr[0]; - model_id = readarr[1]; - - printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, manuf_id, - model_id); - - if (manuf_id == flash->manufacture_id && model_id == flash->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - - return 1; - } - - /* Test if this is a pure vendor match. */ - if (manuf_id == flash->manufacture_id && - GENERIC_DEVICE_ID == flash->model_id) - return 1; - - return 0; -} - -int probe_spi_res(struct flashchip *flash) -{ - unsigned char readarr[3]; - uint32_t model_id; - - /* Check if RDID was successful and did not return 0xff 0xff 0xff. - * In that case, RES is pointless. - */ - if (!spi_rdid(readarr, 3) && ((readarr[0] != 0xff) || - (readarr[1] != 0xff) || (readarr[2] != 0xff))) - return 0; - - if (spi_res(readarr)) - return 0; - - model_id = readarr[0]; - printf_debug("%s: id 0x%x\n", __FUNCTION__, model_id); - if (model_id != flash->model_id) - return 0; - - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; -} - -uint8_t spi_read_status_register(void) -{ - const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; - unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */ - - /* Read Status Register */ - if (flashbus == BUS_TYPE_SB600_SPI) { - /* SB600 uses a different way to read status register. */ - return sb600_read_status_register(); - } else { - spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr); - } - - return readarr[0]; -} - -/* Prettyprint the status register. Common definitions. */ -void spi_prettyprint_status_register_common(uint8_t status) -{ - printf_debug("Chip status register: Bit 5 / Block Protect 3 (BP3) is " - "%sset\n", (status & (1 << 5)) ? "" : "not "); - printf_debug("Chip status register: Bit 4 / Block Protect 2 (BP2) is " - "%sset\n", (status & (1 << 4)) ? "" : "not "); - printf_debug("Chip status register: Bit 3 / Block Protect 1 (BP1) is " - "%sset\n", (status & (1 << 3)) ? "" : "not "); - printf_debug("Chip status register: Bit 2 / Block Protect 0 (BP0) is " - "%sset\n", (status & (1 << 2)) ? "" : "not "); - printf_debug("Chip status register: Write Enable Latch (WEL) is " - "%sset\n", (status & (1 << 1)) ? "" : "not "); - printf_debug("Chip status register: Write In Progress (WIP/BUSY) is " - "%sset\n", (status & (1 << 0)) ? "" : "not "); -} - -/* Prettyprint the status register. Works for - * ST M25P series - * MX MX25L series - */ -void spi_prettyprint_status_register_st_m25p(uint8_t status) -{ - printf_debug("Chip status register: Status Register Write Disable " - "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not "); - printf_debug("Chip status register: Bit 6 is " - "%sset\n", (status & (1 << 6)) ? "" : "not "); - spi_prettyprint_status_register_common(status); -} - -/* Prettyprint the status register. Works for - * SST 25VF016 - */ -void spi_prettyprint_status_register_sst25vf016(uint8_t status) -{ - const char *bpt[] = { - "none", - "1F0000H-1FFFFFH", - "1E0000H-1FFFFFH", - "1C0000H-1FFFFFH", - "180000H-1FFFFFH", - "100000H-1FFFFFH", - "all", "all" - }; - printf_debug("Chip status register: Block Protect Write Disable " - "(BPL) is %sset\n", (status & (1 << 7)) ? "" : "not "); - printf_debug("Chip status register: Auto Address Increment Programming " - "(AAI) is %sset\n", (status & (1 << 6)) ? "" : "not "); - spi_prettyprint_status_register_common(status); - printf_debug("Resulting block protection : %s\n", - bpt[(status & 0x1c) >> 2]); -} - -void spi_prettyprint_status_register_sst25vf040b(uint8_t status) -{ - const char *bpt[] = { - "none", - "0x70000-0x7ffff", - "0x60000-0x7ffff", - "0x40000-0x7ffff", - "all blocks", "all blocks", "all blocks", "all blocks" - }; - printf_debug("Chip status register: Block Protect Write Disable " - "(BPL) is %sset\n", (status & (1 << 7)) ? "" : "not "); - printf_debug("Chip status register: Auto Address Increment Programming " - "(AAI) is %sset\n", (status & (1 << 6)) ? "" : "not "); - spi_prettyprint_status_register_common(status); - printf_debug("Resulting block protection : %s\n", - bpt[(status & 0x3c) >> 2]); -} - -void spi_prettyprint_status_register(struct flashchip *flash) -{ - uint8_t status; - - status = spi_read_status_register(); - printf_debug("Chip status register is %02x\n", status); - switch (flash->manufacture_id) { - case ST_ID: - if (((flash->model_id & 0xff00) == 0x2000) || - ((flash->model_id & 0xff00) == 0x2500)) - spi_prettyprint_status_register_st_m25p(status); - break; - case MX_ID: - if ((flash->model_id & 0xff00) == 0x2000) - spi_prettyprint_status_register_st_m25p(status); - break; - case SST_ID: - switch (flash->model_id) { - case 0x2541: - spi_prettyprint_status_register_sst25vf016(status); - break; - case 0x8d: - case 0x258d: - spi_prettyprint_status_register_sst25vf040b(status); - break; - } - break; - } -} - -int spi_chip_erase_60(struct flashchip *flash) -{ - const unsigned char cmd[JEDEC_CE_60_OUTSIZE] = {JEDEC_CE_60}; - int result; - - result = spi_disable_blockprotect(); - if (result) { - printf_debug("spi_disable_blockprotect failed\n"); - return result; - } - result = spi_write_enable(); - if (result) { - printf_debug("spi_write_enable failed\n"); - return result; - } - /* Send CE (Chip Erase) */ - result = spi_command(sizeof(cmd), 0, cmd, NULL); - if (result) { - printf_debug("spi_chip_erase_60 failed sending erase\n"); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 1-85 s, so wait in 1 s steps. - */ - /* FIXME: We assume spi_read_status_register will never fail. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - sleep(1); - return 0; -} - -int spi_chip_erase_c7(struct flashchip *flash) -{ - const unsigned char cmd[JEDEC_CE_C7_OUTSIZE] = { JEDEC_CE_C7 }; - int result; - - result = spi_disable_blockprotect(); - if (result) { - printf_debug("spi_disable_blockprotect failed\n"); - return result; - } - result = spi_write_enable(); - if (result) { - printf_debug("spi_write_enable failed\n"); - return result; - } - /* Send CE (Chip Erase) */ - result = spi_command(sizeof(cmd), 0, cmd, NULL); - if (result) { - printf_debug("spi_chip_erase_60 failed sending erase\n"); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 1-85 s, so wait in 1 s steps. - */ - /* FIXME: We assume spi_read_status_register will never fail. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - sleep(1); - return 0; -} - -int spi_chip_erase_60_c7(struct flashchip *flash) -{ - int result; - result = spi_chip_erase_60(flash); - if (result) { - printf_debug("spi_chip_erase_60 failed, trying c7\n"); - result = spi_chip_erase_c7(flash); - } - return result; -} - -int spi_block_erase_52(const struct flashchip *flash, unsigned long addr) -{ - unsigned char cmd[JEDEC_BE_52_OUTSIZE] = {JEDEC_BE_52}; - - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - spi_write_enable(); - /* Send BE (Block Erase) */ - spi_command(sizeof(cmd), 0, cmd, NULL); - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(100 * 1000); - return 0; -} - -/* Block size is usually - * 64k for Macronix - * 32k for SST - * 4-32k non-uniform for EON - */ -int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr) -{ - unsigned char cmd[JEDEC_BE_D8_OUTSIZE] = { JEDEC_BE_D8 }; - - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - spi_write_enable(); - /* Send BE (Block Erase) */ - spi_command(sizeof(cmd), 0, cmd, NULL); - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(100 * 1000); - return 0; -} - -int spi_chip_erase_d8(struct flashchip *flash) -{ - int i, rc = 0; - int total_size = flash->total_size * 1024; - int erase_size = 64 * 1024; - - spi_disable_blockprotect(); - - printf("Erasing chip: \n"); - - for (i = 0; i < total_size / erase_size; i++) { - rc = spi_block_erase_d8(flash, i * erase_size); - if (rc) { - printf("Error erasing block at 0x%x\n", i); - break; - } - } - - printf("\n"); - - return rc; -} - -/* Sector size is usually 4k, though Macronix eliteflash has 64k */ -int spi_sector_erase(const struct flashchip *flash, unsigned long addr) -{ - unsigned char cmd[JEDEC_SE_OUTSIZE] = { JEDEC_SE }; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - - spi_write_enable(); - /* Send SE (Sector Erase) */ - spi_command(sizeof(cmd), 0, cmd, NULL); - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 15-800 ms, so wait in 10 ms steps. - */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(10 * 1000); - return 0; -} - -int spi_write_status_enable(void) -{ - const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; - - /* Send EWSR (Enable Write Status Register). */ - return spi_command(JEDEC_EWSR_OUTSIZE, JEDEC_EWSR_INSIZE, cmd, NULL); -} - -/* - * This is according the SST25VF016 datasheet, who knows it is more - * generic that this... - */ -int spi_write_status_register(int status) -{ - const unsigned char cmd[JEDEC_WRSR_OUTSIZE] = - { JEDEC_WRSR, (unsigned char)status }; - - /* Send WRSR (Write Status Register) */ - return spi_command(sizeof(cmd), 0, cmd, NULL); -} - -void spi_byte_program(int address, uint8_t byte) -{ - const unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE] = { - JEDEC_BYTE_PROGRAM, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, - byte - }; - - /* Send Byte-Program */ - spi_command(sizeof(cmd), 0, cmd, NULL); -} - -int spi_disable_blockprotect(void) -{ - uint8_t status; - int result; - - status = spi_read_status_register(); - /* If there is block protection in effect, unprotect it first. */ - if ((status & 0x3c) != 0) { - printf_debug("Some block protection in effect, disabling\n"); - result = spi_write_status_enable(); - if (result) { - printf_debug("spi_write_status_enable failed\n"); - return result; - } - result = spi_write_status_register(status & ~0x3c); - if (result) { - printf_debug("spi_write_status_register failed\n"); - return result; - } - } - return 0; -} - -int spi_nbyte_read(int address, uint8_t *bytes, int len) -{ - const unsigned char cmd[JEDEC_READ_OUTSIZE] = { - JEDEC_READ, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, - }; - - /* Send Read */ - return spi_command(sizeof(cmd), len, cmd, bytes); -} - -int spi_chip_read(struct flashchip *flash, uint8_t *buf) -{ - switch (flashbus) { - case BUS_TYPE_IT87XX_SPI: - return it8716f_spi_chip_read(flash, buf); - case BUS_TYPE_SB600_SPI: - return sb600_spi_read(flash, buf); - case BUS_TYPE_ICH7_SPI: - case BUS_TYPE_ICH9_SPI: - case BUS_TYPE_VIA_SPI: - return ich_spi_read(flash, buf); - case BUS_TYPE_WBSIO_SPI: - return wbsio_spi_read(flash, buf); - default: - printf_debug - ("%s called, but no SPI chipset/strapping detected\n", - __FUNCTION__); - } - - return 1; -} - -int spi_chip_write(struct flashchip *flash, uint8_t *buf) -{ - switch (flashbus) { - case BUS_TYPE_IT87XX_SPI: - return it8716f_spi_chip_write(flash, buf); - case BUS_TYPE_SB600_SPI: - return sb600_spi_write(flash, buf); - case BUS_TYPE_ICH7_SPI: - case BUS_TYPE_ICH9_SPI: - case BUS_TYPE_VIA_SPI: - return ich_spi_write(flash, buf); - case BUS_TYPE_WBSIO_SPI: - return wbsio_spi_write(flash, buf); - default: - printf_debug - ("%s called, but no SPI chipset/strapping detected\n", - __FUNCTION__); - } - - return 1; -} - -int spi_aai_write(struct flashchip *flash, uint8_t *buf) -{ - uint32_t pos = 2, size = flash->total_size * 1024; - unsigned char w[6] = {0xad, 0, 0, 0, buf[0], buf[1]}; - switch (flashbus) { - case BUS_TYPE_WBSIO_SPI: - fprintf(stderr, "%s: impossible with Winbond SPI masters," - " degrading to byte program\n", __func__); - return spi_chip_write(flash, buf); - default: - break; - } - flash->erase(flash); - spi_write_enable(); - spi_command(6, 0, w, NULL); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(5); /* SST25VF040B Tbp is max 10us */ - while (pos < size) { - w[1] = buf[pos++]; - w[2] = buf[pos++]; - spi_command(3, 0, w, NULL); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(5); /* SST25VF040B Tbp is max 10us */ - } - spi_write_disable(); - return 0; -} diff --git a/util/flashrom/spi.h b/util/flashrom/spi.h deleted file mode 100644 index d3d9805775..0000000000 --- a/util/flashrom/spi.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2007, 2008 Carl-Daniel Hailfinger - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __SPI_H__ -#define __SPI_H__ 1 - -/* - * Contains the generic SPI headers - */ - -/* Read Electronic ID */ -#define JEDEC_RDID 0x9f -#define JEDEC_RDID_OUTSIZE 0x01 -#define JEDEC_RDID_INSIZE 0x03 - -/* AT25F512A has bit 3 as don't care bit in commands */ -#define AT25F512A_RDID 0x15 -#define AT25F512A_RDID_OUTSIZE 0x01 -#define AT25F512A_RDID_INSIZE 0x02 - -/* Read Electronic Manufacturer Signature */ -#define JEDEC_REMS 0x90 -#define JEDEC_REMS_OUTSIZE 0x04 -#define JEDEC_REMS_INSIZE 0x02 - -/* Read Electronic Signature */ -#define JEDEC_RES 0xab -#define JEDEC_RES_OUTSIZE 0x04 -#define JEDEC_RES_INSIZE 0x01 - -/* Write Enable */ -#define JEDEC_WREN 0x06 -#define JEDEC_WREN_OUTSIZE 0x01 -#define JEDEC_WREN_INSIZE 0x00 - -/* Write Disable */ -#define JEDEC_WRDI 0x04 -#define JEDEC_WRDI_OUTSIZE 0x01 -#define JEDEC_WRDI_INSIZE 0x00 - -/* Chip Erase 0x60 is supported by Macronix/SST chips. */ -#define JEDEC_CE_60 0x60 -#define JEDEC_CE_60_OUTSIZE 0x01 -#define JEDEC_CE_60_INSIZE 0x00 - -/* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */ -#define JEDEC_CE_C7 0xc7 -#define JEDEC_CE_C7_OUTSIZE 0x01 -#define JEDEC_CE_C7_INSIZE 0x00 - -/* Block Erase 0x52 is supported by SST and old Atmel chips. */ -#define JEDEC_BE_52 0x52 -#define JEDEC_BE_52_OUTSIZE 0x04 -#define JEDEC_BE_52_INSIZE 0x00 - -/* Block Erase 0xd8 is supported by EON/Macronix chips. */ -#define JEDEC_BE_D8 0xd8 -#define JEDEC_BE_D8_OUTSIZE 0x04 -#define JEDEC_BE_D8_INSIZE 0x00 - -/* Sector Erase 0x20 is supported by Macronix/SST chips. */ -#define JEDEC_SE 0x20 -#define JEDEC_SE_OUTSIZE 0x04 -#define JEDEC_SE_INSIZE 0x00 - -/* Read Status Register */ -#define JEDEC_RDSR 0x05 -#define JEDEC_RDSR_OUTSIZE 0x01 -#define JEDEC_RDSR_INSIZE 0x01 -#define JEDEC_RDSR_BIT_WIP (0x01 << 0) - -/* Write Status Enable */ -#define JEDEC_EWSR 0x50 -#define JEDEC_EWSR_OUTSIZE 0x01 -#define JEDEC_EWSR_INSIZE 0x00 - -/* Write Status Register */ -#define JEDEC_WRSR 0x01 -#define JEDEC_WRSR_OUTSIZE 0x02 -#define JEDEC_WRSR_INSIZE 0x00 - -/* Read the memory */ -#define JEDEC_READ 0x03 -#define JEDEC_READ_OUTSIZE 0x04 -/* JEDEC_READ_INSIZE : any length */ - -/* Write memory byte */ -#define JEDEC_BYTE_PROGRAM 0x02 -#define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05 -#define JEDEC_BYTE_PROGRAM_INSIZE 0x00 - -#endif /* !__SPI_H__ */ diff --git a/util/flashrom/sst28sf040.c b/util/flashrom/sst28sf040.c deleted file mode 100644 index 282b369bdb..0000000000 --- a/util/flashrom/sst28sf040.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <stdint.h> -#include "flash.h" - -#define AUTO_PG_ERASE1 0x20 -#define AUTO_PG_ERASE2 0xD0 -#define AUTO_PGRM 0x10 -#define CHIP_ERASE 0x30 -#define RESET 0xFF -#define READ_ID 0x90 - -static __inline__ void protect_28sf040(volatile uint8_t *bios) -{ - uint8_t tmp; - - tmp = chip_readb(bios + 0x1823); - tmp = chip_readb(bios + 0x1820); - tmp = chip_readb(bios + 0x1822); - tmp = chip_readb(bios + 0x0418); - tmp = chip_readb(bios + 0x041B); - tmp = chip_readb(bios + 0x0419); - tmp = chip_readb(bios + 0x040A); -} - -static __inline__ void unprotect_28sf040(volatile uint8_t *bios) -{ - uint8_t tmp; - - tmp = chip_readb(bios + 0x1823); - tmp = chip_readb(bios + 0x1820); - tmp = chip_readb(bios + 0x1822); - tmp = chip_readb(bios + 0x0418); - tmp = chip_readb(bios + 0x041B); - tmp = chip_readb(bios + 0x0419); - tmp = chip_readb(bios + 0x041A); -} - -static __inline__ int erase_sector_28sf040(volatile uint8_t *bios, - unsigned long address) -{ - chip_writeb(AUTO_PG_ERASE1, bios); - chip_writeb(AUTO_PG_ERASE2, bios + address); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); - - return 0; -} - -static __inline__ int write_sector_28sf040(volatile uint8_t *bios, - uint8_t *src, - volatile uint8_t *dst, - unsigned int page_size) -{ - int i; - - for (i = 0; i < page_size; i++) { - /* transfer data from source to destination */ - if (*src == 0xFF) { - dst++, src++; - /* If the data is 0xFF, don't program it */ - continue; - } - /*issue AUTO PROGRAM command */ - chip_writeb(AUTO_PGRM, dst); - chip_writeb(*src++, dst++); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); - } - - return 0; -} - -int probe_28sf040(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - - chip_writeb(RESET, bios); - myusec_delay(10); - - chip_writeb(READ_ID, bios); - myusec_delay(10); - id1 = chip_readb(bios); - myusec_delay(10); - id2 = chip_readb(bios + 0x01); - - chip_writeb(RESET, bios); - myusec_delay(10); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - if (id1 == flash->manufacture_id && id2 == flash->model_id) - return 1; - - return 0; -} - -int erase_28sf040(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - - unprotect_28sf040(bios); - chip_writeb(CHIP_ERASE, bios); - chip_writeb(CHIP_ERASE, bios); - protect_28sf040(bios); - - myusec_delay(10); - toggle_ready_jedec(bios); - - return 0; -} - -int write_28sf040(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - unprotect_28sf040(bios); - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - /* erase the page before programming */ - erase_sector_28sf040(bios, i * page_size); - - /* write to the sector */ - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_28sf040(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - - protect_28sf040(bios); - - return 0; -} diff --git a/util/flashrom/sst39sf020.c b/util/flashrom/sst39sf020.c deleted file mode 100644 index f6fcc37315..0000000000 --- a/util/flashrom/sst39sf020.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <stdint.h> -#include "flash.h" - -int write_39sf020(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - erase_chip_jedec(flash); - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - /* write to the sector */ - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - return 0; -} diff --git a/util/flashrom/sst49lf040.c b/util/flashrom/sst49lf040.c deleted file mode 100644 index 10452bfc4a..0000000000 --- a/util/flashrom/sst49lf040.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include "flash.h" - -int erase_49lf040(struct flashchip *flash) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - for (i = 0; i < total_size / page_size; i++) { - /* Chip erase only works in parallel programming mode - * for the 49lf040. Use sector-erase instead */ - erase_sector_jedec(bios, i * page_size); - } - - return 0; -} - -int write_49lf040(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - /* erase the page before programming - * Chip erase only works in parallel programming mode - * for the 49lf040. Use sector-erase instead */ - erase_sector_jedec(bios, i * page_size); - - /* write to the sector */ - if (i % 10 == 0) - printf("%04d at address: 0x%08x ", i, i * page_size); - - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); - - if (i % 10 == 0) - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - return 0; -} diff --git a/util/flashrom/sst49lfxxxc.c b/util/flashrom/sst49lfxxxc.c deleted file mode 100644 index 54897cc5ad..0000000000 --- a/util/flashrom/sst49lfxxxc.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * Copyright (C) 2005-2007 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <errno.h> -#include <fcntl.h> -#include <sys/mman.h> -#include <unistd.h> -#include <stdio.h> -#include <stdlib.h> -#include <stdint.h> -#include "flash.h" - -#define SECTOR_ERASE 0x30 -#define BLOCK_ERASE 0x20 -#define ERASE 0xD0 -#define AUTO_PGRM 0x10 -#define RESET 0xFF -#define READ_ID 0x90 -#define READ_STATUS 0x70 -#define CLEAR_STATUS 0x50 - -#define STATUS_BPS (1 << 1) -#define STATUS_ESS (1 << 6) -#define STATUS_WSMS (1 << 7) - -static __inline__ int write_lockbits_49lfxxxc(volatile uint8_t *bios, int size, - unsigned char bits) -{ - int i, left = size; - unsigned long address; - - //printf("bios=0x%08lx\n", (unsigned long)bios); - for (i = 0; left > 65536; i++, left -= 65536) { - //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFC00000 - size + (i * 65536) + 2, *(bios + (i * 65536) + 2) ); - chip_writeb(bits, bios + (i * 65536) + 2); - } - address = i * 65536; - //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - chip_writeb(bits, bios + address + 2); - address += 32768; - //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - chip_writeb(bits, bios + address + 2); - address += 8192; - //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - chip_writeb(bits, bios + address + 2); - address += 8192; - //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - chip_writeb(bits, bios + address + 2); - - return 0; -} - -static __inline__ int erase_sector_49lfxxxc(volatile uint8_t *bios, - unsigned long address) -{ - unsigned char status; - - chip_writeb(SECTOR_ERASE, bios); - chip_writeb(ERASE, bios + address); - - do { - status = chip_readb(bios); - if (status & (STATUS_ESS | STATUS_BPS)) { - printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status); - chip_writeb(CLEAR_STATUS, bios); - return (-1); - } - } while (!(status & STATUS_WSMS)); - - return 0; -} - -static __inline__ int write_sector_49lfxxxc(volatile uint8_t *bios, - uint8_t *src, - volatile uint8_t *dst, - unsigned int page_size) -{ - int i; - unsigned char status; - - chip_writeb(CLEAR_STATUS, bios); - for (i = 0; i < page_size; i++) { - /* transfer data from source to destination */ - if (*src == 0xFF) { - dst++, src++; - /* If the data is 0xFF, don't program it */ - continue; - } - /*issue AUTO PROGRAM command */ - chip_writeb(AUTO_PGRM, bios); - chip_writeb(*src++, dst++); - - do { - status = chip_readb(bios); - if (status & (STATUS_ESS | STATUS_BPS)) { - printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status); - chip_writeb(CLEAR_STATUS, bios); - return (-1); - } - } while (!(status & STATUS_WSMS)); - } - - return 0; -} - -int probe_49lfxxxc(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - - uint8_t id1, id2; - - chip_writeb(RESET, bios); - - chip_writeb(READ_ID, bios); - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - chip_writeb(RESET, bios); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - - if (!(id1 == flash->manufacture_id && id2 == flash->model_id)) - return 0; - - map_flash_registers(flash); - - return 1; -} - -int erase_49lfxxxc(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - volatile uint8_t *registers = flash->virtual_registers; - int i; - unsigned int total_size = flash->total_size * 1024; - - write_lockbits_49lfxxxc(registers, total_size, 0); - for (i = 0; i < total_size; i += flash->page_size) - if (erase_sector_49lfxxxc(bios, i) != 0) - return (-1); - - chip_writeb(RESET, bios); - - return 0; -} - -int write_49lfxxxc(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - write_lockbits_49lfxxxc(flash->virtual_registers, total_size, 0); - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - /* erase the page before programming */ - erase_sector_49lfxxxc(bios, i * page_size); - - /* write to the sector */ - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_49lfxxxc(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - - chip_writeb(RESET, bios); - - return 0; -} diff --git a/util/flashrom/sst_fwhub.c b/util/flashrom/sst_fwhub.c deleted file mode 100644 index ab541e41f8..0000000000 --- a/util/flashrom/sst_fwhub.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Adapted from the Intel FW hub stuff for 82802ax parts. */ - -#include <stdio.h> -#include "flash.h" - -// I need that Berkeley bit-map printer -void print_sst_fwhub_status(uint8_t status) -{ - printf("%s", status & 0x80 ? "Ready:" : "Busy:"); - printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:"); - printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:"); - printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:"); - printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:"); - printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:"); - printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:"); -} - -/* probe_jedec works fine for probing */ -int probe_sst_fwhub(struct flashchip *flash) -{ - if (probe_jedec(flash) == 0) - return 0; - - map_flash_registers(flash); - - return 1; -} - -int erase_sst_fwhub_block(struct flashchip *flash, int offset) -{ - volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2; - - // clear write protect - chip_writeb(0, wrprotect); - - erase_block_jedec(flash->virtual_memory, offset); - toggle_ready_jedec(flash->virtual_memory); - - return 0; -} - -int erase_sst_fwhub(struct flashchip *flash) -{ - int i; - unsigned int total_size = flash->total_size * 1024; - volatile uint8_t *bios = flash->virtual_memory; - - for (i = 0; i < total_size; i += flash->page_size) - erase_sst_fwhub_block(flash, i); - - // dumb check if erase was successful. - for (i = 0; i < total_size; i++) { - if (bios[i] != 0xff) { - printf("ERASE FAILED!\n"); - return -1; - } - } - - return 0; -} - -int write_sst_fwhub(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - // FIXME: We want block wide erase instead of ironing the whole chip - if (erase_sst_fwhub(flash)) - return -1; - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - - return 0; -} diff --git a/util/flashrom/stm50flw0x0x.c b/util/flashrom/stm50flw0x0x.c deleted file mode 100644 index a40da76885..0000000000 --- a/util/flashrom/stm50flw0x0x.c +++ /dev/null @@ -1,291 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2008 Claus Gindhart <claus.gindhart@kontron.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * This module is designed for supporting the devices - * ST M50FLW040A (not yet tested) - * ST M50FLW040B (not yet tested) - * ST M50FLW080A - * ST M50FLW080B (not yet tested) - */ - -#include <stdio.h> -#include <string.h> -#include <stdint.h> -#include "flash.h" - -void protect_stm50flw0x0x(volatile uint8_t *bios) -{ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); - - usleep(200); -} - -int probe_stm50flw0x0x(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - uint32_t largeid1, largeid2; - - /* Issue JEDEC Product ID Entry command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x90, bios + 0x5555); - myusec_delay(40); - - /* Read product ID */ - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - largeid1 = id1; - largeid2 = id2; - - /* Check if it is a continuation ID, this should be a while loop. */ - if (id1 == 0x7F) { - largeid1 <<= 8; - id1 = chip_readb(bios + 0x100); - largeid1 |= id1; - } - if (id2 == 0x7F) { - largeid2 <<= 8; - id2 = chip_readb(bios + 0x101); - largeid2 |= id2; - } - - /* Issue JEDEC Product ID Exit command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, - largeid2); - - if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id) - return 0; - - map_flash_registers(flash); - - return 1; -} - -static void wait_stm50flw0x0x(volatile uint8_t *bios) -{ - uint8_t id1; - // id2; - - chip_writeb(0x70, bios); - if ((chip_readb(bios) & 0x80) == 0) { // it's busy - while ((chip_readb(bios) & 0x80) == 0) ; - } - // put another command to get out of status register mode - - chip_writeb(0x90, bios); - myusec_delay(10); - - id1 = chip_readb(bios); - - // this is needed to jam it out of "read id" mode - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); -} - -/* - * claus.gindhart@kontron.com - * The ST M50FLW080B and STM50FLW080B chips have to be unlocked, - * before you can erase them or write to them. - */ -int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset) -{ - volatile uint8_t *flash_addr = flash->virtual_registers + 2; - const uint8_t unlock_sector = 0x00; - int j; - - /* - * These chips have to be unlocked before you can erase them or write - * to them. The size of the locking sectors depends on the type - * of chip. - * - * Sometimes, the BIOS does this for you; so you propably - * don't need to worry about that. - */ - - /* Check, if it's is a top/bottom-block with 4k-sectors. */ - /* TODO: What about the other types? */ - if ((offset == 0) || - (offset == (flash->model_id == ST_M50FLW080A ? 0xE0000 : 0x10000)) - || (offset == 0xF0000)) { - - // unlock each 4k-sector - for (j = 0; j < 0x10000; j += 0x1000) { - printf_debug("unlocking at 0x%x\n", offset + j); - chip_writeb(unlock_sector, flash_addr + offset + j); - if (chip_readb(flash_addr + offset + j) != unlock_sector) { - printf("Cannot unlock sector @ 0x%x\n", - offset + j); - return -1; - } - } - } else { - printf_debug("unlocking at 0x%x\n", offset); - chip_writeb(unlock_sector, flash_addr + offset); - if (chip_readb(flash_addr + offset) != unlock_sector) { - printf("Cannot unlock sector @ 0x%x\n", offset); - return -1; - } - } - - return 0; -} - -int erase_block_stm50flw0x0x(struct flashchip *flash, int offset) -{ - volatile uint8_t *bios = flash->virtual_memory + offset; - int j; - - // clear status register - chip_writeb(0x50, bios); - printf_debug("Erase at %p\n", bios); - // now start it - chip_writeb(0x20, bios); - chip_writeb(0xd0, bios); - myusec_delay(10); - - wait_stm50flw0x0x(flash->virtual_memory); - - for (j = 0; j < flash->page_size; j++) { - if (chip_readb(bios + j) != 0xFF) { - printf("Erase failed at 0x%x\n", offset + j); - return -1; - } - } - - printf("DONE BLOCK 0x%x\n", offset); - - return 0; -} - -int write_page_stm50flw0x0x(volatile uint8_t *bios, uint8_t *src, - volatile uint8_t *dst, int page_size) -{ - int i, rc = 0; - volatile uint8_t *d = dst; - uint8_t *s = src; - - /* transfer data from source to destination */ - for (i = 0; i < page_size; i++) { - chip_writeb(0x40, dst); - chip_writeb(*src++, dst++); - wait_stm50flw0x0x(bios); - } - -/* claus.gindhart@kontron.com - * TODO - * I think, that verification is not required, but - * i leave it in anyway - */ - dst = d; - src = s; - for (i = 0; i < page_size; i++) { - if (chip_readb(dst) != *src) { - rc = -1; - break; - } - dst++; - src++; - } - - if (rc) { - fprintf(stderr, " page %d failed!\n", - (unsigned int)(d - bios) / page_size); - } - - return rc; -} - -/* I simply erase block by block - * I Chip This is not the fastest way, but it works - */ -int erase_stm50flw0x0x(struct flashchip *flash) -{ - int i, rc = 0; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - printf("Erasing page:\n"); - for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { - printf - ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - printf("%04d at address: 0x%08x ", i, i * page_size); - rc = unlock_block_stm50flw0x0x(flash, i * page_size); - if (!rc) - rc = erase_block_stm50flw0x0x(flash, i * page_size); - } - printf("\n"); - protect_stm50flw0x0x(bios); - - return rc; -} - -int write_stm50flw0x0x(struct flashchip *flash, uint8_t * buf) -{ - int i, rc = 0; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - printf("Programming page: \n"); - for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { - printf - ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - printf("%04d at address: 0x%08x ", i, i * page_size); - - /* Auto Skip Blocks, which already contain the desired data - * Faster, because we only write, what has changed - * More secure, because blocks, which are excluded - * (with the exclude or layout feature) - * are not erased and rewritten; data is retained also - * in sudden power off situations - */ - if (!memcmp((void *)(buf + i * page_size), - (void *)(bios + i * page_size), page_size)) { - printf("SKIPPED\n"); - continue; - } - - rc = unlock_block_stm50flw0x0x(flash, i * page_size); - if (!rc) - rc = erase_block_stm50flw0x0x(flash, i * page_size); - if (!rc) - write_page_stm50flw0x0x(bios, buf + i * page_size, - bios + i * page_size, page_size); - } - printf("\n"); - protect_stm50flw0x0x(bios); - - return rc; -} diff --git a/util/flashrom/udelay.c b/util/flashrom/udelay.c deleted file mode 100644 index 516e20813c..0000000000 --- a/util/flashrom/udelay.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <sys/time.h> -#include <stdio.h> -#include "flash.h" - -// count to a billion. Time it. If it's < 1 sec, count to 10B, etc. -unsigned long micro = 1; - -void myusec_delay(int time) -{ - volatile unsigned long i; - for (i = 0; i < time * micro; i++) ; -} - -void myusec_calibrate_delay(void) -{ - int count = 1000; - unsigned long timeusec; - struct timeval start, end; - int ok = 0; - - printf("Calibrating delay loop... "); - - while (!ok) { - gettimeofday(&start, 0); - myusec_delay(count); - gettimeofday(&end, 0); - timeusec = 1000000 * (end.tv_sec - start.tv_sec) + - (end.tv_usec - start.tv_usec); - count *= 2; - if (timeusec < 1000000 / 4) - continue; - ok = 1; - } - - // compute one microsecond. That will be count / time - micro = count / timeusec; - - gettimeofday(&start, 0); - myusec_delay(100); - gettimeofday(&end, 0); - timeusec = 1000000 * (end.tv_sec - start.tv_sec) + - (end.tv_usec - start.tv_usec); - printf_debug("%ldM loops per second, 100 myus = %ld us. ", - (unsigned long)micro, timeusec); - printf("OK.\n"); -} diff --git a/util/flashrom/w29ee011.c b/util/flashrom/w29ee011.c deleted file mode 100644 index 37b908256c..0000000000 --- a/util/flashrom/w29ee011.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2007 Markus Boas <ryven@ryven.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <string.h> -#include "flash.h" - -int probe_w29ee011(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2; - extern char *chip_to_probe; - - if (!chip_to_probe || strcmp(chip_to_probe, "W29EE011")) { - printf_debug("\n===\n"); - printf_debug(" Probing disabled for Winbond W29EE011 because the probing sequence puts the\n"); - printf_debug(" AMIC A49LF040A in a funky state.\n"); - printf_debug(" Use 'flashrom -c W29EE011' if you have a board with this chip."); - printf_debug("\n===\n"); - return 0; - } - - /* Issue JEDEC Product ID Entry command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x60, bios + 0x5555); - myusec_delay(10); - - /* Read product ID */ - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - /* Issue JEDEC Product ID Exit command */ - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); - - if (id1 == flash->manufacture_id && id2 == flash->model_id) - return 1; - - return 0; -} diff --git a/util/flashrom/w39v040c.c b/util/flashrom/w39v040c.c deleted file mode 100644 index f631d33f93..0000000000 --- a/util/flashrom/w39v040c.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2008 Peter Stuge <peter@stuge.se> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include "flash.h" - -int probe_w39v040c(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t id1, id2, lock; - - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); - - id1 = chip_readb(bios); - id2 = chip_readb(bios + 1); - lock = chip_readb(bios + 0xfff2); - - chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); - chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); - - printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); - if (!oddparity(id1)) - printf_debug(", id1 parity violation"); - printf_debug("\n"); - if (flash->manufacture_id == id1 && flash->model_id == id2) { - printf("%s: Boot block #TBL is %slocked, rest of chip #WP is %slocked.\n", - __func__, lock & 0x4 ? "" : "un", lock & 0x8 ? "" : "un"); - return 1; - } - - return 0; -} - -int erase_w39v040c(struct flashchip *flash) -{ - int i; - unsigned int total_size = flash->total_size * 1024; - volatile uint8_t *bios = flash->virtual_memory; - - for (i = 0; i < total_size; i += flash->page_size) - erase_sector_jedec(flash->virtual_memory, i); - - for (i = 0; i < total_size; i++) - if (0xff != bios[i]) { - printf("ERASE FAILED at 0x%08x! Expected=0xff, Read=0x%02x\n", i, bios[i]); - return -1; - } - - return 0; -} - -int write_w39v040c(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - if (flash->erase(flash)) - return -1; - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - printf("%04d at address: 0x%08x", i, i * page_size); - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - printf("\n"); - - return 0; -} diff --git a/util/flashrom/w39v080fa.c b/util/flashrom/w39v080fa.c deleted file mode 100644 index ba32add9f9..0000000000 --- a/util/flashrom/w39v080fa.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2008 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include "flash.h" - -int probe_winbond_fwhub(struct flashchip *flash) -{ - volatile uint8_t *bios = flash->virtual_memory; - uint8_t vid, did; - - /* Product Identification Entry */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); - - /* Read product ID */ - vid = chip_readb(bios); - did = chip_readb(bios + 0x01); - - /* Product Identifixation Exit */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); - - printf_debug("%s: vid 0x%x, did 0x%x\n", __FUNCTION__, vid, did); - - if (vid != flash->manufacture_id || did != flash->model_id) - return 0; - - map_flash_registers(flash); - - return 1; -} - -static int unlock_block_winbond_fwhub(struct flashchip *flash, int offset) -{ - volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2; - uint8_t locking; - - printf_debug("Trying to unlock block @0x%08x = 0x%02x\n", offset, - chip_readb(wrprotect)); - - locking = chip_readb(wrprotect); - switch (locking & 0x7) { - case 0: - printf_debug("Full Access.\n"); - return 0; - case 1: - printf_debug("Write Lock (Default State).\n"); - chip_writeb(0, wrprotect); - return 0; - case 2: - printf_debug("Locked Open (Full Access, Lock Down).\n"); - return 0; - case 3: - fprintf(stderr, "Error: Write Lock, Locked Down.\n"); - return -1; - case 4: - printf_debug("Read Lock.\n"); - chip_writeb(0, wrprotect); - return 0; - case 5: - printf_debug("Read/Write Lock.\n"); - chip_writeb(0, wrprotect); - return 0; - case 6: - fprintf(stderr, "Error: Read Lock, Locked Down.\n"); - return -1; - case 7: - fprintf(stderr, "Error: Read/Write Lock, Locked Down.\n"); - return -1; - } - - /* We will never reach this point, but GCC doesn't know */ - return -1; -} - -int unlock_winbond_fwhub(struct flashchip *flash) -{ - int i, total_size = flash->total_size * 1024; - volatile uint8_t *bios = flash->virtual_memory; - uint8_t locking; - - /* Are there any hardware restrictions that we can't overcome? - * If flashrom fail here, someone's got to check all those GPIOs. - */ - - /* Product Identification Entry */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); - - /* Read Hardware Lock Bits */ - locking = chip_readb(bios + 0xffff2); - - /* Product Identification Exit */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); - - printf_debug("Lockout bits:\n"); - - if (locking & (1 << 2)) - fprintf(stderr, "Error: hardware bootblock locking (#TBL).\n"); - else - printf_debug("No hardware bootblock locking (good!)\n"); - - if (locking & (1 << 3)) - fprintf(stderr, "Error: hardware block locking (#WP).\n"); - else - printf_debug("No hardware block locking (good!)\n"); - - if (locking & ((1 << 2) | (1 << 3))) - return -1; - - /* Unlock the complete chip */ - for (i = 0; i < total_size; i += flash->page_size) - if (unlock_block_winbond_fwhub(flash, i)) - return -1; - - return 0; -} - -static int erase_sector_winbond_fwhub(volatile uint8_t *bios, - unsigned int sector) -{ - /* Remember: too much sleep can waste your day. */ - - printf("0x%08x\b\b\b\b\b\b\b\b\b\b", sector); - - /* Sector Erase */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x80, bios + 0x5555); - - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x30, bios + sector); - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); - - return 0; -} - -int erase_winbond_fwhub(struct flashchip *flash) -{ - int i, total_size = flash->total_size * 1024; - volatile uint8_t *bios = flash->virtual_memory; - - unlock_winbond_fwhub(flash); - - printf("Erasing: "); - - for (i = 0; i < total_size; i += flash->page_size) - erase_sector_winbond_fwhub(bios, i); - - printf("\n"); - - for (i = 0; i < total_size; i++) { - if (bios[i] != 0xff) { - fprintf(stderr, "Error: Flash chip erase failed at 0x%08x(0x%02x)\n", i, bios[i]); - return -1; - } - } - - return 0; -} - -int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - volatile uint8_t *bios = flash->virtual_memory; - - if (erase_winbond_fwhub(flash)) - return -1; - - printf("Programming: "); - for (i = 0; i < total_size; i += flash->page_size) { - printf("0x%08x\b\b\b\b\b\b\b\b\b\b", i); - write_sector_jedec(bios, buf + i, bios + i, flash->page_size); - } - printf("\n"); - - return 0; -} diff --git a/util/flashrom/w49f002u.c b/util/flashrom/w49f002u.c deleted file mode 100644 index b7fca6b73a..0000000000 --- a/util/flashrom/w49f002u.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include "flash.h" - -int write_49f002(struct flashchip *flash, uint8_t *buf) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - volatile uint8_t *bios = flash->virtual_memory; - - erase_chip_jedec(flash); - - printf("Programming page: "); - for (i = 0; i < total_size / page_size; i++) { - /* write to the sector */ - printf("%04d at address: 0x%08x ", i, i * page_size); - write_sector_jedec(bios, buf + i * page_size, - bios + i * page_size, page_size); - printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - fflush(stdout); - } - printf("\n"); - - return 0; -} diff --git a/util/flashrom/wbsio_spi.c b/util/flashrom/wbsio_spi.c deleted file mode 100644 index a3e96fd184..0000000000 --- a/util/flashrom/wbsio_spi.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2008 Peter Stuge <peter@stuge.se> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdio.h> -#include <pci/pci.h> -#include <stdint.h> -#include <string.h> -#include "flash.h" -#include "spi.h" - -#define WBSIO_PORT1 0x2e -#define WBSIO_PORT2 0x4e - -static uint16_t wbsio_spibase = 0; - -static uint16_t wbsio_get_spibase(uint16_t port) -{ - uint8_t id; - uint16_t flashport = 0; - - w836xx_ext_enter(port); - id = wbsio_read(port, 0x20); - if (id != 0xa0) { - fprintf(stderr, "\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id); - goto done; - } - - if (0 == (wbsio_read(port, 0x24) & 2)) { - fprintf(stderr, "\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port); - goto done; - } - - wbsio_write(port, 0x07, 0x06); - if (0 == (wbsio_read(port, 0x30) & 1)) { - fprintf(stderr, "\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port); - goto done; - } - - flashport = (wbsio_read(port, 0x62) << 8) | wbsio_read(port, 0x63); - -done: - w836xx_ext_leave(port); - return flashport; -} - -int wbsio_check_for_spi(const char *name) -{ - if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT1))) - if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT2))) - return 1; - - printf_debug("\nwbsio_spibase = 0x%x\n", wbsio_spibase); - flashbus = BUS_TYPE_WBSIO_SPI; - return 0; -} - -/* W83627DHG has 11 command modes: - * 1=1 command only - * 2=1 command+1 data write - * 3=1 command+2 data read - * 4=1 command+3 address - * 5=1 command+3 address+1 data write - * 6=1 command+3 address+4 data write - * 7=1 command+3 address+1 dummy address inserted by wbsio+4 data read - * 8=1 command+3 address+1 data read - * 9=1 command+3 address+2 data read - * a=1 command+3 address+3 data read - * b=1 command+3 address+4 data read - * - * mode[7:4] holds the command mode - * mode[3:0] holds SPI address bits [19:16] - * - * The Winbond SPI master only supports 20 bit addresses on the SPI bus. :\ - * Would one more byte of RAM in the chip (to get all 24 bits) really make - * such a big difference? - */ -int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) -{ - int i; - uint8_t mode = 0; - - printf_debug("%s:", __func__); - - if (1 == writecnt && 0 == readcnt) { - mode = 0x10; - } else if (2 == writecnt && 0 == readcnt) { - OUTB(writearr[1], wbsio_spibase + 4); - printf_debug(" data=0x%02x", writearr[1]); - mode = 0x20; - } else if (1 == writecnt && 2 == readcnt) { - mode = 0x30; - } else if (4 == writecnt && 0 == readcnt) { - printf_debug(" addr=0x%02x", (writearr[1] & 0x0f)); - for (i = 2; i < writecnt; i++) { - OUTB(writearr[i], wbsio_spibase + i); - printf_debug("%02x", writearr[i]); - } - mode = 0x40 | (writearr[1] & 0x0f); - } else if (5 == writecnt && 0 == readcnt) { - printf_debug(" addr=0x%02x", (writearr[1] & 0x0f)); - for (i = 2; i < 4; i++) { - OUTB(writearr[i], wbsio_spibase + i); - printf_debug("%02x", writearr[i]); - } - OUTB(writearr[i], wbsio_spibase + i); - printf_debug(" data=0x%02x", writearr[i]); - mode = 0x50 | (writearr[1] & 0x0f); - } else if (8 == writecnt && 0 == readcnt) { - printf_debug(" addr=0x%02x", (writearr[1] & 0x0f)); - for (i = 2; i < 4; i++) { - OUTB(writearr[i], wbsio_spibase + i); - printf_debug("%02x", writearr[i]); - } - printf_debug(" data=0x"); - for (; i < writecnt; i++) { - OUTB(writearr[i], wbsio_spibase + i); - printf_debug("%02x", writearr[i]); - } - mode = 0x60 | (writearr[1] & 0x0f); - } else if (5 == writecnt && 4 == readcnt) { - /* XXX: TODO not supported by flashrom infrastructure! - * This mode, 7, discards the fifth byte in writecnt, - * but since we can not express that in flashrom, fail - * the operation for now. - */ - ; - } else if (4 == writecnt && readcnt >= 1 && readcnt <= 4) { - printf_debug(" addr=0x%02x", (writearr[1] & 0x0f)); - for (i = 2; i < writecnt; i++) { - OUTB(writearr[i], wbsio_spibase + i); - printf_debug("%02x", writearr[i]); - } - mode = ((7 + readcnt) << 4) | (writearr[1] & 0x0f); - } - printf_debug(" cmd=%02x mode=%02x\n", writearr[0], mode); - - if (!mode) { - fprintf(stderr, "%s: unsupported command type wr=%d rd=%d\n", - __func__, writecnt, readcnt); - return 1; - } - - OUTB(writearr[0], wbsio_spibase); - OUTB(mode, wbsio_spibase + 1); - myusec_delay(10); - - if (!readcnt) - return 0; - - printf_debug("%s: returning data =", __func__); - for (i = 0; i < readcnt; i++) { - readarr[i] = INB(wbsio_spibase + 4 + i); - printf_debug(" 0x%02x", readarr[i]); - } - printf_debug("\n"); - return 0; -} - -int wbsio_spi_read(struct flashchip *flash, uint8_t *buf) -{ - int size = flash->total_size * 1024; - - if (flash->total_size > 1024) { - fprintf(stderr, "%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__); - return 1; - } - - memcpy(buf, (const char *)flash->virtual_memory, size); - return 0; -} - -int wbsio_spi_write(struct flashchip *flash, uint8_t *buf) -{ - int pos, size = flash->total_size * 1024; - - if (flash->total_size > 1024) { - fprintf(stderr, "%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__); - return 1; - } - - flash->erase(flash); - spi_write_enable(); - for (pos = 0; pos < size; pos++) { - spi_byte_program(pos, buf[pos]); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); - } - spi_write_disable(); - return 0; -} |