diff options
Diffstat (limited to 'tests/lib/dimm_info_util-test.c')
-rw-r--r-- | tests/lib/dimm_info_util-test.c | 102 |
1 files changed, 86 insertions, 16 deletions
diff --git a/tests/lib/dimm_info_util-test.c b/tests/lib/dimm_info_util-test.c index 25800d988f..cfe7176006 100644 --- a/tests/lib/dimm_info_util-test.c +++ b/tests/lib/dimm_info_util-test.c @@ -4,6 +4,8 @@ #include <spd.h> #include <tests/test.h> +#define MAX_ALLOWED_MODULE_TYPE 3 + static void test_smbios_bus_width_to_spd_width_parametrized(smbios_memory_type ddr_type) { /* Non-ECC variants */ @@ -86,22 +88,8 @@ static void test_smbios_memory_size_to_mib(void **state) assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 694735)); } -static void test_smbios_form_factor_to_spd_mod_type(void **state) +static void test_smbios_form_factor_to_spd_mod_type_ddr(smbios_memory_type memory_type) { - /* Form factors defined in coreboot */ - const LargestIntegralType udimm_allowed[] = { - SPD_UDIMM, SPD_MICRO_DIMM, SPD_MINI_UDIMM, - }; - assert_in_set(smbios_form_factor_to_spd_mod_type(MEMORY_FORMFACTOR_DIMM), - udimm_allowed, ARRAY_SIZE(udimm_allowed)); - - const LargestIntegralType rdimm_allowed[] = { SPD_RDIMM, SPD_MINI_RDIMM }; - assert_in_set(smbios_form_factor_to_spd_mod_type(MEMORY_FORMFACTOR_RIMM), - rdimm_allowed, ARRAY_SIZE(rdimm_allowed)); - - assert_int_equal(SPD_SODIMM, - smbios_form_factor_to_spd_mod_type(MEMORY_FORMFACTOR_SODIMM)); - const smbios_memory_form_factor undefined_factors[] = { MEMORY_FORMFACTOR_OTHER, MEMORY_FORMFACTOR_UNKNOWN, @@ -119,10 +107,92 @@ static void test_smbios_form_factor_to_spd_mod_type(void **state) }; for (int i = 0; i < ARRAY_SIZE(undefined_factors); ++i) { assert_int_equal(SPD_UNDEFINED, - smbios_form_factor_to_spd_mod_type(undefined_factors[i])); + smbios_form_factor_to_spd_mod_type(memory_type, + undefined_factors[i])); } } +static void test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized( + smbios_memory_type memory_type, + const LargestIntegralType udimm_allowed[], + const LargestIntegralType rdimm_allowed[], + LargestIntegralType expected_module_type) +{ + print_message("%s(%d)\n", __func__, memory_type); + + assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_DIMM), + udimm_allowed, MAX_ALLOWED_MODULE_TYPE); + + assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_RIMM), + rdimm_allowed, MAX_ALLOWED_MODULE_TYPE); + + assert_int_equal(expected_module_type, smbios_form_factor_to_spd_mod_type(memory_type, + MEMORY_FORMFACTOR_SODIMM)); + + test_smbios_form_factor_to_spd_mod_type_ddr(memory_type); +} + +static void test_smbios_form_factor_to_spd_mod_type_lpddrx(smbios_memory_type memory_type) +{ + print_message("%s(%d)\n", __func__, memory_type); + /* Form factors defined in coreboot */ + assert_int_equal(LPX_SPD_NONDIMM, smbios_form_factor_to_spd_mod_type(memory_type, + MEMORY_FORMFACTOR_ROC)); +} + +static void test_smbios_form_factor_to_spd_mod_type(void **state) +{ + const struct smbios_form_factor_test_info_ddrx { + smbios_memory_type memory_type; + const LargestIntegralType udimm_allowed[MAX_ALLOWED_MODULE_TYPE]; + const LargestIntegralType rdimm_allowed[MAX_ALLOWED_MODULE_TYPE]; + LargestIntegralType expected_module_type; + } ddrx_info[] = { + { + .memory_type = MEMORY_TYPE_DDR2, + .udimm_allowed = { DDR2_SPD_UDIMM, DDR2_SPD_MICRO_DIMM, + DDR2_SPD_MINI_UDIMM }, + .rdimm_allowed = { DDR2_SPD_RDIMM, DDR2_SPD_MINI_RDIMM }, + .expected_module_type = DDR2_SPD_SODIMM, + }, + { + .memory_type = MEMORY_TYPE_DDR3, + .udimm_allowed = { DDR3_SPD_UDIMM, DDR3_SPD_MICRO_DIMM, + DDR3_SPD_MINI_UDIMM }, + .rdimm_allowed = { DDR3_SPD_RDIMM, DDR3_SPD_MINI_RDIMM }, + .expected_module_type = DDR3_SPD_SODIMM, + }, + { + .memory_type = MEMORY_TYPE_DDR4, + .udimm_allowed = { DDR4_SPD_UDIMM, DDR4_SPD_MINI_UDIMM }, + .rdimm_allowed = { DDR4_SPD_RDIMM, DDR4_SPD_MINI_RDIMM }, + .expected_module_type = DDR4_SPD_SODIMM, + }, + { + .memory_type = MEMORY_TYPE_DDR5, + .udimm_allowed = { DDR5_SPD_UDIMM, DDR5_SPD_MINI_UDIMM }, + .rdimm_allowed = { DDR5_SPD_RDIMM, DDR5_SPD_MINI_RDIMM }, + .expected_module_type = DDR5_SPD_SODIMM + }, + }; + + /* Test for DDRx DIMM Modules */ + for (int i = 0; i < ARRAY_SIZE(ddrx_info); i++) + test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized( + ddrx_info[i].memory_type, ddrx_info[i].udimm_allowed, + ddrx_info[i].rdimm_allowed, ddrx_info[i].expected_module_type); + + smbios_memory_type lpddrx_memory_type[] = { + MEMORY_TYPE_LPDDR3, + MEMORY_TYPE_LPDDR4, + MEMORY_TYPE_LPDDR5, + }; + + /* Test for Lpddrx DIMM Modules */ + for (int i = 0; i < ARRAY_SIZE(lpddrx_memory_type); i++) + test_smbios_form_factor_to_spd_mod_type_lpddrx(lpddrx_memory_type[i]); +} + int main(void) { const struct CMUnitTest tests[] = { |