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-rw-r--r--targets/via/epia-m/Config-abuild.lb25
-rw-r--r--targets/via/epia-m/Config.512kflash.lb55
-rw-r--r--targets/via/epia-m/Config.etherboot.lb54
-rw-r--r--targets/via/epia-m/Config.filo.lb56
-rw-r--r--targets/via/epia-m/Config.lb48
-rw-r--r--targets/via/epia-m/Config.vga.filo50
6 files changed, 0 insertions, 288 deletions
diff --git a/targets/via/epia-m/Config-abuild.lb b/targets/via/epia-m/Config-abuild.lb
deleted file mode 100644
index 0f6d5da2be..0000000000
--- a/targets/via/epia-m/Config-abuild.lb
+++ /dev/null
@@ -1,25 +0,0 @@
-target VENDOR_MAINBOARD
-mainboard VENDOR/MAINBOARD
-
-option CC="CROSSCC"
-option CONFIG_CROSS_COMPILE="CROSS_PREFIX"
-option HOSTCC="CROSS_HOSTCC"
-
-__COMPRESSION__
-__LOGLEVEL__
-
-option CONFIG_ROM_SIZE=256*1024
-
-romimage "normal"
- option CONFIG_USE_FALLBACK_IMAGE=0
- option COREBOOT_EXTRA_VERSION=".0-Normal"
- payload __PAYLOAD__
-end
-
-romimage "fallback"
- option CONFIG_USE_FALLBACK_IMAGE=1
- option COREBOOT_EXTRA_VERSION=".0-Fallback"
- payload __PAYLOAD__
-end
-
-buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
diff --git a/targets/via/epia-m/Config.512kflash.lb b/targets/via/epia-m/Config.512kflash.lb
deleted file mode 100644
index 0cf7e1c593..0000000000
--- a/targets/via/epia-m/Config.512kflash.lb
+++ /dev/null
@@ -1,55 +0,0 @@
-# Sample config file for EPIA-M
-# This will make a target directory of ./epia-m.512kflash
-
-target epia-m.512kflash
-
-mainboard via/epia-m
-
-option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
-option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
-option CONFIG_CONSOLE_SERIAL8250=1
-
-option CONFIG_ROM_SIZE=512*1024
-
-
-option CONFIG_HAVE_OPTION_TABLE=1
-option CONFIG_ROM_PAYLOAD=1
-option CONFIG_HAVE_FALLBACK_BOOT=1
-
-###
-### Compute the location and size of where this firmware image
-### (coreboot plus bootloader) will live in the boot rom chip.
-###
-option CONFIG_FALLBACK_SIZE=131072
-
-## Coreboot C code runs at this location in RAM
-option CONFIG_RAMBASE=0x00004000
-
-#
-###
-### Compute the start location and size size of
-### The coreboot bootloader.
-###
-
-#
-# Via EPIA M
-#
-romimage "normal"
- option CONFIG_USE_FALLBACK_IMAGE=0
- option CONFIG_ROM_IMAGE_SIZE=0x10000
- option COREBOOT_EXTRA_VERSION=".0Normal"
-# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
-# payload ../../../../tg3--ide_disk.zelf
- payload ../../../../../lnxieepro100.ebi
-end
-
-romimage "fallback"
- option CONFIG_USE_FALLBACK_IMAGE=1
- option CONFIG_ROM_IMAGE_SIZE=0x10000
- option COREBOOT_EXTRA_VERSION=".0Fallback"
-# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
-# payload ../../../../tg3--ide_disk.zelf
- payload ../../../../../lnxieepro100.ebi
-end
-
-buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
diff --git a/targets/via/epia-m/Config.etherboot.lb b/targets/via/epia-m/Config.etherboot.lb
deleted file mode 100644
index 0ceaf171ec..0000000000
--- a/targets/via/epia-m/Config.etherboot.lb
+++ /dev/null
@@ -1,54 +0,0 @@
-# Sample config file for EPIA-M
-# This will make a target directory of ./epia-m
-
-target epia-m
-
-mainboard via/epia-m
-
-option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
-option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
-option CONFIG_CONSOLE_SERIAL8250=1
-
-option CONFIG_ROM_SIZE=256*1024
-
-option CONFIG_HAVE_OPTION_TABLE=1
-option CONFIG_ROM_PAYLOAD=1
-option CONFIG_HAVE_FALLBACK_BOOT=1
-
-###
-### Compute the location and size of where this firmware image
-### (coreboot plus bootloader) will live in the boot rom chip.
-###
-option CONFIG_FALLBACK_SIZE=131072
-
-## Coreboot C code runs at this location in RAM
-option CONFIG_RAMBASE=0x00004000
-
-#
-###
-### Compute the start location and size size of
-### The coreboot bootloader.
-###
-
-#
-# Via EPIA-M
-#
-romimage "normal"
- option CONFIG_USE_FALLBACK_IMAGE=0
- option CONFIG_ROM_IMAGE_SIZE=0x10000
- option COREBOOT_EXTRA_VERSION=".0Normal"
-# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
-# payload ../../../../tg3--ide_disk.zelf
- payload ../../../../../lnxieepro100.ebi
-end
-
-romimage "fallback"
- option CONFIG_USE_FALLBACK_IMAGE=1
- option CONFIG_ROM_IMAGE_SIZE=0x10000
- option COREBOOT_EXTRA_VERSION=".0Fallback"
-# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
-# payload ../../../../tg3--ide_disk.zelf
- payload ../../../../../lnxieepro100.ebi
-end
-
-buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
diff --git a/targets/via/epia-m/Config.filo.lb b/targets/via/epia-m/Config.filo.lb
deleted file mode 100644
index 02313ff15a..0000000000
--- a/targets/via/epia-m/Config.filo.lb
+++ /dev/null
@@ -1,56 +0,0 @@
-# Sample config file for EPIA-M
-# This will make a target directory of ./epia-m
-
-target epia-m
-
-mainboard via/epia-m
-
-option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
-option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
-option CONFIG_CONSOLE_SERIAL8250=1
-
-option CONFIG_ROM_SIZE=256*1024
-
-option CONFIG_HAVE_OPTION_TABLE=1
-option CONFIG_ROM_PAYLOAD=1
-option CONFIG_HAVE_FALLBACK_BOOT=1
-
-###
-### Compute the location and size of where this firmware image
-### (coreboot plus bootloader) will live in the boot rom chip.
-###
-option CONFIG_FALLBACK_SIZE=131072
-
-## Coreboot C code runs at this location in RAM
-option CONFIG_RAMBASE=0x00004000
-
-#
-###
-### Compute the start location and size size of
-### The coreboot bootloader.
-###
-
-#
-# EPIA-M
-#
-romimage "normal"
- option CONFIG_USE_FALLBACK_IMAGE=0
- option CONFIG_ROM_IMAGE_SIZE=0x10000
- option COREBOOT_EXTRA_VERSION=".0Normal"
-# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
-# payload ../../../../tg3--ide_disk.zelf
-# payload ../../../../../lnxieepro100.ebi
- payload ../../../../../../filo.elf
-end
-
-romimage "fallback"
- option CONFIG_USE_FALLBACK_IMAGE=1
- option CONFIG_ROM_IMAGE_SIZE=0x10000
- option COREBOOT_EXTRA_VERSION=".0Fallback"
-# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
-# payload ../../../../tg3--ide_disk.zelf
-# payload ../../../../../lnxieepro100.ebi
- payload ../../../../../../filo.elf
-end
-
-buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
diff --git a/targets/via/epia-m/Config.lb b/targets/via/epia-m/Config.lb
deleted file mode 100644
index 2f9d6e1d3d..0000000000
--- a/targets/via/epia-m/Config.lb
+++ /dev/null
@@ -1,48 +0,0 @@
-# abuild config file for EPIA-M
-
-target via_epia-m
-mainboard via/epia-m
-
-option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
-option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
-option CONFIG_CONSOLE_SERIAL8250=1
-
-option CONFIG_ROM_SIZE=256*1024
-
-
-option CONFIG_HAVE_OPTION_TABLE=1
-option CONFIG_ROM_PAYLOAD=1
-option CONFIG_HAVE_FALLBACK_BOOT=1
-#option CONFIG_COMPRESSED_PAYLOAD_NRV2B=1
-option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
-
-
-###
-### Compute the location and size of where this firmware image
-### (coreboot plus bootloader) will live in the boot rom chip.
-###
-option CONFIG_FALLBACK_SIZE=131072
-
-## Coreboot C code runs at this location in RAM
-option CONFIG_RAMBASE=0x00004000
-
-#
-# Via EPIA M
-#
-romimage "normal"
- option CONFIG_USE_FALLBACK_IMAGE=0
-#option CONFIG_ROM_IMAGE_SIZE=128*1024
- option CONFIG_ROM_IMAGE_SIZE=64*1024
- option COREBOOT_EXTRA_VERSION=".0-Normal"
- payload $(HOME)/svn/payload.elf
-end
-
-romimage "fallback"
- option CONFIG_USE_FALLBACK_IMAGE=1
- #option CONFIG_ROM_IMAGE_SIZE=128*1024
- option CONFIG_ROM_IMAGE_SIZE=60*1024
- option COREBOOT_EXTRA_VERSION=".0-Fallback"
- payload $(HOME)/svn/payload.elf
-end
-
-buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
diff --git a/targets/via/epia-m/Config.vga.filo b/targets/via/epia-m/Config.vga.filo
deleted file mode 100644
index 86b4fb29b9..0000000000
--- a/targets/via/epia-m/Config.vga.filo
+++ /dev/null
@@ -1,50 +0,0 @@
-# Sample config file for EPIA-M
-# This will make a target directory of ./epia-m
-
-target epia-m
-
-mainboard via/epia-m
-
-option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
-option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
-option CONFIG_CONSOLE_SERIAL8250=1
-
-option CONFIG_ROM_SIZE=256*1024
-option CONFIG_HAVE_OPTION_TABLE=1
-option CONFIG_ROM_PAYLOAD=1
-option CONFIG_HAVE_FALLBACK_BOOT=1
-
-###
-### Compute the location and size of where this firmware image
-### (coreboot plus bootloader) will live in the boot rom chip.
-###
-option CONFIG_FALLBACK_SIZE=0x18000
-
-## Coreboot C code runs at this location in RAM
-option CONFIG_RAMBASE=0x00004000
-
-###
-### Compute the start location and size size of
-### The coreboot bootloader.
-###
-
-#
-# EPIA-M
-#
-romimage "normal"
- option CONFIG_USE_FALLBACK_IMAGE=0
- option CONFIG_ROM_IMAGE_SIZE=0xc000
- option CONFIG_ROM_SECTION_OFFSET=0x10000
- option CONFIG_ROM_SECTION_SIZE=0x18000
- option COREBOOT_EXTRA_VERSION=".0-Normal"
- payload $(HOME)/svn/filo.elf
-end
-
-romimage "fallback"
- option CONFIG_USE_FALLBACK_IMAGE=1
- option CONFIG_ROM_IMAGE_SIZE=0xc000
- option COREBOOT_EXTRA_VERSION=".0-Fallback"
- payload $(HOME)/svn/filo.elf
-end
-
-buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-07 20:13:27 +0000