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Diffstat (limited to 'targets/via/epia-m/Config.etherboot.lb')
-rw-r--r--targets/via/epia-m/Config.etherboot.lb24
1 files changed, 12 insertions, 12 deletions
diff --git a/targets/via/epia-m/Config.etherboot.lb b/targets/via/epia-m/Config.etherboot.lb
index 6e59424be8..0ceaf171ec 100644
--- a/targets/via/epia-m/Config.etherboot.lb
+++ b/targets/via/epia-m/Config.etherboot.lb
@@ -5,24 +5,24 @@ target epia-m
mainboard via/epia-m
-option MAXIMUM_CONSOLE_LOGLEVEL=8
-option DEFAULT_CONSOLE_LOGLEVEL=8
+option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
+option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
option CONFIG_CONSOLE_SERIAL8250=1
-option ROM_SIZE=256*1024
+option CONFIG_ROM_SIZE=256*1024
-option HAVE_OPTION_TABLE=1
+option CONFIG_HAVE_OPTION_TABLE=1
option CONFIG_ROM_PAYLOAD=1
-option HAVE_FALLBACK_BOOT=1
+option CONFIG_HAVE_FALLBACK_BOOT=1
###
### Compute the location and size of where this firmware image
### (coreboot plus bootloader) will live in the boot rom chip.
###
-option FALLBACK_SIZE=131072
+option CONFIG_FALLBACK_SIZE=131072
## Coreboot C code runs at this location in RAM
-option _RAMBASE=0x00004000
+option CONFIG_RAMBASE=0x00004000
#
###
@@ -34,8 +34,8 @@ option _RAMBASE=0x00004000
# Via EPIA-M
#
romimage "normal"
- option USE_FALLBACK_IMAGE=0
- option ROM_IMAGE_SIZE=0x10000
+ option CONFIG_USE_FALLBACK_IMAGE=0
+ option CONFIG_ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION=".0Normal"
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
# payload ../../../../tg3--ide_disk.zelf
@@ -43,12 +43,12 @@ romimage "normal"
end
romimage "fallback"
- option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x10000
+ option CONFIG_USE_FALLBACK_IMAGE=1
+ option CONFIG_ROM_IMAGE_SIZE=0x10000
option COREBOOT_EXTRA_VERSION=".0Fallback"
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
# payload ../../../../tg3--ide_disk.zelf
payload ../../../../../lnxieepro100.ebi
end
-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
+buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"