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-rw-r--r--targets/tyan/s2880/Config.lb36
-rw-r--r--targets/tyan/s2882/Config.lb37
-rw-r--r--targets/tyan/s2885/Config.lb37
3 files changed, 6 insertions, 104 deletions
diff --git a/targets/tyan/s2880/Config.lb b/targets/tyan/s2880/Config.lb
index 42294f396d..0643751e98 100644
--- a/targets/tyan/s2880/Config.lb
+++ b/targets/tyan/s2880/Config.lb
@@ -6,7 +6,6 @@ loadoptions
target s2880
-uses AMD8111_DEV
uses ARCH
uses CONFIG_COMPRESS
uses CONFIG_IOAPIC
@@ -15,9 +14,7 @@ uses CONFIG_ROM_STREAM_START
uses CONFIG_SMP
uses CONFIG_UDELAY_TSC
uses CPU_FIXUP
-uses ENABLE_FIXED_AND_VARIABLE_MTRRS
uses FALLBACK_SIZE
-uses FINAL_MAINBOARD_FIXUP
uses HAVE_FALLBACK_BOOT
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
@@ -31,7 +28,6 @@ uses k8
uses MAINBOARD
uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
-uses MAX_CPUS
#uses MEMORY_HOLE
uses PAYLOAD_SIZE
uses _RAMBASE
@@ -40,12 +36,8 @@ uses ROM_IMAGE_SIZE
uses ROM_SECTION_OFFSET
uses ROM_SECTION_SIZE
uses ROM_SIZE
-uses SIO_BASE
-uses SIO_SYSTEM_CLK_INPUT
uses STACK_SIZE
-uses USE_ELF_BOOT
uses USE_FALLBACK_IMAGE
-uses USE_NORMAL_IMAGE
uses USE_OPTION_TABLE
uses HAVE_OPTION_TABLE
uses CONFIG_CHIP_CONFIGURE
@@ -57,7 +49,7 @@ uses MAXIMUM_CONSOLE_LOGLEVEL
uses DEBUG
uses CONFIG_MAX_CPUS
uses CONFIG_LOGICAL_CPUS
-uses MAX_PHYSICAL_CPUS
+uses CONFIG_MAX_PHYSICAL_CPUS
uses LINUXBIOS_EXTRA_VERSION
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
@@ -97,10 +89,6 @@ option CONFIG_CHIP_CONFIGURE=1
#option CONFIG_LSI_SCSI_FW_FIXUP=1
-### Customize our winbond superio chip for this motherboard
-###
-option SIO_BASE=0x2e
-option SIO_SYSTEM_CLK_INPUT=0
#
###
### Build code to export a programmable irq routing table
@@ -114,9 +102,8 @@ option IRQ_SLOT_COUNT=13
###
option CONFIG_SMP=1
option CONFIG_MAX_CPUS=2
-option MAX_CPUS=2
option CONFIG_LOGICAL_CPUS=0
-option MAX_PHYSICAL_CPUS=2
+option CONFIG_MAX_PHYSICAL_CPUS=2
#
###
### Build code to setup a generic IOAPIC
@@ -135,26 +122,12 @@ option CONFIG_IOAPIC=1
#option MEMORY_HOLE=0
#
###
-### Enable both fixed and variable MTRRS
-### When we setup MTRRs in mtrr.c
-###
-### We must setup the fixed mtrrs or we confuse SMP secondary
-### processor identification
-###
-option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
-#
-###
### Clean up the motherboard id strings
###
option MAINBOARD_PART_NUMBER="S2880"
option MAINBOARD_VENDOR="Tyan"
#
###
-### Call the final_mainboard_fixup function
-###
-option FINAL_MAINBOARD_FIXUP=1
-
-###
### Compute the location and size of where this firmware image
### (linuxBIOS plus bootloader) will live in the boot rom chip.
###
@@ -174,9 +147,6 @@ option ROM_IMAGE_SIZE=65536
## We do use compressed image
option CONFIG_COMPRESS=1
-option USE_ELF_BOOT=1
-
-
option CONFIG_CONSOLE_SERIAL8250=1
option TTYS0_BAUD=115200
@@ -200,8 +170,6 @@ option MAXIMUM_CONSOLE_LOGLEVEL=9
option DEBUG=1
-option AMD8111_DEV=0x5
-
#
## LinuxBIOS C code runs at this location in RAM
diff --git a/targets/tyan/s2882/Config.lb b/targets/tyan/s2882/Config.lb
index 5842babc5c..3589656794 100644
--- a/targets/tyan/s2882/Config.lb
+++ b/targets/tyan/s2882/Config.lb
@@ -6,7 +6,6 @@ loadoptions
target s2882
-uses AMD8111_DEV
uses ARCH
uses CONFIG_COMPRESS
uses CONFIG_IOAPIC
@@ -15,9 +14,7 @@ uses CONFIG_ROM_STREAM_START
uses CONFIG_SMP
uses CONFIG_UDELAY_TSC
uses CPU_FIXUP
-uses ENABLE_FIXED_AND_VARIABLE_MTRRS
uses FALLBACK_SIZE
-uses FINAL_MAINBOARD_FIXUP
uses HAVE_FALLBACK_BOOT
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
@@ -31,7 +28,6 @@ uses k8
uses MAINBOARD
uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
-uses MAX_CPUS
#uses MEMORY_HOLE
uses PAYLOAD_SIZE
uses _RAMBASE
@@ -40,12 +36,8 @@ uses ROM_IMAGE_SIZE
uses ROM_SECTION_OFFSET
uses ROM_SECTION_SIZE
uses ROM_SIZE
-uses SIO_BASE
-uses SIO_SYSTEM_CLK_INPUT
uses STACK_SIZE
-uses USE_ELF_BOOT
uses USE_FALLBACK_IMAGE
-uses USE_NORMAL_IMAGE
uses USE_OPTION_TABLE
uses HAVE_OPTION_TABLE
uses CONFIG_CHIP_CONFIGURE
@@ -57,7 +49,7 @@ uses MAXIMUM_CONSOLE_LOGLEVEL
uses DEBUG
uses CONFIG_MAX_CPUS
uses CONFIG_LOGICAL_CPUS
-uses MAX_PHYSICAL_CPUS
+uses CONFIG_MAX_PHYSICAL_CPUS
uses LINUXBIOS_EXTRA_VERSION
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
@@ -97,10 +89,6 @@ option CONFIG_CHIP_CONFIGURE=1
#option CONFIG_LSI_SCSI_FW_FIXUP=1
-### Customize our winbond superio chip for this motherboard
-###
-option SIO_BASE=0x2e
-option SIO_SYSTEM_CLK_INPUT=0
#
###
### Build code to export a programmable irq routing table
@@ -114,9 +102,8 @@ option IRQ_SLOT_COUNT=15
###
option CONFIG_SMP=1
option CONFIG_MAX_CPUS=2
-option MAX_CPUS=2
option CONFIG_LOGICAL_CPUS=0
-option MAX_PHYSICAL_CPUS=2
+option CONFIG_MAX_PHYSICAL_CPUS=2
#
###
### Build code to setup a generic IOAPIC
@@ -135,25 +122,10 @@ option CONFIG_IOAPIC=1
#option MEMORY_HOLE=0
#
###
-### Enable both fixed and variable MTRRS
-### When we setup MTRRs in mtrr.c
-###
-### We must setup the fixed mtrrs or we confuse SMP secondary
-### processor identification
-###
-option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
-#
-###
### Clean up the motherboard id strings
###
option MAINBOARD_PART_NUMBER="S2882"
option MAINBOARD_VENDOR="Tyan"
-#
-###
-### Call the final_mainboard_fixup function
-###
-option FINAL_MAINBOARD_FIXUP=1
-
###
### Compute the location and size of where this firmware image
### (linuxBIOS plus bootloader) will live in the boot rom chip.
@@ -174,9 +146,6 @@ option ROM_IMAGE_SIZE=65536
## We do use compressed image
option CONFIG_COMPRESS=1
-option USE_ELF_BOOT=1
-
-
option CONFIG_CONSOLE_SERIAL8250=1
option TTYS0_BAUD=115200
@@ -200,8 +169,6 @@ option MAXIMUM_CONSOLE_LOGLEVEL=9
option DEBUG=1
-option AMD8111_DEV=0x5
-
#
## LinuxBIOS C code runs at this location in RAM
diff --git a/targets/tyan/s2885/Config.lb b/targets/tyan/s2885/Config.lb
index 9f0e179874..fb99316da1 100644
--- a/targets/tyan/s2885/Config.lb
+++ b/targets/tyan/s2885/Config.lb
@@ -6,7 +6,6 @@ loadoptions
target s2885
-uses AMD8111_DEV
uses ARCH
uses CONFIG_COMPRESS
uses CONFIG_IOAPIC
@@ -15,9 +14,7 @@ uses CONFIG_ROM_STREAM_START
uses CONFIG_SMP
uses CONFIG_UDELAY_TSC
uses CPU_FIXUP
-uses ENABLE_FIXED_AND_VARIABLE_MTRRS
uses FALLBACK_SIZE
-uses FINAL_MAINBOARD_FIXUP
uses HAVE_FALLBACK_BOOT
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
@@ -31,7 +28,6 @@ uses k8
uses MAINBOARD
uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
-uses MAX_CPUS
#uses MEMORY_HOLE
uses PAYLOAD_SIZE
uses _RAMBASE
@@ -40,12 +36,8 @@ uses ROM_IMAGE_SIZE
uses ROM_SECTION_OFFSET
uses ROM_SECTION_SIZE
uses ROM_SIZE
-uses SIO_BASE
-uses SIO_SYSTEM_CLK_INPUT
uses STACK_SIZE
-uses USE_ELF_BOOT
uses USE_FALLBACK_IMAGE
-uses USE_NORMAL_IMAGE
uses USE_OPTION_TABLE
uses HAVE_OPTION_TABLE
uses CONFIG_CHIP_CONFIGURE
@@ -57,7 +49,7 @@ uses MAXIMUM_CONSOLE_LOGLEVEL
uses DEBUG
uses CONFIG_MAX_CPUS
uses CONFIG_LOGICAL_CPUS
-uses MAX_PHYSICAL_CPUS
+uses CONFIG_MAX_PHYSICAL_CPUS
uses LINUXBIOS_EXTRA_VERSION
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
@@ -97,11 +89,6 @@ option CONFIG_CHIP_CONFIGURE=1
#option CONFIG_LSI_SCSI_FW_FIXUP=1
-### Customize our winbond superio chip for this motherboard
-###
-option SIO_BASE=0x2e
-option SIO_SYSTEM_CLK_INPUT=0
-#
###
### Build code to export a programmable irq routing table
###
@@ -114,9 +101,8 @@ option IRQ_SLOT_COUNT=11
###
option CONFIG_SMP=1
option CONFIG_MAX_CPUS=2
-option MAX_CPUS=2
option CONFIG_LOGICAL_CPUS=0
-option MAX_PHYSICAL_CPUS=2
+option CONFIG_MAX_PHYSICAL_CPUS=2
#
###
### Build code to setup a generic IOAPIC
@@ -135,26 +121,12 @@ option CONFIG_IOAPIC=1
#option MEMORY_HOLE=0
#
###
-### Enable both fixed and variable MTRRS
-### When we setup MTRRs in mtrr.c
-###
-### We must setup the fixed mtrrs or we confuse SMP secondary
-### processor identification
-###
-option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
-#
-###
### Clean up the motherboard id strings
###
option MAINBOARD_PART_NUMBER="S2885"
option MAINBOARD_VENDOR="Tyan"
#
###
-### Call the final_mainboard_fixup function
-###
-option FINAL_MAINBOARD_FIXUP=1
-
-###
### Compute the location and size of where this firmware image
### (linuxBIOS plus bootloader) will live in the boot rom chip.
###
@@ -174,9 +146,6 @@ option ROM_IMAGE_SIZE=65536
## We do use compressed image
option CONFIG_COMPRESS=1
-option USE_ELF_BOOT=1
-
-
option CONFIG_CONSOLE_SERIAL8250=1
option TTYS0_BAUD=115200
@@ -200,8 +169,6 @@ option MAXIMUM_CONSOLE_LOGLEVEL=9
option DEBUG=1
-option AMD8111_DEV=0x5
-
#
## LinuxBIOS C code runs at this location in RAM
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 11:45:11 +0000