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-rw-r--r--targets/intel/truxton/Config.lb40
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diff --git a/targets/intel/truxton/Config.lb b/targets/intel/truxton/Config.lb
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+++ b/targets/intel/truxton/Config.lb
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+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 Arastra, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License version 2 as
+## published by the Free Software Foundation.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+target truxton
+mainboard intel/truxton
+
+## ROM_SIZE is the total number of bytes allocated for coreboot use
+## (normal AND fallback images and payloads).
+option ROM_SIZE = 2 * 1024 * 1024
+
+## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
+## not including any payload.
+option ROM_IMAGE_SIZE = 128 * 1024
+
+## FALLBACK_SIZE is the amount of the ROM the complete fallback image
+## (including payload) will use
+option FALLBACK_SIZE = ROM_SIZE
+
+romimage "fallback"
+ option USE_FALLBACK_IMAGE=1
+ payload /tmp/filo.elf
+end
+
+buildrom ./coreboot.rom ROM_SIZE "fallback"