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-rw-r--r--src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd21
-rw-r--r--src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd21
-rw-r--r--src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd21
-rw-r--r--src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd21
-rw-r--r--src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd21
-rw-r--r--src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd21
-rw-r--r--src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd21
7 files changed, 147 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd
new file mode 100644
index 0000000000..565cacd3a8
--- /dev/null
+++ b/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd
@@ -0,0 +1,21 @@
+FLASH@0xff400000 0xc00000 {
+ SI_ALL 0x20000 {
+ SI_DESC 0x1000
+ SI_GBE 0x2000
+ SI_ME
+ }
+ SI_BIOS 0xbe0000 {
+ UNIFIED_MRC_CACHE 0x20000 {
+ RECOVERY_MRC_CACHE 0x10000
+ RW_MRC_CACHE 0x10000
+ }
+
+ WP_RO {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_PADDING 0x7c0
+ GBB 0x1e000
+ COREBOOT(CBFS)
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd
new file mode 100644
index 0000000000..565cacd3a8
--- /dev/null
+++ b/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd
@@ -0,0 +1,21 @@
+FLASH@0xff400000 0xc00000 {
+ SI_ALL 0x20000 {
+ SI_DESC 0x1000
+ SI_GBE 0x2000
+ SI_ME
+ }
+ SI_BIOS 0xbe0000 {
+ UNIFIED_MRC_CACHE 0x20000 {
+ RECOVERY_MRC_CACHE 0x10000
+ RW_MRC_CACHE 0x10000
+ }
+
+ WP_RO {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_PADDING 0x7c0
+ GBB 0x1e000
+ COREBOOT(CBFS)
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd
new file mode 100644
index 0000000000..565cacd3a8
--- /dev/null
+++ b/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd
@@ -0,0 +1,21 @@
+FLASH@0xff400000 0xc00000 {
+ SI_ALL 0x20000 {
+ SI_DESC 0x1000
+ SI_GBE 0x2000
+ SI_ME
+ }
+ SI_BIOS 0xbe0000 {
+ UNIFIED_MRC_CACHE 0x20000 {
+ RECOVERY_MRC_CACHE 0x10000
+ RW_MRC_CACHE 0x10000
+ }
+
+ WP_RO {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_PADDING 0x7c0
+ GBB 0x1e000
+ COREBOOT(CBFS)
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd
new file mode 100644
index 0000000000..565cacd3a8
--- /dev/null
+++ b/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd
@@ -0,0 +1,21 @@
+FLASH@0xff400000 0xc00000 {
+ SI_ALL 0x20000 {
+ SI_DESC 0x1000
+ SI_GBE 0x2000
+ SI_ME
+ }
+ SI_BIOS 0xbe0000 {
+ UNIFIED_MRC_CACHE 0x20000 {
+ RECOVERY_MRC_CACHE 0x10000
+ RW_MRC_CACHE 0x10000
+ }
+
+ WP_RO {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_PADDING 0x7c0
+ GBB 0x1e000
+ COREBOOT(CBFS)
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd
new file mode 100644
index 0000000000..565cacd3a8
--- /dev/null
+++ b/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd
@@ -0,0 +1,21 @@
+FLASH@0xff400000 0xc00000 {
+ SI_ALL 0x20000 {
+ SI_DESC 0x1000
+ SI_GBE 0x2000
+ SI_ME
+ }
+ SI_BIOS 0xbe0000 {
+ UNIFIED_MRC_CACHE 0x20000 {
+ RECOVERY_MRC_CACHE 0x10000
+ RW_MRC_CACHE 0x10000
+ }
+
+ WP_RO {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_PADDING 0x7c0
+ GBB 0x1e000
+ COREBOOT(CBFS)
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd
new file mode 100644
index 0000000000..565cacd3a8
--- /dev/null
+++ b/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd
@@ -0,0 +1,21 @@
+FLASH@0xff400000 0xc00000 {
+ SI_ALL 0x20000 {
+ SI_DESC 0x1000
+ SI_GBE 0x2000
+ SI_ME
+ }
+ SI_BIOS 0xbe0000 {
+ UNIFIED_MRC_CACHE 0x20000 {
+ RECOVERY_MRC_CACHE 0x10000
+ RW_MRC_CACHE 0x10000
+ }
+
+ WP_RO {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_PADDING 0x7c0
+ GBB 0x1e000
+ COREBOOT(CBFS)
+ }
+ }
+}
diff --git a/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd
new file mode 100644
index 0000000000..565cacd3a8
--- /dev/null
+++ b/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd
@@ -0,0 +1,21 @@
+FLASH@0xff400000 0xc00000 {
+ SI_ALL 0x20000 {
+ SI_DESC 0x1000
+ SI_GBE 0x2000
+ SI_ME
+ }
+ SI_BIOS 0xbe0000 {
+ UNIFIED_MRC_CACHE 0x20000 {
+ RECOVERY_MRC_CACHE 0x10000
+ RW_MRC_CACHE 0x10000
+ }
+
+ WP_RO {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_PADDING 0x7c0
+ GBB 0x1e000
+ COREBOOT(CBFS)
+ }
+ }
+}