diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/rex/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb | 7 |
2 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index ba76553b88..779ebf419c 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -54,6 +54,10 @@ config MEMORY_SOLDERDOWN select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS select HAVE_SPD_IN_CBFS +config UART_FOR_CONSOLE + int + default 0 + config OVERRIDE_DEVICETREE default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index c8f113ae9a..f9eb12fe7c 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -1,4 +1,11 @@ chip soc/intel/meteorlake + + register "serial_io_uart_mode" = "{ + [PchSerialIoIndexUART0] = PchSerialIoPci, + [PchSerialIoIndexUART1] = PchSerialIoDisabled, + [PchSerialIoIndexUART2] = PchSerialIoDisabled, + }" + device domain 0 on device ref igpu on end device ref dtt on end |