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-rw-r--r--src/soc/amd/common/block/include/amdblocks/lpc.h12
-rw-r--r--src/soc/amd/common/block/lpc/lpc_util.c8
2 files changed, 4 insertions, 16 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/lpc.h b/src/soc/amd/common/block/include/amdblocks/lpc.h
index 024d479561..c5f3c78821 100644
--- a/src/soc/amd/common/block/include/amdblocks/lpc.h
+++ b/src/soc/amd/common/block/include/amdblocks/lpc.h
@@ -67,18 +67,6 @@
#define LPC_SELECT_SIO_2E2F 0
#define WIDEIO_RANGE_ERROR -1
-/* Assuming word access to higher word (register 0x4a) */
-#define LPC_IO_OR_MEM_DEC_EN_HIGH 0x4a
-#define LPC_WIDEIO2_ENABLE_H BIT(9)
-#define LPC_WIDEIO1_ENABLE_H BIT(8)
-#define DECODE_IO_PORT_ENABLE6_H BIT(7)
-#define DECODE_IO_PORT_ENABLE5_H BIT(6)
-#define DECODE_IO_PORT_ENABLE4_H BIT(5)
-#define DECODE_IO_PORT_ENABLE3_H BIT(3)
-#define DECODE_IO_PORT_ENABLE2_H BIT(2)
-#define DECODE_IO_PORT_ENABLE1_H BIT(1)
-#define DECODE_IO_PORT_ENABLE0_H BIT(0)
-
#define LPC_MEM_PORT1 0x4c
#define ROM_PROTECT_RANGE0 0x50
#define ROM_BASE_MASK 0xfffff000 /* bits 31-12 */
diff --git a/src/soc/amd/common/block/lpc/lpc_util.c b/src/soc/amd/common/block/lpc/lpc_util.c
index c40a198493..72919598a3 100644
--- a/src/soc/amd/common/block/lpc/lpc_util.c
+++ b/src/soc/amd/common/block/lpc/lpc_util.c
@@ -138,11 +138,11 @@ int lpc_set_wideio_range(uint16_t start, uint16_t size)
void lpc_enable_port80(void)
{
- u8 byte;
+ uint32_t tmp;
- byte = pci_read_config8(_LPCB_DEV, LPC_IO_OR_MEM_DEC_EN_HIGH);
- byte |= DECODE_IO_PORT_ENABLE4_H;
- pci_write_config8(_LPCB_DEV, LPC_IO_OR_MEM_DEC_EN_HIGH, byte);
+ tmp = pci_read_config32(_LPCB_DEV, LPC_IO_OR_MEM_DECODE_ENABLE);
+ tmp |= DECODE_IO_PORT_ENABLE4;
+ pci_write_config32(_LPCB_DEV, LPC_IO_OR_MEM_DECODE_ENABLE, tmp);
}
void lpc_enable_sio_decode(const bool addr)