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-rw-r--r--src/soc/amd/common/block/acpimmio/mmio_util.c5
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpimmio.h1
2 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c
index cfe877952a..c0b29fa992 100644
--- a/src/soc/amd/common/block/acpimmio/mmio_util.c
+++ b/src/soc/amd/common/block/acpimmio/mmio_util.c
@@ -93,6 +93,11 @@ void fch_configure_hpet(void)
pm_write32(PM_DECODE_EN, reg);
}
+void fch_disable_kb_rst(void)
+{
+ pm_write8(PM_RST_CTRL1, pm_read8(PM_RST_CTRL1) & ~KBRSTEN);
+}
+
/* PM registers are accessed a byte at a time via CD6/CD7 */
uint8_t pm_io_read8(uint8_t reg)
{
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 2e1da882c0..9360650851 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -87,6 +87,7 @@ void fch_disable_legacy_dma_io(void);
void fch_io_enable_legacy_io(void);
void fch_enable_ioapic_decode(void);
void fch_configure_hpet(void);
+void fch_disable_kb_rst(void);
/* Access PM registers using IO cycles */
uint8_t pm_io_read8(uint8_t reg);