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-rw-r--r--src/soc/intel/alderlake/chipset.cb4
-rw-r--r--src/soc/intel/alderlake/include/soc/pci_devs.h8
2 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb
index 7085263b66..b05a1e9bb5 100644
--- a/src/soc/intel/alderlake/chipset.cb
+++ b/src/soc/intel/alderlake/chipset.cb
@@ -79,8 +79,8 @@ chip soc/intel/alderlake
device pci 0d.2 alias tcss_dma0 off end
device pci 0d.3 alias tcss_dma1 off end
device pci 0e.0 alias vmd off end
- device pci 10.0 alias thc0 off end
- device pci 10.1 alias thc1 off end
+ device pci 10.6 alias thc0 off end
+ device pci 10.7 alias thc1 off end
device pci 12.0 alias ish off end
device pci 12.6 alias gspi2 off end
device pci 13.0 alias gspi3 off end
diff --git a/src/soc/intel/alderlake/include/soc/pci_devs.h b/src/soc/intel/alderlake/include/soc/pci_devs.h
index 730808d1ea..1e8ecc7266 100644
--- a/src/soc/intel/alderlake/include/soc/pci_devs.h
+++ b/src/soc/intel/alderlake/include/soc/pci_devs.h
@@ -79,10 +79,10 @@
/* PCH Devices */
#define MIN_PCH_SLOT PCH_DEV_SLOT_SIO0
#define PCH_DEV_SLOT_SIO0 0x10
-#define PCH_DEVFN_THC0 _PCH_DEVFN(SIO0, 0)
-#define PCH_DEVFN_THC1 _PCH_DEVFN(SIO0, 1)
-#define PCH_DEV_THC0 _PCH_DEV(SIO0, 0)
-#define PCH_DEV_THC1 _PCH_DEV(SIO0, 1)
+#define PCH_DEVFN_THC0 _PCH_DEVFN(SIO0, 6)
+#define PCH_DEVFN_THC1 _PCH_DEVFN(SIO0, 7)
+#define PCH_DEV_THC0 _PCH_DEV(SIO0, 6)
+#define PCH_DEV_THC1 _PCH_DEV(SIO0, 7)
#define PCH_DEV_SLOT_ISH 0x12
#define PCH_DEVFN_ISH _PCH_DEVFN(ISH, 0)