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-rw-r--r--src/mainboard/intel/adlrvp/Kconfig1
-rw-r--r--src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb27
2 files changed, 28 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 981ba31d16..3b59d03bea 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -39,6 +39,7 @@ config BOARD_INTEL_ADLRVP_RPL_EXT_EC
select INTEL_LPSS_UART_FOR_CONSOLE
select SOC_INTEL_ALDERLAKE_PCH_P
select GEN3_EXTERNAL_CLOCK_BUFFER
+ select DRIVERS_WWAN_FM350GL
config BOARD_INTEL_ADLRVP_P_MCHP
select BOARD_INTEL_ADLRVP_COMMON
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb
index de5471cf65..2eea1e4583 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb
@@ -57,5 +57,32 @@ chip soc/intel/alderlake
end
end
end
+ device ref pcie_rp6 on
+ # Enable WWAN PCIE 6 using clk 5
+ register "pch_pcie_rp[PCH_RP(6)]" = "{
+ .clk_src = 5,
+ .clk_req = 5,
+ .flags = PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ chip soc/intel/common/block/pcie/rtd3
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C5)"
+ register "reset_off_delay_ms" = "20"
+ register "srcclk_pin" = "5"
+ register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
+ register "skip_on_off_support" = "true"
+ device generic 0 alias rp6_rtd3 on
+ end
+ end
+ chip drivers/wwan/fm
+ register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F15)"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F14)"
+ register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C5)"
+ register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
+ register "add_acpi_dma_property" = "true"
+ use rp6_rtd3 as rtd3dev
+ device generic 0 on
+ end
+ end
+ end
end
end