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-rw-r--r--src/soc/intel/cannonlake/chip.h3
-rw-r--r--src/soc/intel/cannonlake/cpu.c8
2 files changed, 9 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 15592d54fa..f9f761b5db 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -439,6 +439,9 @@ struct soc_intel_cannonlake_config {
struct i915_gpu_panel_config panel_cfg;
struct i915_gpu_controller_info gfx;
+
+ /* Disable CPU Turbo in IA32_MISC_ENABLE */
+ bool cpu_turbo_disable;
};
typedef struct soc_intel_cannonlake_config config_t;
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 8b845c004c..2520559cdc 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -91,6 +91,8 @@ static void configure_c_states(void)
/* All CPUs including BSP will run the following function. */
void soc_core_init(struct device *cpu)
{
+ config_t *cfg = config_of_soc();
+
/* Clear out pending MCEs */
/* TODO(adurbin): This should only be done on a cold boot. Also, some
* of these banks are core vs package scope. For now every CPU clears
@@ -117,8 +119,10 @@ void soc_core_init(struct device *cpu)
/* Set energy policy */
set_energy_perf_bias(ENERGY_POLICY_NORMAL);
- /* Enable Turbo */
- enable_turbo();
+ if (cfg->cpu_turbo_disable)
+ disable_turbo();
+ else
+ enable_turbo();
/* Enable Vmx */
set_vmx_and_lock();