diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/lenovo/x201/Kconfig | 19 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x201/cmos.layout | 3 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x201/vboot-rwa.fmd | 30 |
3 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig index 905d81d682..e40c0d3e41 100644 --- a/src/mainboard/lenovo/x201/Kconfig +++ b/src/mainboard/lenovo/x201/Kconfig @@ -23,6 +23,25 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_USES_IFD_GBE_REGION select H8_HAS_BAT_TRESHOLDS_IMPL +config VBOOT + select VBOOT_VBNV_CMOS + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + select HAS_RECOVERY_MRC_CACHE + +config VBOOT_SLOTS_RW_A + default y + +config VBOOT_VBNV_OFFSET + hex + default 0x2a + +config FMDFILE + string + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT + config MAINBOARD_DIR string default lenovo/x201 diff --git a/src/mainboard/lenovo/x201/cmos.layout b/src/mainboard/lenovo/x201/cmos.layout index 0cda679814..990db6df06 100644 --- a/src/mainboard/lenovo/x201/cmos.layout +++ b/src/mainboard/lenovo/x201/cmos.layout @@ -78,6 +78,9 @@ entries #427 5 r 0 unused 432 8 h 0 volume +# VBOOT +448 128 r 0 vbnv + # coreboot config options: check sums 984 16 h 0 check_sum #1000 24 r 0 amd_reserved diff --git a/src/mainboard/lenovo/x201/vboot-rwa.fmd b/src/mainboard/lenovo/x201/vboot-rwa.fmd new file mode 100644 index 0000000000..0d1aa5df13 --- /dev/null +++ b/src/mainboard/lenovo/x201/vboot-rwa.fmd @@ -0,0 +1,30 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x500000 { + SI_DESC@0x0 0x1000 + SI_GBE@0x1000 0x2000 + SI_ME@0x3000 0x4ed000 + } + SI_BIOS@0x500000 0x300000 { + RW_SECTION_A 0x180000 { + VBLOCK_A 0x10000 + FW_MAIN_A(CBFS) + RW_FWID_A 0x40 + } + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + RW_VPD(PRESERVE) 0x1000 + SMMSTORE(PRESERVE) 0x40000 + WP_RO { + RO_VPD(PRESERVE) 0x1000 + RO_SECTION { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } + } +} |