3 files changed, 61 insertions, 36 deletions

diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 593d17b82d..b6c0ddb915 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -78,6 +78,7 @@ ramstage-y += fsp_params.c
 ramstage-y += config.c
 ramstage-y += update_microcode.c
 ramstage-y += graphics.c
+ramstage-y += pcie_gpp.c
 
 smm-y += smihandler.c
 smm-y += smi_util.c
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index 2e5fae58e5..7d56323d96 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -56,24 +56,6 @@ const char *soc_acpi_name(const struct device *dev)
 			return "GNB";
 		case IOMMU_DEVFN:
 			return "IOMM";
-		case PCIE_GPP_0_DEVFN:
-			return "PBR0";
-		case PCIE_GPP_1_DEVFN:
-			return "PBR1";
-		case PCIE_GPP_2_DEVFN:
-			return "PBR2";
-		case PCIE_GPP_3_DEVFN:
-			return "PBR3";
-		case PCIE_GPP_4_DEVFN:
-			return "PBR4";
-		case PCIE_GPP_5_DEVFN:
-			return "PBR5";
-		case PCIE_GPP_6_DEVFN:
-			return "PBR6";
-		case PCIE_GPP_A_DEVFN:
-			return "PBRA";
-		case PCIE_GPP_B_DEVFN:
-			return "PBRB";
 		case LPC_DEVFN:
 			return "LPCB";
 		case SMBUS_DEVFN:
@@ -111,15 +93,6 @@ struct device_operations pci_domain_ops = {
 	.acpi_name	  = soc_acpi_name,
 };
 
-static struct device_operations pci_ops_ops_bus_ab = {
-	.read_resources		= pci_bus_read_resources,
-	.set_resources		= pci_dev_set_resources,
-	.enable_resources	= pci_bus_enable_resources,
-	.scan_bus		= pci_scan_bridge,
-	.reset_bus		= pci_bus_reset,
-	.acpi_fill_ssdt		= acpi_device_write_pci_dev,
-};
-
 static void set_mmio_dev_ops(struct device *dev)
 {
 	switch (dev->path.mmio.addr) {
@@ -144,15 +117,6 @@ static void enable_dev(struct device *dev)
 		dev->ops = &pci_domain_ops;
 	} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
 		dev->ops = &cpu_bus_ops;
-	} else if (dev->path.type == DEVICE_PATH_PCI) {
-		if (dev->bus->dev->path.type == DEVICE_PATH_DOMAIN) {
-			switch (dev->path.pci.devfn) {
-			case PCIE_GPP_A_DEVFN:
-			case PCIE_GPP_B_DEVFN:
-				dev->ops = &pci_ops_ops_bus_ab;
-			}
-		}
-		sb_enable(dev);
 	} else if (dev->path.type == DEVICE_PATH_MMIO) {
 		set_mmio_dev_ops(dev);
 	}
diff --git a/src/soc/amd/picasso/pcie_gpp.c b/src/soc/amd/picasso/pcie_gpp.c
new file mode 100644
index 0000000000..73de80365d
--- /dev/null
+++ b/src/soc/amd/picasso/pcie_gpp.c
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <acpi/acpigen.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <soc/pci_devs.h>
+#include <stdio.h>
+
+static const char *pcie_gpp_acpi_name(const struct device *dev)
+{
+	if (dev->path.type != DEVICE_PATH_PCI)
+		return NULL;
+
+	switch (dev->path.pci.devfn) {
+	case PCIE_GPP_0_DEVFN:
+		return "PBR0";
+	case PCIE_GPP_1_DEVFN:
+		return "PBR1";
+	case PCIE_GPP_2_DEVFN:
+		return "PBR2";
+	case PCIE_GPP_3_DEVFN:
+		return "PBR3";
+	case PCIE_GPP_4_DEVFN:
+		return "PBR4";
+	case PCIE_GPP_5_DEVFN:
+		return "PBR5";
+	case PCIE_GPP_6_DEVFN:
+		return "PBR6";
+	case PCIE_GPP_A_DEVFN:
+		return "PBRA";
+	case PCIE_GPP_B_DEVFN:
+		return "PBRB";
+	}
+
+	return NULL;
+}
+
+static struct device_operations pcie_gpp_ops = {
+	.read_resources		= pci_bus_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_bus_enable_resources,
+	.scan_bus		= pci_scan_bridge,
+	.reset_bus		= pci_bus_reset,
+	.acpi_name		= pcie_gpp_acpi_name,
+	.acpi_fill_ssdt		= acpi_device_write_pci_dev,
+};
+
+static const unsigned short pci_device_ids[] = {
+	PCI_DEVICE_ID_AMD_FAM17H_PCIE_GPP,
+	PCI_DEVICE_ID_AMD_FAM17H_PCIE_GPP_BUSA,
+	PCI_DEVICE_ID_AMD_FAM17H_PCIE_GPP_BUSB,
+	0
+};
+
+static const struct pci_driver pcie_gpp_driver __pci_driver = {
+	.ops			= &pcie_gpp_ops,
+	.vendor			= PCI_VENDOR_ID_AMD,
+	.devices		= pci_device_ids,
+};