diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera/overridetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera4es/overridetree.cb | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index 97be625f1c..1038798035 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -33,6 +33,7 @@ chip soc/intel/alderlake register "gpio_pm[COMM_4]" = "0" register "gpio_pm[COMM_5]" = "0" + register "SaGv" = "SaGv_Enabled" # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 97be625f1c..1038798035 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -33,6 +33,7 @@ chip soc/intel/alderlake register "gpio_pm[COMM_4]" = "0" register "gpio_pm[COMM_5]" = "0" + register "SaGv" = "SaGv_Enabled" # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | |