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-rw-r--r--src/mainboard/google/brya/variants/aurash/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/brask/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/gaelin/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/kano/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/kuldax/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/moli/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/osiris/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/volmar/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/zydron/overridetree.cb2
9 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/google/brya/variants/aurash/overridetree.cb b/src/mainboard/google/brya/variants/aurash/overridetree.cb
index 2b9ebfea64..a18197627c 100644
--- a/src/mainboard/google/brya/variants/aurash/overridetree.cb
+++ b/src/mainboard/google/brya/variants/aurash/overridetree.cb
@@ -147,7 +147,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms
diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb
index 995f20ca36..8fc82bae1b 100644
--- a/src/mainboard/google/brya/variants/brask/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brask/overridetree.cb
@@ -124,7 +124,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms
diff --git a/src/mainboard/google/brya/variants/gaelin/overridetree.cb b/src/mainboard/google/brya/variants/gaelin/overridetree.cb
index b3af7c12c4..0823abf0c3 100644
--- a/src/mainboard/google/brya/variants/gaelin/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gaelin/overridetree.cb
@@ -184,7 +184,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms
diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb
index e04419133f..73f9847611 100644
--- a/src/mainboard/google/brya/variants/kano/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kano/overridetree.cb
@@ -278,7 +278,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms
diff --git a/src/mainboard/google/brya/variants/kuldax/overridetree.cb b/src/mainboard/google/brya/variants/kuldax/overridetree.cb
index a6adecfcf5..e392c2161b 100644
--- a/src/mainboard/google/brya/variants/kuldax/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kuldax/overridetree.cb
@@ -187,7 +187,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index e636540033..3397d0c211 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -148,7 +148,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms
diff --git a/src/mainboard/google/brya/variants/osiris/overridetree.cb b/src/mainboard/google/brya/variants/osiris/overridetree.cb
index 9225c02a7a..364b7ac7de 100644
--- a/src/mainboard/google/brya/variants/osiris/overridetree.cb
+++ b/src/mainboard/google/brya/variants/osiris/overridetree.cb
@@ -226,7 +226,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms
diff --git a/src/mainboard/google/brya/variants/volmar/overridetree.cb b/src/mainboard/google/brya/variants/volmar/overridetree.cb
index 069d221608..38d6c472d6 100644
--- a/src/mainboard/google/brya/variants/volmar/overridetree.cb
+++ b/src/mainboard/google/brya/variants/volmar/overridetree.cb
@@ -240,7 +240,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms
diff --git a/src/mainboard/google/brya/variants/zydron/overridetree.cb b/src/mainboard/google/brya/variants/zydron/overridetree.cb
index f0d4d05cb6..ac43d245e8 100644
--- a/src/mainboard/google/brya/variants/zydron/overridetree.cb
+++ b/src/mainboard/google/brya/variants/zydron/overridetree.cb
@@ -254,7 +254,7 @@ chip soc/intel/alderlake
register "sar_threshold[2]" = "0x38"
register "sar_threshold[3]" = "0x60"
register "sar_hysteresis" = "1"
- register "sar_voltage" = "6"
+ register "sar_voltage" = "0" # VDDA
register "sar_compare_time" = "0" # 500ns
register "sar_sampling_time" = "0" # 2us
register "short_key_debounce" = "2" # 100ms