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-rw-r--r--src/cpu/intel/haswell/cache_as_ram.inc2
-rw-r--r--src/soc/intel/baytrail/romstage/cache_as_ram.inc2
-rw-r--r--src/soc/intel/broadwell/romstage/cache_as_ram.inc2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/intel/haswell/cache_as_ram.inc b/src/cpu/intel/haswell/cache_as_ram.inc
index e09e74b6c2..2ccef786fa 100644
--- a/src/cpu/intel/haswell/cache_as_ram.inc
+++ b/src/cpu/intel/haswell/cache_as_ram.inc
@@ -236,7 +236,7 @@ before_romstage:
post_code(0x38)
- /* Setup stack as indicated by return value from ramstage_main(). */
+ /* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
/* Get number of MTRRs. */
diff --git a/src/soc/intel/baytrail/romstage/cache_as_ram.inc b/src/soc/intel/baytrail/romstage/cache_as_ram.inc
index 4a1d31f6da..dcb62960f9 100644
--- a/src/soc/intel/baytrail/romstage/cache_as_ram.inc
+++ b/src/soc/intel/baytrail/romstage/cache_as_ram.inc
@@ -217,7 +217,7 @@ before_romstage:
post_code(0x2e)
- /* Setup stack as indicated by return value from ramstage_main(). */
+ /* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
/* Get number of MTRRs. */
diff --git a/src/soc/intel/broadwell/romstage/cache_as_ram.inc b/src/soc/intel/broadwell/romstage/cache_as_ram.inc
index a636e9f7ad..20ef6e9758 100644
--- a/src/soc/intel/broadwell/romstage/cache_as_ram.inc
+++ b/src/soc/intel/broadwell/romstage/cache_as_ram.inc
@@ -256,7 +256,7 @@ before_romstage:
post_code(0x38)
- /* Setup stack as indicated by return value from ramstage_main(). */
+ /* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
/* Get number of MTRRs. */