8 files changed, 13 insertions, 14 deletions
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index 806198e90c..23e0bf6a91 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -41,7 +41,7 @@ stages_o = $(obj)/arch/armv7/stages.o
 
 $(stages_o): $(stages_c) $(obj)/config.h
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC_armv7) -I. $(INCLUDES) $(INCLUDES_armv7) -c -o $@ $< -marm
+	$(CC_armv7) -I. $(CPPFLAGS) $(CPPFLAGS_armv7) -c -o $@ $< -marm
 
 endif # CONFIG_ARCH_ARMV7
 
@@ -86,10 +86,10 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o
 
 $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h
 	@printf "    CC      $(subst $(obj)/,,$(@))\n"
-	$(CC_bootblock) $(bootblock-c-ccopts) $(INCLUDES) $(INCLUDES_bootblock) -MM \
+	$(CC_bootblock) $(bootblock-c-ccopts) $(CPPFLAGS) $(CPPFLAGS_bootblock) -MM \
 		-MT$(objgenerated)/bootblock.inc \
 		$< > $(objgenerated)/bootblock.inc.d
-	$(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@
+	$(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(CPPFLAGS) $(CPPFLAGS_bootblock) $< -o $@
 
 $(objcbfs)/bootblock.debug:  $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index b02df5a35a..6ff059c511 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -123,9 +123,9 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o
 
 $(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
 	@printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
-	$(CC_bootblock) $(INCLUDES) $(INCLUDES_bootblock) -MM -MT$(objgenerated)/bootblock.inc \
+	$(CC_bootblock) $(CPPFLAGS) $(CPPFLAGS_bootblock) -MM -MT$(objgenerated)/bootblock.inc \
 		$< > $(objgenerated)/bootblock.inc.d
-	$(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@
+	$(ROMCC) -c -S $(bootblock_romccflags) -I. $(CPPFLAGS) $(CPPFLAGS_bootblock) $< -o $@
 
 $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
@@ -188,7 +188,7 @@ $(objcbfs)/romstage_%.elf: $(objcbfs)/romstage_%.debug
 
 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
 	printf "    ROMCC      romstage.inc\n"
-	$(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $(INCLUDES_romstage) $< -o $@
+	$(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(CPPFLAGS) $(CPPFLAGS_romstage) $< -o $@
 else
 
 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
@@ -256,7 +256,7 @@ $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s
 
 $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC_romstage) $(INCLUDES) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
+	$(CC_romstage) $(CPPFLAGS) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
 
 endif # CONFIG_ARCH_ROMSTAGE_X86_32
 
diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc
index 6004462915..8345002b0c 100644
--- a/src/cpu/intel/fsp_model_206ax/Makefile.inc
+++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc
@@ -9,6 +9,6 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE)  += microcode_blob.c
 
 ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),)
 ifneq ($(wildcard $(shell realpath -L "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),)
-INCLUDES += -I$(CONFIG_MICROCODE_INCLUDE_PATH)
+CPPFLAGS += -I$(CONFIG_MICROCODE_INCLUDE_PATH)
 endif
 endif
diff --git a/src/drivers/intel/fsp/Makefile.inc b/src/drivers/intel/fsp/Makefile.inc
index 9e083ec093..86c3a851b9 100644
--- a/src/drivers/intel/fsp/Makefile.inc
+++ b/src/drivers/intel/fsp/Makefile.inc
@@ -22,7 +22,7 @@ romstage-y += fsp_util.c
 ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
 romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
 
-INCLUDES += -Isrc/drivers/intel/fsp
+CPPFLAGS += -Isrc/drivers/intel/fsp
 
 ifeq ($(CONFIG_USE_GENERIC_FSP_CAR_INC),y)
 cpu_incs += $(src)/drivers/intel/fsp/cache_as_ram.inc
diff --git a/src/northbridge/intel/fsp_sandybridge/Makefile.inc b/src/northbridge/intel/fsp_sandybridge/Makefile.inc
index f5dbbe4e89..952c00848b 100644
--- a/src/northbridge/intel/fsp_sandybridge/Makefile.inc
+++ b/src/northbridge/intel/fsp_sandybridge/Makefile.inc
@@ -32,6 +32,6 @@ romstage-y += ../../../arch/x86/lib/walkcbfs.S
 smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
 
-INCLUDES += -I$(src)/northbridge/intel/fsp_sandybridge/fsp
+CPPFLAGS += -I$(src)/northbridge/intel/fsp_sandybridge/fsp
 
 $(obj)/northbridge/intel/fsp_sandybridge/acpi.ramstage.o : $(obj)/build.h
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index f93435be80..179f2a64ee 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -53,7 +53,7 @@ ramstage-$(CONFIG_ELOG) += elog.c
 # Remove as ramstage gets fleshed out
 ramstage-y += placeholders.c
 
-INCLUDES += -Isrc/soc/intel/baytrail/
+CPPFLAGS += -Isrc/soc/intel/baytrail/
 
 # Run an intermediate step when producing coreboot.rom
 # that adds additional components to the final firmware
diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
index a1d3e62e7c..fdb04313eb 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
@@ -70,4 +70,4 @@ endif
 
 PHONY += bd82x6x_add_me
 
-INCLUDES += -I$(src)/southbridge/intel/fsp_bd82x6x
+CPPFLAGS += -I$(src)/southbridge/intel/fsp_bd82x6x
diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc
index 2dcb03aeaf..f0289f8dd8 100644
--- a/src/vendorcode/google/chromeos/Makefile.inc
+++ b/src/vendorcode/google/chromeos/Makefile.inc
@@ -48,8 +48,7 @@ VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-ROMSTAGE-y))
 VB_SOURCE := vboot_reference
 
 # Add the vboot include paths.
-VB_INCLUDES += -I$(VB_SOURCE)/firmware/include
-INCLUDES += $(VB_INCLUDES)
+CPPFLAGS += -I$(VB_SOURCE)/firmware/include
 
 VBOOT_STUB_ELF = $(obj)/vendorcode/google/chromeos/vbootstub.elf
 VBOOT_STUB = $(VBOOT_STUB_ELF).rmod