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-rw-r--r--src/soc/mediatek/mt8188/devapc.c13
-rw-r--r--src/soc/mediatek/mt8188/include/soc/devapc.h9
2 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/devapc.c b/src/soc/mediatek/mt8188/devapc.c
index 72ba222746..b30856f3e8 100644
--- a/src/soc/mediatek/mt8188/devapc.c
+++ b/src/soc/mediatek/mt8188/devapc.c
@@ -1636,6 +1636,11 @@ static void infra_init(uintptr_t base)
SET32_BITFIELDS(getreg(base, MAS_SEC_0), CPU_EB_SEC, SECURE_TRANS);
SET32_BITFIELDS(getreg(base, MAS_SEC_0), SCP_SSPM_SEC, SECURE_TRANS);
+ /* Master Domain */
+ SET32_BITFIELDS(getreg(base, MAS_DOM_0),
+ SCP_SSPM_DOM, DOMAIN_3,
+ CPU_EB_DOM, DOMAIN_14);
+
/*
* Domain Remap: INFRA (4-bit) -> MMSYS (2-bit)
* domain 0 -> domain 0
@@ -1670,6 +1675,9 @@ static void peri_init(uintptr_t base)
/* Default APC setting */
set_peri_ao_apc(base);
+ /* Master Domain */
+ SET32_BITFIELDS(getreg(base, MAS_DOM_0), SPM_DOM, DOMAIN_9);
+
/*
* Domain Remap: INFRA (4-bit) -> TINYSYS (3-bit)
* domain 0 -> domain 0
@@ -1694,6 +1702,11 @@ static void peri_par_init(uintptr_t base)
{
/* Default APC setting */
set_peri_par_ao_apc(base);
+
+ /* Master Domain */
+ SET32_BITFIELDS(getreg_domain(base, MAS_DOM_0, 0, 4),
+ PCIE0_DOM, DOMAIN_2);
+
}
static void fmem_master_init(uintptr_t base)
diff --git a/src/soc/mediatek/mt8188/include/soc/devapc.h b/src/soc/mediatek/mt8188/include/soc/devapc.h
index 0f320bac6a..177cd3c4a5 100644
--- a/src/soc/mediatek/mt8188/include/soc/devapc.h
+++ b/src/soc/mediatek/mt8188/include/soc/devapc.h
@@ -59,4 +59,13 @@ enum devapc_cfg_index {
DEFINE_BIT(CPU_EB_SEC, 1)
DEFINE_BIT(SCP_SSPM_SEC, 2)
+DEFINE_BITFIELD(CPU_EB_DOM, 11, 8) /* 1 */
+DEFINE_BITFIELD(SCP_SSPM_DOM, 19, 16) /* 2 */
+
+/* PERI */
+DEFINE_BITFIELD(SPM_DOM, 3, 0) /* 0 */
+
+/* PERI_PAR */
+DEFINE_BITFIELD(PCIE0_DOM, 27, 24) /* 19 */
+
#endif /* SOC_MEDIATEK_MT8188_DEVAPC_H */