diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/pirq_routing.c | 2 | ||||
| -rw-r--r-- | src/drivers/intel/gma/intel_ddi.c | 2 | ||||
| -rw-r--r-- | src/lib/selfboot.c | 2 | ||||
| -rw-r--r-- | src/security/vboot/secdata_tpm.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/pcie.c | 2 | ||||
| -rw-r--r-- | src/soc/samsung/exynos5420/dp_lowlevel.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pch.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pcie.c | 2 |
10 files changed, 11 insertions, 11 deletions
diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c index 0da057f4f1..0a1e75d6e3 100644 --- a/src/arch/x86/pirq_routing.c +++ b/src/arch/x86/pirq_routing.c @@ -164,7 +164,7 @@ static void pirq_route_irqs(unsigned long addr) } for (i = 0; i < CONFIG_MAX_PIRQ_LINKS; i++) - printk(BIOS_DEBUG, "PIRQ%c: %d\n", i + 'A', pirq[i]); + printk(BIOS_DEBUG, "PIRQ%c: %d\n", i + 'A', pirq[i]); pirq_assign_irqs(pirq); } diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index 24bc162238..6c6d13e718 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -48,7 +48,7 @@ static void intel_prepare_ddi_buffers(int port, int use_fdi_mode) hsw_ddi_translations_fdi : hsw_ddi_translations_dp); - printk(BIOS_SPEW, "Initializing DDI buffers for port %d in %s mode\n", + printk(BIOS_SPEW, "Initializing DDI buffers for port %d in %s mode\n", port, use_fdi_mode ? "FDI" : "DP"); diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index 637ad13883..e21c493701 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -93,7 +93,7 @@ static int load_one_segment(uint8_t *dest, break; } default: - printk(BIOS_INFO, "CBFS: Unknown compression type %d\n", compression); + printk(BIOS_INFO, "CBFS: Unknown compression type %d\n", compression); return 0; } /* Calculate middle after any changes to len. */ diff --git a/src/security/vboot/secdata_tpm.c b/src/security/vboot/secdata_tpm.c index 78850696c4..844b28de6e 100644 --- a/src/security/vboot/secdata_tpm.c +++ b/src/security/vboot/secdata_tpm.c @@ -15,7 +15,7 @@ #include <console/console.h> #define VBDEBUG(format, args...) \ - printk(BIOS_INFO, "%s():%d: " format, __func__, __LINE__, ## args) + printk(BIOS_INFO, "%s():%d: " format, __func__, __LINE__, ## args) #define RETURN_ON_FAILURE(tpm_cmd) do { \ uint32_t result_; \ diff --git a/src/soc/intel/broadwell/pch/pcie.c b/src/soc/intel/broadwell/pch/pcie.c index b37f256069..61d6962a82 100644 --- a/src/soc/intel/broadwell/pch/pcie.c +++ b/src/soc/intel/broadwell/pch/pcie.c @@ -295,7 +295,7 @@ static void root_port_commit_config(void) if (dev->enabled) continue; - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* 8.2 Configuration of PCI Express Root Ports */ pci_or_config32(dev, 0x338, 1 << 26); diff --git a/src/soc/samsung/exynos5420/dp_lowlevel.c b/src/soc/samsung/exynos5420/dp_lowlevel.c index 0cd64833f4..2d33873a28 100644 --- a/src/soc/samsung/exynos5420/dp_lowlevel.c +++ b/src/soc/samsung/exynos5420/dp_lowlevel.c @@ -229,7 +229,7 @@ unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable) CH2_PD | CH3_PD); break; default: - printk(BIOS_ERR, "DP undefined block number : %d\n", block); + printk(BIOS_ERR, "DP undefined block number : %d\n", block); return -1; } diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index d24604c513..16ffaf5240 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -327,7 +327,7 @@ static void pch_pcie_enable(struct device *dev) } if (!dev->enabled) { - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* * PCIE Power Savings for PantherPoint and CougarPoint/B1+ @@ -408,7 +408,7 @@ void pch_enable(struct device *dev) return pch_pcie_enable(dev); if (!dev->enabled) { - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* Ensure memory, io, and bus master are all disabled */ pci_and_config16(dev, PCI_COMMAND, diff --git a/src/southbridge/intel/i82801gx/i82801gx.c b/src/southbridge/intel/i82801gx/i82801gx.c index 6d4e711552..4783099570 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.c +++ b/src/southbridge/intel/i82801gx/i82801gx.c @@ -56,7 +56,7 @@ void i82801gx_enable(struct device *dev) u16 reg16; if (!dev->enabled) { - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* Ensure memory, io, and bus master are all disabled */ reg16 = pci_read_config16(dev, PCI_COMMAND); diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c index 8f7cdb8cc0..f83f3f675e 100644 --- a/src/southbridge/intel/lynxpoint/pch.c +++ b/src/southbridge/intel/lynxpoint/pch.c @@ -185,7 +185,7 @@ void pch_enable(struct device *dev) return; if (!dev->enabled) { - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* Ensure memory, io, and bus master are all disabled */ pci_and_config16(dev, PCI_COMMAND, diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c index 24fab3b41e..2f01560c0c 100644 --- a/src/southbridge/intel/lynxpoint/pcie.c +++ b/src/southbridge/intel/lynxpoint/pcie.c @@ -322,7 +322,7 @@ static void root_port_commit_config(void) if (dev->enabled) continue; - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* Ensure memory, io, and bus master are all disabled */ pci_and_config16(dev, PCI_COMMAND, |