5 files changed, 105 insertions, 1 deletions
diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c
index 1add1f5069..0311baac1c 100644
--- a/src/mainboard/amd/bettong/BiosCallOuts.c
+++ b/src/mainboard/amd/bettong/BiosCallOuts.c
@@ -76,6 +76,9 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
 	} else if (StdHeader->Func == AMD_INIT_ENV) {
 		FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
 		printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
+#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM)
+		oem_fan_control(FchParams_env);
+#endif
 
 		/* XHCI configuration */
 #if CONFIG_HUDSON_XHCI_ENABLE
diff --git a/src/mainboard/amd/bettong/Makefile.inc b/src/mainboard/amd/bettong/Makefile.inc
index b9cd6447c3..70722ee3f8 100644
--- a/src/mainboard/amd/bettong/Makefile.inc
+++ b/src/mainboard/amd/bettong/Makefile.inc
@@ -22,3 +22,6 @@ romstage-y += PlatformGnbPcie.c
 
 ramstage-y += BiosCallOuts.c
 ramstage-y += PlatformGnbPcie.c
+ifeq ($(CONFIG_HUDSON_IMC_FWM), y)
+ramstage-y += fchec.c
+endif
diff --git a/src/mainboard/amd/bettong/fchec.c b/src/mainboard/amd/bettong/fchec.c
new file mode 100644
index 0000000000..3458f9b2b6
--- /dev/null
+++ b/src/mainboard/amd/bettong/fchec.c
@@ -0,0 +1,67 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include "fchec.h"
+
+void agesawrapper_fchecfancontrolservice()
+{
+	FCH_DATA_BLOCK LateParams;
+
+	/* Thermal Zone Parameter */
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00;
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d;
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0xc6;
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00;
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x04;
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x98; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x01;
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01; /* PWM steping rate in unit of PWM level percentage */
+	LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00;
+
+	/* IMC Fan Policy temperature thresholds */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00;
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg2 = 0x3c; /*AC0 threshold in Celsius */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg3 = 0x28; /*AC1 threshold in Celsius */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg4 = 0xff; /*AC2 threshold in Celsius */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 threshold in Celsius, 0xFF is not define */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 threshold in Celsius, 0xFF is not define */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 threshold in Celsius, 0xFF is not define */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 threshold in Celsius, 0xFF is not define */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 lowest threshold in Celsius, 0xFF is not define */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*critical threshold* in Celsius, 0xFF is not define */
+	LateParams.Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00;
+
+	/* IMC Fan Policy PWM Settings */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00;
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg2 = 0x50; /* AL0 percentage */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg3 = 0x32; /* AL1 percentage */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg4 = 0xff; /* AL2 percentage */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percentage */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percentage */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percentage */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percentage */
+	LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percentage */
+
+	LateParams.Imc.EcStruct.IMCFUNSupportBitMap = 0x111;
+
+	FchECfancontrolservice(&LateParams);
+}
diff --git a/src/mainboard/amd/bettong/fchec.h b/src/mainboard/amd/bettong/fchec.h
new file mode 100644
index 0000000000..13305d8e41
--- /dev/null
+++ b/src/mainboard/amd/bettong/fchec.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef AMD_BETTONG_FCHEC
+#define AMD_BETTONG_FCHEC
+
+#include "imc.h"
+#include "Porting.h"
+#include "AGESA.h"
+#include "FchCommonCfg.h"
+
+extern VOID FchECfancontrolservice (IN VOID *FchDataPtr);
+void agesawrapper_fchecfancontrolservice(void);
+
+#endif
diff --git a/src/vendorcode/amd/Kconfig b/src/vendorcode/amd/Kconfig
index 9720c799c3..2591cf90e8 100644
--- a/src/vendorcode/amd/Kconfig
+++ b/src/vendorcode/amd/Kconfig
@@ -34,7 +34,7 @@ choice
 
 config CPU_AMD_AGESA_BINARY_PI
 	bool "binary PI"
-	select HUDSON_DISABLE_IMC
+	select HUDSON_DISABLE_IMC if CPU_AMD_PI_00730F01 || CPU_AMD_PI_00630F01
 	help
 	  Use a binary PI package.  Generally, these will be stored in the
 	  "3rdparty/blobs" directory.  For some processors, these must be obtained