diff options
Diffstat (limited to 'src')
28 files changed, 0 insertions, 537 deletions
diff --git a/src/mainboard/asus/p5gc-mx/acpi/thermal.asl b/src/mainboard/asus/p5gc-mx/acpi/thermal.asl deleted file mode 100644 index 2997587d82..0000000000 --- a/src/mainboard/asus/p5gc-mx/acpi/thermal.asl +++ /dev/null @@ -1 +0,0 @@ -/* dummy */ diff --git a/src/mainboard/asus/p5gc-mx/dsdt.asl b/src/mainboard/asus/p5gc-mx/dsdt.asl index 0e4bc65093..9346331507 100644 --- a/src/mainboard/asus/p5gc-mx/dsdt.asl +++ b/src/mainboard/asus/p5gc-mx/dsdt.asl @@ -23,21 +23,13 @@ DefinitionBlock( 0x20090419 // OEM revision ) { - /* #include "acpi/platform.asl" */ - // global NVS and variables #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/platform.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - // mainboard specific devices #include "acpi/mainboard.asl" - // Thermal Zone - //#include "acpi/thermal.asl" - #include <cpu/intel/speedstep/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/thermal.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/thermal.asl deleted file mode 100644 index 2997587d82..0000000000 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/thermal.asl +++ /dev/null @@ -1 +0,0 @@ -/* dummy */ diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl index be640c505e..b94f5bd460 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl @@ -29,15 +29,9 @@ DefinitionBlock( #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/platform.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - // mainboard specific devices #include "acpi/mainboard.asl" - // Thermal Zone - //#include "acpi/thermal.asl" - #include <cpu/intel/speedstep/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl index 1936a3e041..ad5eed1e18 100644 --- a/src/mainboard/google/auron/dsdt.asl +++ b/src/mainboard/google/auron/dsdt.asl @@ -32,9 +32,6 @@ DefinitionBlock( // global NVS and variables #include <soc/intel/broadwell/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - // CPU #include <cpu/intel/common/acpi/cpu.asl> diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl index b7a8cdfd41..dce14a4c58 100644 --- a/src/mainboard/google/butterfly/dsdt.asl +++ b/src/mainboard/google/butterfly/dsdt.asl @@ -35,9 +35,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index 66e66eb316..eb1c097287 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -33,9 +33,6 @@ DefinitionBlock( // global NVS and variables #include <soc/intel/broadwell/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - // CPU #include <cpu/intel/common/acpi/cpu.asl> diff --git a/src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl b/src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl deleted file mode 100644 index 2b61cf132a..0000000000 --- a/src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for IvyBridge */ - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 22 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 19 }, - Package() { 0x001cffff, 1, 0, 20 }, - Package() { 0x001cffff, 2, 0, 17 }, - Package() { 0x001cffff, 3, 0, 18 }, - // EHCI #1 0:1d.0 - Package() { 0x001dffff, 0, 0, 19 }, - // EHCI #2 0:1a.0 - Package() { 0x001affff, 0, 0, 20 }, - // LPC devices 0:1f.0 - Package() { 0x001fffff, 0, 0, 21 }, - Package() { 0x001fffff, 1, 0, 22 }, - Package() { 0x001fffff, 2, 0, 23 }, - Package() { 0x001fffff, 3, 0, 16 }, - }) - } Else { - Return (Package() { - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKE, 0 }, - Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKC, 0 }, - // EHCI #1 0:1d.0 - Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 }, - // EHCI #2 0:1a.0 - Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKF, 0 }, - Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }, - }) - } -} diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl index a7e60f39cd..18c7fc5681 100644 --- a/src/mainboard/google/link/dsdt.asl +++ b/src/mainboard/google/link/dsdt.asl @@ -35,10 +35,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - - #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl b/src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl deleted file mode 100644 index 2b61cf132a..0000000000 --- a/src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for IvyBridge */ - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 22 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 19 }, - Package() { 0x001cffff, 1, 0, 20 }, - Package() { 0x001cffff, 2, 0, 17 }, - Package() { 0x001cffff, 3, 0, 18 }, - // EHCI #1 0:1d.0 - Package() { 0x001dffff, 0, 0, 19 }, - // EHCI #2 0:1a.0 - Package() { 0x001affff, 0, 0, 20 }, - // LPC devices 0:1f.0 - Package() { 0x001fffff, 0, 0, 21 }, - Package() { 0x001fffff, 1, 0, 22 }, - Package() { 0x001fffff, 2, 0, 23 }, - Package() { 0x001fffff, 3, 0, 16 }, - }) - } Else { - Return (Package() { - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKE, 0 }, - Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKC, 0 }, - // EHCI #1 0:1d.0 - Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 }, - // EHCI #2 0:1a.0 - Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKF, 0 }, - Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }, - }) - } -} diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl index f03d010fc9..e4921fa0b9 100644 --- a/src/mainboard/google/parrot/dsdt.asl +++ b/src/mainboard/google/parrot/dsdt.asl @@ -34,9 +34,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/google/slippy/dsdt.asl b/src/mainboard/google/slippy/dsdt.asl index 010467965e..3338d842b4 100644 --- a/src/mainboard/google/slippy/dsdt.asl +++ b/src/mainboard/google/slippy/dsdt.asl @@ -32,9 +32,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - // CPU #include <cpu/intel/common/acpi/cpu.asl> diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl index b89766e62d..976649e073 100644 --- a/src/mainboard/google/stout/dsdt.asl +++ b/src/mainboard/google/stout/dsdt.asl @@ -36,9 +36,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/ibase/mb899/acpi/thermal.asl b/src/mainboard/ibase/mb899/acpi/thermal.asl deleted file mode 100644 index 72390b5b68..0000000000 --- a/src/mainboard/ibase/mb899/acpi/thermal.asl +++ /dev/null @@ -1,89 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -// Thermal Zone - -Scope (\_TZ) -{ - ThermalZone (THRM) - { - - // FIXME these could/should be read from the - // GNVS area, so they can be controlled by - // coreboot - Name(TC1V, 0x04) - Name(TC2V, 0x03) - Name(TSPV, 0x64) - - // At which temperature should the OS start - // active cooling? - Method (_AC0, 0, Serialized) - { - Return (0xf5c) // Value for Rocky - } - - // Method (_AC1, 0, Serialized) - // { - // Return (0xf5c) - // } - - // Critical shutdown temperature - Method (_CRT, 0, Serialized) - { - Return (Add (0x0aac, 0x50)) // FIXME - } - - // CPU throttling start temperature - Method (_PSV, 0, Serialized) - { - Return (0xaaf) // FIXME - } - - // Get DTS Temperature - Method (_TMP, 0, Serialized) - { - Return (0xaac) // FIXME - } - - // Processors used for active cooling - Method (_PSL, 0, Serialized) - { - If (MPEN) { - Return (Package() {\_PR.CP01, \_PR.CP02}) - } - Return (Package() {\_PR.CP01}) - } - - // TC1 value for passive cooling - Method (_TC1, 0, Serialized) - { - Return (TC1V) - } - - // TC2 value for passive cooling - Method (_TC2, 0, Serialized) - { - Return (TC2V) - } - - // Sampling period for passive cooling - Method (_TSP, 0, Serialized) - { - Return (TSPV) - } - - - } -} diff --git a/src/mainboard/ibase/mb899/dsdt.asl b/src/mainboard/ibase/mb899/dsdt.asl index 7d545798bc..2ed2c2e738 100644 --- a/src/mainboard/ibase/mb899/dsdt.asl +++ b/src/mainboard/ibase/mb899/dsdt.asl @@ -30,11 +30,6 @@ DefinitionBlock( #include <southbridge/intel/common/acpi/platform.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - - //#include "acpi/thermal.asl" - #include <cpu/intel/speedstep/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl index 34b14e2382..1fcb967381 100644 --- a/src/mainboard/intel/baskingridge/dsdt.asl +++ b/src/mainboard/intel/baskingridge/dsdt.asl @@ -31,9 +31,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - #include "acpi/thermal.asl" #include <cpu/intel/common/acpi/cpu.asl> diff --git a/src/mainboard/intel/d945gclf/acpi/thermal.asl b/src/mainboard/intel/d945gclf/acpi/thermal.asl deleted file mode 100644 index 27337d49df..0000000000 --- a/src/mainboard/intel/d945gclf/acpi/thermal.asl +++ /dev/null @@ -1,89 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -// Thermal Zone - -Scope (\_TZ) -{ - ThermalZone (THRM) - { - - // FIXME these could/should be read from the - // GNVS area, so they can be controlled by - // coreboot - Name(TC1V, 0x04) - Name(TC2V, 0x03) - Name(TSPV, 0x64) - - // At which temperature should the OS start - // active cooling? - Method (_AC0, 0, Serialized) - { - Return (0xf5c) // Value for Rocky - } - - // Method (_AC1, 0, Serialized) - // { - // Return (0xf5c) - // } - - // Critical shutdown temperature - Method (_CRT, 0, Serialized) - { - Return (Add (0x0aac, 0x50)) // FIXME - } - - // CPU throttling start temperature - Method (_PSV, 0, Serialized) - { - Return (0xaaf) // FIXME - } - - // Get DTS Temperature - Method (_TMP, 0, Serialized) - { - Return (0xaac) // FIXME - } - - // Processors used for active cooling - Method (_PSL, 0, Serialized) - { - If (MPEN) { - Return (Package() {\_PR.CP01, \_PR.CP02}) - } - Return (Package() {\_PR.CP01}) - } - - // TC1 value for passive cooling - Method (_TC1, 0, Serialized) - { - Return (TC1V) - } - - // TC2 value for passive cooling - Method (_TC2, 0, Serialized) - { - Return (TC2V) - } - - // Sampling period for passive cooling - Method (_TSP, 0, Serialized) - { - Return (TSPV) - } - - - } -} diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl index be640c505e..b94f5bd460 100644 --- a/src/mainboard/intel/d945gclf/dsdt.asl +++ b/src/mainboard/intel/d945gclf/dsdt.asl @@ -29,15 +29,9 @@ DefinitionBlock( #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/platform.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - // mainboard specific devices #include "acpi/mainboard.asl" - // Thermal Zone - //#include "acpi/thermal.asl" - #include <cpu/intel/speedstep/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl b/src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl deleted file mode 100644 index 3e841e03ab..0000000000 --- a/src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for IvyBridge */ - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 22 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 17 }, - Package() { 0x001cffff, 1, 0, 18 }, - Package() { 0x001cffff, 2, 0, 19 }, - Package() { 0x001cffff, 3, 0, 20 }, - // EHCI #1 0:1d.0 - Package() { 0x001dffff, 0, 0, 19 }, - // EHCI #2 0:1a.0 - Package() { 0x001affff, 0, 0, 20 }, - // LPC devices 0:1f.0 - Package() { 0x001fffff, 0, 0, 21 }, - Package() { 0x001fffff, 1, 0, 22 }, - Package() { 0x001fffff, 2, 0, 23 }, - Package() { 0x001fffff, 3, 0, 16 }, - }) - } Else { - Return (Package() { - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 }, - // EHCI #1 0:1d.0 - Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 }, - // EHCI #2 0:1a.0 - Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKF, 0 }, - Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }, - }) - } -} diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl index baf75b0473..c222888ede 100644 --- a/src/mainboard/intel/emeraldlake2/dsdt.asl +++ b/src/mainboard/intel/emeraldlake2/dsdt.asl @@ -34,9 +34,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl index f970df936d..32d6e3d395 100644 --- a/src/mainboard/intel/harcuvar/dsdt.asl +++ b/src/mainboard/intel/harcuvar/dsdt.asl @@ -30,9 +30,6 @@ DefinitionBlock( #include "acpi/platform.asl" #include "acpi/mainboard.asl" - // General Purpose Events - //#include "acpi/gpe.asl" - // Thermal Handler #include "acpi/thermal.asl" diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl index 6bfc172848..7b676f41a4 100644 --- a/src/mainboard/intel/wtm2/dsdt.asl +++ b/src/mainboard/intel/wtm2/dsdt.asl @@ -33,9 +33,6 @@ DefinitionBlock( // global NVS and variables #include <soc/intel/broadwell/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - // CPU #include <cpu/intel/common/acpi/cpu.asl> diff --git a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl deleted file mode 100644 index 72390b5b68..0000000000 --- a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl +++ /dev/null @@ -1,89 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -// Thermal Zone - -Scope (\_TZ) -{ - ThermalZone (THRM) - { - - // FIXME these could/should be read from the - // GNVS area, so they can be controlled by - // coreboot - Name(TC1V, 0x04) - Name(TC2V, 0x03) - Name(TSPV, 0x64) - - // At which temperature should the OS start - // active cooling? - Method (_AC0, 0, Serialized) - { - Return (0xf5c) // Value for Rocky - } - - // Method (_AC1, 0, Serialized) - // { - // Return (0xf5c) - // } - - // Critical shutdown temperature - Method (_CRT, 0, Serialized) - { - Return (Add (0x0aac, 0x50)) // FIXME - } - - // CPU throttling start temperature - Method (_PSV, 0, Serialized) - { - Return (0xaaf) // FIXME - } - - // Get DTS Temperature - Method (_TMP, 0, Serialized) - { - Return (0xaac) // FIXME - } - - // Processors used for active cooling - Method (_PSL, 0, Serialized) - { - If (MPEN) { - Return (Package() {\_PR.CP01, \_PR.CP02}) - } - Return (Package() {\_PR.CP01}) - } - - // TC1 value for passive cooling - Method (_TC1, 0, Serialized) - { - Return (TC1V) - } - - // TC2 value for passive cooling - Method (_TC2, 0, Serialized) - { - Return (TC2V) - } - - // Sampling period for passive cooling - Method (_TSP, 0, Serialized) - { - Return (TSPV) - } - - - } -} diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl index 10f4208cff..8c5d6e177a 100644 --- a/src/mainboard/kontron/986lcd-m/dsdt.asl +++ b/src/mainboard/kontron/986lcd-m/dsdt.asl @@ -29,11 +29,6 @@ DefinitionBlock( #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/platform.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - - //#include "acpi/thermal.asl" - #include <cpu/intel/speedstep/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl index b297a12160..cbabce4f4a 100644 --- a/src/mainboard/kontron/ktqm77/dsdt.asl +++ b/src/mainboard/kontron/ktqm77/dsdt.asl @@ -35,9 +35,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl index eaa36468e9..eb22e6a4a3 100644 --- a/src/mainboard/samsung/lumpy/dsdt.asl +++ b/src/mainboard/samsung/lumpy/dsdt.asl @@ -34,9 +34,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl index 1298368ee0..b135097983 100644 --- a/src/mainboard/samsung/stumpy/dsdt.asl +++ b/src/mainboard/samsung/stumpy/dsdt.asl @@ -32,9 +32,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // General Purpose Events - //#include "acpi/gpe.asl" - #include "acpi/thermal.asl" #include <cpu/intel/common/acpi/cpu.asl> diff --git a/src/mainboard/scaleway/tagada/dsdt.asl b/src/mainboard/scaleway/tagada/dsdt.asl index f970df936d..32d6e3d395 100644 --- a/src/mainboard/scaleway/tagada/dsdt.asl +++ b/src/mainboard/scaleway/tagada/dsdt.asl @@ -30,9 +30,6 @@ DefinitionBlock( #include "acpi/platform.asl" #include "acpi/mainboard.asl" - // General Purpose Events - //#include "acpi/gpe.asl" - // Thermal Handler #include "acpi/thermal.asl" |