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-rw-r--r--src/mainboard/google/guybrush/romstage.c2
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/gpio.c2
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/guybrush/romstage.c b/src/mainboard/google/guybrush/romstage.c
index 23e7853a05..0b7649b87a 100644
--- a/src/mainboard/google/guybrush/romstage.c
+++ b/src/mainboard/google/guybrush/romstage.c
@@ -9,7 +9,7 @@ void mb_pre_fspm(void)
const struct soc_amd_gpio *base_gpios, *override_gpios;
/* Initialize PCIe reset. */
- base_gpios = variant_pcie_gpio_table(&base_num_gpios);
+ base_gpios = baseboard_pcie_gpio_table(&base_num_gpios);
override_gpios = variant_pcie_override_gpio_table(&override_num_gpios);
gpio_configure_pads_with_override(base_gpios, base_num_gpios,
diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c
index 8554c4c671..1ee70dae33 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c
+++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c
@@ -286,7 +286,7 @@ static const struct soc_amd_gpio pcie_gpio_table[] = {
PAD_NFO(GPIO_26, PCIE_RST_L, HIGH),
};
-const struct soc_amd_gpio *__weak variant_pcie_gpio_table(size_t *size)
+const struct soc_amd_gpio *baseboard_pcie_gpio_table(size_t *size)
{
*size = ARRAY_SIZE(pcie_gpio_table);
return pcie_gpio_table;
diff --git a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
index bf694438bb..9a57c41eff 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
@@ -30,7 +30,7 @@ const struct soc_amd_gpio *variant_early_gpio_table(size_t *size);
const struct soc_amd_gpio *variant_bootblock_gpio_table(size_t *size);
/* This function provides GPIO settings before PCIe enumeration. */
-const struct soc_amd_gpio *variant_pcie_gpio_table(size_t *size);
+const struct soc_amd_gpio *baseboard_pcie_gpio_table(size_t *size);
/* This function provides GPIO settings for eSPI bus. */
const struct soc_amd_gpio *variant_espi_gpio_table(size_t *size);